Rambus Inc v. LSI Corporation

Filing 111

CLAIM CONSTRUCTION ORDER. Signed by Judge Richard Seeborg on 9/26/12. (cl, COURT STAFF) (Filed on 9/26/2012)

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IN THE UNITED STATES DISTRICT COURT

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FOR THE NORTHERN DISTRICT OF CALIFORNIA

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SAN FRANCISCO DIVISION

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For the Northern District of California

United States District Court

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No. C 10-05446 RS
No. C 10-05449 RS

RAMBUS, INC.,
Plaintiff,

CLAIM CONSTRUCTION ORDER

v.
LSI CORPORATION,
Defendant.
____________________________________/

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RAMBUS, INC.,
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Plaintiff,
v.
STMICROELECTRONICS N.V., and
STMICROELECTRONICS, INC.,
Defendants.
____________________________________/
I. INTRODUCTION
This claim construction is only the latest salvo in a long-standing patent war over Dynamic
Random Access Memory (“DRAM”), initiated by patentee Rambus against the many suppliers of
constituent technologies. Defendants LSI Corporation and STMicroelectronics furnish chip makers
with “memory controllers,” which generally facilitate communications between the processor and
the DRAM, and which allegedly infringe ten Rambus patents from the heavily-litigated Farmwald-

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Markman v. Westview Instruments, Inc., 52 F.3d 967, 979 (Fed. Cir. 1995) (en banc), aff’d, 517 U.S.

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370 (1996), and Patent Local Rule 4-3, the parties have presented ten terms found in the claims of

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the patents for construction by the Court. After defendants filed their responsive brief to Rambus’s

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opening claim construction brief, the Court of Appeals for the Federal Circuit handed down an

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opinion reviewing ex parte reexamination of U.S. Patent No. 6,034,918 (“the ’918 patent”), also of

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the Farmwald-Horowitz family, addressing some of the issues disputed here. See In re Rambus Inc.,

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--- F.3d ----, 2012 WL 3329675 (Fed. Cir. 2012). Accordingly, defendants move, unopposed, for

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leave to file a joint sur-reply addressing that ruling, and Rambus also moves, unopposed to file a

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response. Those motions are hereby granted, and in consideration of the briefing, the arguments

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Horowitz family of patents, including U.S. Patent No. 6,426,916 (“the ’916 patent”).1 Pursuant to

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United States District Court

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presented at the Markman hearing, and for all the reasons set forth below, the disputed terms are

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construed as follows.
II. BACKGROUND

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The Farmwald-Horowitz patents are directed to Synchronous Dynamic Random Access

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Memory (“SDRAM”) chips and related interface and memory control technology. DRAM serves as

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the primary memory resource for temporary storage and data in use by the Central Processing Unit

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(“CPU” or “processor”). It is a relatively inexpensive and fast form of temporary memory used in a

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wide variety of common computer devices. For example, DRAM is used to store display data, and

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to make information retrieved from the slower hard drive readily accessible to software applications.

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DRAM cells are composed of one transistor and one capacitor in large, two-dimensional arrays,

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organized into columns and rows. Each cell stores a bit of data as a small charge, traditionally

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denoted as “0” for a low-voltage charge, or a “1” for a higher voltage charge. Over time, the

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capacitors lose their charge, and must be “dynamically” refreshed to preserve the integrity of the

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stored information. As a consequence of this charge “leaking,” DRAM loses information rapidly

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once the device is turned off, unlike non-volatile memory resources, such as flash memory.

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The Farmwald-Horowitz patents all descended from U.S. Patent App. Ser. No. 07/510,898, and
share similar written descriptions and diagrams. For simplicity’s sake, the Court adopts the parties’
convention of referring exclusively to the ’916 patent.
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Defendants’ memory controllers are the accused device in this litigation, and although

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“controller/controller device” is a disputed claim term, generally speaking, the controller’s function

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is to intermediate between the DRAM assembly and the processor. How precisely it achieves that

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goes to the heart of the dispute between Rambus and defendants. The memory controller may be

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integrated into the processor or exist as a separate, standalone chip. In either case, it communicates

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with the DRAM assembly via a series of traces or wires, commonly referred to as the “memory

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bus.” The bus typically includes a separate “control bus,” “address bus,” and “data bus.” The

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control bus also specifically includes a “Row Address Strobe” (“RAS”) and “Column Address

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Strobe” (“CAS”), which direct the selection of particular memory cells for “reading” and “writing”

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operations.
Interposed between the bus and the memory array is a component of the DRAM assembly

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called the “sense amplifiers.” The amplifiers access individual memory cells through “bit line”

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circuitry to facilitate read/write operations, by amplifying and “loading” the charge information in

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selected rows of DRAM cells (also called a “page” or “word lines”). To achieve this, the sense

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amplifiers are “precharged,” or primed with an intermediate charge that enables the circuitry to

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perceive the stored charge (high or low) correctly. Once the row and column are selected, through

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operation of the control bus, address bus, and sense amplifiers, data is transmitted over the data bus.

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Existing “asynchronous” DRAM systems generally perform read operations according to the

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following chronology: first, the RAS bus transitions from low to high voltage to prompt the sense

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amplifiers to precharge. It then transitions back to low voltage and holds there, activating and

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loading a particular row of memory cells into the sense amplifiers. The CAS bus then transitions

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from high voltage to low, identifying a particular column, which effectively selects a single memory

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cell. The data stored in that cell is then transmitted over the data bus. Write operations are executed

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in a similar fashion.

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The claims of the Farmwald-Horowitz patents asserted in this litigation are directed to the

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controller and circuitry that communicates with the DRAM assembly, as well as methods for

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operating them. Unlike conventional asynchronous systems, the claimed inventions synchronize the

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transmission of signals from the controller to the DRAM assembly with a “clock signal” for the

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purpose of improving the speed and efficiency of operations.
III. LEGAL STANDARD

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Claim construction is a question of law to be determined by the Court. Markman, 52 F.3d at

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979. “Ultimately, the interpretation to be given a term can only be determined and confirmed with a

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full understanding of what the inventors actually invented and intended to envelop with the claim.”

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Phillips v. AWH Corp., 415 F.3d 1303, 1316 (Fed. Cir. 2005) (quoting Renishaw PLC v. Marposs

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Societa’ per Azioni, 158 F.3d 1243, 1250 (Fed. Cir. 1998)). Accordingly, a claim should be

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construed in a manner that “most naturally aligns with the patent’s description of the invention.” Id.

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The first step in claim construction is to look to the language of the claims themselves. “It is

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a ‘bedrock principle’ of patent law that ‘the claims of a patent define the invention to which the

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patentee is entitled the right to exclude.’” Phillips, 415 F.3d at 1312 (quoting Innova/Pure Water,

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Inc. v. Safari Water Filtration Sys., Inc., 381 F.3d 1111, 1115 (Fed. Cir. 2004)). A disputed claim

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term should be construed in a manner consistent with its “ordinary and customary meaning,” which

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is “the meaning that the term would have to a person of ordinary skill in the art in question at the

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time of the invention, i.e., as of the effective filing date of the patent application.” Phillips, 415

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F.3d at 1312-13. The ordinary and customary meaning of a claim term may be determined solely by

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viewing the term within the context of the claim’s overall language. See id. at 1314 (“[T]he use of a

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term within the claim provides a firm basis for construing the term.”). Additionally, the use of the

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term in other claims may provide guidance regarding its proper construction. Id. (“Other claims of

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the patent in question, both asserted and unasserted, can also be valuable sources of enlightenment

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as to the meaning of a claim term.”).

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A claim should also be construed in a manner that is consistent with the patent’s

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specification. See Markman, 52 F.3d at 979 (“Claims must be read in view of the specification, of

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which they are a part.”). Typically the specification is the best guide for construing the claims. See

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Phillips, 415 F.3d at 1315 (“The specification is . . . the primary basis for construing the claims.”).

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See also Vitronics Corp. v. Conceptronic, Inc., 90 F.3d 1576, 1582 (Fed. Cir. 1996) (“[T]he

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it is the single best guide to the meaning of a disputed term.”). In limited circumstances, the

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specification may be used to narrow the meaning of a claim term that otherwise would appear to be

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susceptible to a broader reading. See SciMed Life Sys., Inc. v. Advanced Cardiovascular Sys., Inc.,

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242 F.3d 1337, 1341 (Fed. Cir. 2001); Phillips, 415 F.3d at 1316. Precedent forbids, however, a

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construction of claim terms that imposes limitations not found in the claims or supported by an

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unambiguous restriction in the specification or prosecution history. Laitram Corp. v. NEC Corp.,

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163 F.3d 1342, 1347 (Fed. Cir. 1998) (“[A] court may not import limitations from the written

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description into the claims.”); Comark Commc’ns., Inc. v. Harris Corp., 156 F.3d 1182, 1186 (Fed.

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Cir. 1998) (“[W]hile . . . claims are to be interpreted in light of the specification, it does not follow

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specification is always highly relevant to the claim construction analysis. Usually, it is dispositive;

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that limitations from the specification may be read into the claims.”); SRI Int’l v. Matsushita Elec.

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Corp. of Am., 775 F.2d 1107, 1121 (Fed. Cir. 1985) (en banc) (“It is the claims that measure the

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invention.”) (emphasis in original). A final source of intrinsic evidence is the prosecution record

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and any statements made by the patentee to the United States Patent and Trademark Office (PTO)

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regarding the scope of the invention. See Markman, 52 F.3d at 980.

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The court also may consider extrinsic evidence, such as dictionaries or technical treatises,

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especially if such sources are “helpful in determining ‘the true meaning of language used in the

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patent claims.’” Phillips, 415 F.3d at 1318 (quoting Markman, 52 F.3d at 980). Ultimately, while

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extrinsic evidence may aid the claim construction analysis, it cannot be used to contradict the plain

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and ordinary meaning of a claim term as defined within the intrinsic record. Phillips, 415 F.3d at

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1322-23. Once the proper meaning of a term used in a claim has been determined, that term must

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have the same meaning for all claims in which it appears. Inverness Med. Switzerland GmbH v.

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Princeton Biomeditech Corp., 309 F.3d 1365, 1371 (Fed. Cir. 2002). Several terms disputed in

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these related actions have already been construed in prior litigation involving other alleged

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infringers. While the parties agree that those constructions are not binding, and were adopted in

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consideration of different, allegedly infringing devices, and in some cases without the benefit of the

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arguments raised here, “uniformity in the treatment of a given patent” is also generally desirable.

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Markman, 517 U.S. at 390. Those previous constructions may be viewed as “persuasive and highly

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relevant.” Verizon Cal. Inc. v. Ronald Katz Tech. Licensing, P.A., 326 F. Supp. 2d 1060, 1069 (C.D.

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Cal. 2003); Comcast Cable Commc’ns Corp. v. Finisar Corp., No. C 06-04206, 2007 WL 1052821

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at *2 (N.D. Cal. Apr. 6, 2007) (“Prior constructions may be persuasive, but this Court may reach

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different conclusions.”).
IV. DISCUSSION

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No.
Claim term
Rambus’s construction
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controller/controller an integrated circuit device that
device
includes circuitry to direct the
actions of one or more memory
devices

Defendants’ construction
a device that controls one or
more devices

The parties debate the appropriate scope of the limitation “controller,” or equivalently,
“controller device.” The dispute focuses on Rambus’s suggestions that the claim term refers to (1)
“an integrated circuit device,” i.e., a single chip device, and (2) that it must control “memory
devices,” specifically. As defendants note, the term actually only appears in the claims of the ’916
patent, not its specification. The specification refers, instead, to “master or bus controller devices,
such as CPUs … [which] send[] control signals” and “slave devices, such as DRAM, SRAM or
ROM memory devices … [which] respond[] to control signals.” The claims, on the other hand,
recite a “method of controlling a synchronous memory device by a controller.” ’916 patent, col.
25:66-67.
Turning to the first point, the parties here have stipulated, consistent with the Federal
Circuit’s opinion in Rambus v. Infineon Techs. Ag, 318 F.3d 1081, 1091 (Fed. Cir. 2003), that
“integrated circuit device” means “a circuit constructed on a single monolithic substrate, commonly
called a ‘chip.’” (See Joint Claim Construction and Prehearing Statement (Dkt. No. 95) at 1).
Rambus argues that the term “controller” implies that it is an “integrated circuit device” because the
specification describes the “Field of the Invention” as follows: “An integrated circuit bus interface
for computer and video systems is described which allows high speed transfer of blocks of data,
particularly to and from memory devices, with reduced power consumption and increased system
reliability.” ’916 patent, col. 1:22-27 (emphasis added). Rambus also points out that the
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specification elaborates: “The bus architecture of this invention connects master or bus controller

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devices, such as CPUs, Direct Memory Access devices (DMAs) or Floating Point Units (FPUs), and

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slave devices such as DRAM, SRAM or ROM memory devices.” Id., col. 6:16-21. Finally,

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Rambus emphasizes that in the Hynix litigation, the parties stipulated that “memory controller”

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means “[a]n integrated circuit device that includes circuitry to direct the actions of one or more

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memory devices.” (See Exh. B to Detre Decl. in Supp. of Opening Br., at 2 (Hynix I Joint Claim

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Construction and Prehearing Statement)). Of course, that is of relatively limited significance.

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Defendants in this action argue that nothing in the specification requires the controller,

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specifically, to be a single chip device. They argue that Rambus could have drafted claims stating
that the controller must be formed on a single semiconductor substrate, but did not. Defendants also

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emphasize that prior art, in the form of U.S. Patent No. 4,315,308 (“the ’308 patent” or “the Jackson

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patent”), discloses a device that controls communications with a memory device, described in the

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Rambus patents as containing “a single CPU,” see ’916 patent, col. 2:22-31, but actually comprised

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of “two separate chips.” ’308 patent, col. 4:22-23, 4:44-47. They therefore argue that the state of

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the art contradicts Rambus’s suggestion that a controller is known within the field as a single chip

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device. To that point, Rambus replies that the Jackson patent was filed in 1978, and therefore

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should not be given much weight in assessing the terminology of the art at the time of the invention,

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many years later. On balance, the controversy over the Jackson prior art is not dispositive.

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More instructive is the Federal Circuit’s recent opinion in In re Rambus, 2012 WL 3329675

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at *4, which addresses arguments similar to those advanced here in the course of reviewing on

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appeal the reexamination of another Farmwald-Horowitz patent (also asserted in this litigation),

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U.S. Patent No. 6,034,918 (“the ’918 patent”). In that matter, the Board of Patent Appeals and

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Interferences (BPAI), construing “memory device,” rejected Rambus’s argument that the term

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necessarily consisted of an integrated circuit device. Upon review the Court agreed, holding that

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while the claim could be satisfied by a single chip device, it was not so limited: “The specification

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language Rambus cites shows only that the invention can be carried out with a single chip memory

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device, it does not require the invention to be so performed. … To the extent Rambus wanted to

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limit the memory device to a single chip component, it could have expressly done so. It did not, and

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this court will not do so here.” Id.
Recognizing that In re Rambus concerned a different claim term, the same logic applies to

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the debate here over the meaning of “controller.” While the ’916 patent’s specification supports

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Rambus’s view that its claims could be embodied by a single chip device, it does not go so far as to

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require as much. To hold otherwise would contravene the principle that limitations not found in the

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claims or supported by an unambiguous restriction in the specification or prosecution history are not

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to be read into the claims. Laitram Corp., 163 F.3d at 1347. Rambus protests that defendants’

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alternative suggestion is wholly divorced from the field of the invention, and thus too general.
While Rambus is correct that the claims must be construed in light of the specification, and the file

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history, its suggestion that defendants’ proposed construction would potentially cover “the anti-lock

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brake controller on an automobile, the controller of a back yard irrigation system, and a host of other

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technologies with no connection whatsoever to the patented inventions at issue here” is greatly

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overstated. Even with defendants’ broader proposed construction of controller, given the context

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provided by the intrinsic record, a person skilled in the art would plainly understand that the

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controller is embodied by circuitry, and not some other random form of technology. That

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understanding may be preserved without importing the further requirement that the controller must

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be an integrated circuit.
As for the second issue – that is, whether the device directs or controls2 “memory devices”

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in particular, as Rambus suggests, or “devices” more generally, as defendants submit – the claims

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recite a “method of controlling a synchronous memory device by a controller.” ’916 patent, col.

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25:66-67. In fact, all of the asserted claims refer to control of memory devices. Defendants argue

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the specification teaches that “master or bus controller devices, such as CPUs” are operable with the

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alleged invention. Id., col. 6:16-17. See also id., col. 6:27-30 (“semiconductor devices, including

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Rambus favors the verb “direct” over “control” and argues that the latter, defendants’ suggestion,
is circular and unhelpful. While “direct” is generally synonymous with “control,” because there is
no discernible difference, “control” is more faithful to the claims language, and since the word has
no demonstrated meaning peculiar to the art, it needs no further construction.
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devices, disk controllers, or other special purpose devices such as high speed switches can be

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modified for use with the bus of this invention” (emphasis added)). Rambus replies that its

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proposed construction does not suggest the controller is limited to controlling only memory devices,

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and agrees that a controller may, as the specification suggests, control other devices. If that is so,

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Rambus cannot credibly object to the inclusion of a reference to control other devices. Accordingly,

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the first term is construed to mean, “a device that controls one or more memory devices or other

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devices.”

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No.
2.

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Claim term
clock signal

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3.

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external clock
signal

Rambus’s construction
a signal that is continuously
present and continuously repeats
at regular intervals, to provide
timing information
a signal that is continuously
present and continuously repeats
at regular intervals, from a source
external to the device to provide
timing information

Defendants’ construction
a periodic signal that is
continuously present and
repeats at regular intervals to
provide timing information
a periodic signal that is
continuously present and
repeats at regular intervals to
provide timing information
from a source external to the
device

The dispute over the second and third terms is relatively limited. The ’916 patent describes a

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two clock system which, together, “provide a synchronized, high speed clock for all the devices on

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the bus.” ’916 patent, col. 8:35-36. As their respective constructions suggest, the parties agree that

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the claimed “clock signal” must be “periodic,” “continuously present,” “repeat[ed] at regular

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intervals,” and “provide timing information.”3 They further agree that an “external clock signal” is

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one “from a source external to the device.” The parties disagree, however, as to whether a

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“periodic” signal, by its nature, must be “continuously present” and “continuously repeat[ing] at

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regular intervals,” with Rambus arguing in the affirmative, and defendants countering that a signal

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Rambus initially proposed, “a periodic signal, i.e. one that is continuously present and repeats at
regular intervals to provide timing information.” At the hearing, however, it suggested eliminating
the term “periodic” and instead adopting the phrase “that is continuously present and continuously
repeats,” as the table above reflects. Defendants would not agree to that proposal because it implies
that the signal must always be repeating.
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may be intermittently periodic, and yet still “continuously present.” In other words, the parties

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agree that, at least during operations, the clock signal must look like this:

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Disagreement arises, however, as to whether the signal must always repeat the pattern represented

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above, as Rambus urges, or may go “flat” at times, as defendants insist.
Neither side relies on the intrinsic record in support of their respective positions.4 Instead,

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both look to extrinsic sources of evidence for support. Rambus argues that the lay dictionary

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definition of “periodic” is “occurring, appearing, or recurring at regular intervals.” Webster’s New

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World Dictionary of American English 1004 (3d College Ed. 1988). It therefore maintains that a

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periodic signal is necessarily “repeat[ed] at regular intervals.” Rambus also reasons that if the signal

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is not continuously present, then it cannot possibly repeat at regular intervals, because the pattern

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would be disrupted by the absence of the signal.
Rambus notes that in another coordinated action in this District, the Court construed

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“external clock signal” to mean a “periodic signal from a source external to the device to provide

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timing information” without further glossing the word “periodic.”5 That decision, however,

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followed a stipulated construction in an earlier Hynix case. Hynix Semiconductor Inc. v. Rambus

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Inc. (“Hynix I”), No. C 00-20905, 2004 WL 2610012 at *20 (N.D. Cal. Nov. 15, 2004) (“The parties

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agree that ‘external clock signal’ should be construed as ‘a periodic signal from a source external to

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the device to provide timing information.’”). In the later, coordinated actions, the Court declined to

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adopt the alleged infringers’ position that the claimed external clock signal must be “continuous.” It

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did so recognizing that “[n]either side has developed this argument to the extent the court feels

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Although defendants invoke the ’916 patent’s specification to provide some general context and
suggest that the clock signal must be continuously present, that does not appear to be in dispute.
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Those cases are Rambus Inc. v. Hynix Semiconductor Inc., et al., No. C 05-0034 RMW (N.D.
Cal.), Rambus Inc. v. Samsung Electronics Co. Ltd., et al., No. C 05-02298 RMW (N.D. Cal.), and
Rambus Inc. v. Micron Technology, Inc., et al., No. C 06-00244 RMW (N.D. Cal.).
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comfortable determining whether an ‘external clock signal’ must be continuous.” Rambus Inc v.

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Hynix Semiconductor Inc., 569 F. Supp. 2d 946, 985 (N.D. Cal. 2008). Consequently, that decision

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is of little assistance.
Defendants here stress that the PTO rejected the position Rambus now urges in its

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reexamination of the Farmwald-Horowitz patents. Rambus Inc. v. NVIDIA Corp., Appeal No. 2012-

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000171, BPAI decision on Appeal at 7-8 (June 11, 2012). It held that the claimed clock signal must

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be continually present “during data inputs to synchronize data transfers,” not at all times. Id. at 8.

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Defendants also suggest that Rambus took an inconsistent position before the PTO in reexamination

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proceedings, stating that the clock signal “is a continuously present periodic signal,” suggesting that
a periodic signal is not, by its very nature, “continuously present.” (Exh. D to Cadkin Decl. in

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Supp. of Defs.’ Br. (Reex. App. No. 95/001,169, Decl. of Robert J. Murphy Under 37 C.F.R. §

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1.132 at 24 (Sep. 4, 2009))). Rambus responds that defendants have misread the submission to the

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PTO, and points to other deposition testimony from the same quoted expert suggesting that a

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periodic signal must be continuous whenever the device is turned on. (See Exh. B to Detre Decl.

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(Dep. of Robert J. Murphy, Apr. 25, 2005) at 127:9-24).
Neither side has identified any persuasive evidence to suggest how a person skilled in the art

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would understand the term “periodic,” or, more generally, “clock signal.” In the absence of some

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greater demonstration by plaintiff, it is not at all self-evident why a periodic signal must, by its

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nature, be continuously repeating and continuously present. Although Rambus suggests defendants

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have failed to respond to its argument that a discontinuous signal cannot repeat regularly, that is not

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entirely accurate. Defendants’ position is apparently that of the PTO. They reason a periodic signal

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may be intermittent, e.g., present during read or write operations, without being always present.

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Because neither the intrinsic nor extrinsic evidence indicates otherwise, defendants’ proposed

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constructions of “clock signal” and “external clock signal” are hereby adopted.

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No.
4.

Claim term
operation code

Rambus’s construction
one or more bits to specify a type
of action

Defendants’ construction
one or more control bits to
specify a type of action

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The parties largely agree on the appropriate construction of the fourth claim term, as well.

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Disagreement focuses solely on defendants’ inclusion of the phrase “control bits” (emphasis added).

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Rambus maintains “control bits” is not a term of art, and argues the concept of “control” is captured

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by the phrase, “to specify a type of action.” It notes its proposed construction is consistent with that

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adopted by the Court in the Hynix I litigation. See Hynix I, 2004 WL 2610012 at *13 (“Therefore,

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the court finds ‘operation code’ is properly construed as ‘one or more bits to specify a type of

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action.’”). Defendants respond that the modification of “bits” with “control” was not considered in

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the earlier case. They maintain there is agreement “operation code” refers to “control information,”

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not “address information” or “data.” See, e.g.,’916 patent. Col. 4:11-13 (a memory “device[]
receive[s] address and control information over the bus and transmits[s] or receive[s] requested data

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over the same bus” (emphasis added)); U.S. App. No. 09/796,206, Resp. to Office Action at 3 (Nov.

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26, 2001) (stating that “operation code” does not include “address information” and refers only to

13

“control information”). At argument, Rambus acknowledged operation code refers to “control

14

information,” but nonetheless insists its proposed construction adequately conveys that meaning by

15

stating the bits “specify a type of action.” Absent a debate as to whether one skilled in the art would

16

understand “operation code” denotes “control information,” then the construction should clearly

17

reflect that, for the benefit of the jury. Because Rambus appears to be correct that “control bits” is

18

not a term of art, the “bits of control information” is a superior formulation. Defendants do not

19

oppose that edit. Accordingly, the term shall be construed to mean “one or more bits of control

20

information to specify a type of action.”6

21
No.
5.

22
23
24
25

Claim term
precharge
information

Rambus’s construction
one or more bits indicating
whether the sense amplifiers
and/or bit lines (or portion of the
sense amplifiers and/or bit lines)
should be precharged

Defendants’ construction
ordinary, plain meaning; no
construction necessary
alternatively, information
denoting whether the sense
amplifiers and/or bit lines (or

26
6

27
28

At argument, the Court suggested a clarification that “bits” refers to “bits of information,” and the
parties did not object. Nonetheless, upon further reflection, it does not appear such elaboration is
necessary.
12
No. 10-05446 RS
No. 10-05449 RS
CLAIM CONSTRUCTION ORDER

portion of the sense amplifiers
and/or bit lines) should be
precharged

1
2
3

The parties’ disagreement as to “precharge information” turns, in the first instance, on

4

whether or not the term requires any construction. If Rambus prevails on that preliminary question,

5

the parties agree the function of precharge information is to determine “whether the sense amplifiers

6

and/or bit lines (or a portion of the sense amplifiers and/or bitlines) should be precharged,” and

7

disagree whether “information” should be construed to mean “one or more bits indicating…,” as

8

Rambus suggests, or “information denoting…,” as defendants submit.

9

On the initial question, defendants argue that because there is basic agreement as to the
function of the precharge information, there is no need to construe the term further. They suggest

11
For the Northern District of California

United States District Court

10

the parties agree precharge information is simply “information” related to the step of “precharging.”

12

That argument misses the point: it is not at all self-evident from a lay perspective what the meaning

13

of “precharge information” is, and furthermore, there is some disagreement between the parties as to

14

its precise meaning, as reflected in defendants’ position, extensively briefed, that “precharge

15

information” is not limited to “one or more bits” as Rambus insists. Rambus points out, however,

16

“[a] determination that a claim term ‘needs no construction’ or has the ‘plain and ordinary meaning’

17

may be inadequate when a term has more than one ‘ordinary’ meaning or when reliance on a term’s

18

‘ordinary’ meaning does not resolve the parties’ dispute.” O2 Micro Int’l Ltd. v. Beyond Innovation

19

Tech. Co., Ltd., 521 F.3d 1351, 1361 (Fed. Cir. 2008). Accordingly, the term cannot simply be left

20

for the jury, as is; it must be construed.

21

Turning to the parties’ proposed constructions, Rambus concedes defendants’ proposal is

22

“not necessarily incorrect,” but argues that to the extent their construction defines “information”

23

using the word “information,” it is circular and unhelpful. (Pl.’s Br. at 15:14-15). Rambus goes on

24

to point out that the specification uniformly refers to the precharge information as consisting of

25

some number of bits. For example the ’916 patent specifies that control information is sent to the

26

memory devices in “two 4 bit fields.” ’916 patent, col. 9:46-47. Rambus notes the parties agree the

27

4 bit fields of control information include an “AccessType” field that determines the “access mode,”

28

13
No. 10-05446 RS
No. 10-05449 RS
CLAIM CONSTRUCTION ORDER

1

or in other words, “whether the DRAM should precharge the sense amplifiers or save the contents of

2

the sense amps for a subsequent page access mode.” ’916 patent, col. 10:47-55. One particular bit

3

of the “AccessType” fields is specified to be the “precharge/save-data switch.” Id., col. 11:44.

4

In response, defendants concede, “certain claims [in the Farmwald-Horowitz family] require

5

‘precharge information’ to be represented as ‘one or more bits,’” (Defs.’ Br. at 13:15-16 (citing U.S.

6

Patent No. 6,564,281 (“the ’281 patent”), col. 25:25-27)), but proceed to insist that other claims use

7

the “broader” term “precharge information,” which may include “a binary bit.” (Id. at 13:20-25

8

(citing U.S. Patent No. 6,751,696 (“the ’696 patent”), col. 26:16-24)). The claims defendants rely

9

upon require the precharge information consist of a single bit or “includes a binary bit.”7 ’281
patent, col. 25:25-27 (“wherein the precharge information is encoded in the first bit of the operation

11
For the Northern District of California

United States District Court

10

code”); ’696 patent, col. 26:16-24 (“wherein the precharge information includes a binary bit”). It

12

does not follow, as defendants suggest, that the identified claims undermine Rambus’s position or

13

somehow imply the claim term must be interpreted more broadly than “one or more bits.” As

14

Rambus also points out, the parties similarly agree that precharge information is included in the

15

operation code, which is itself defined as “one or more bits of information,” consistent with the

16

Federal Circuit’s opinion in Infineon. 318 F.3d at 1093 (construing “read” and “write request[s]” as

17

“a series of bits…”).
Finally, Rambus emphasizes that the Court in Hynix I adopted the construction it urges.

18
19

While defendants note that, during earlier stages of the Hynix I litigation and the later, coordinated

20

actions, Rambus agreed with the Court that precharge information should be construed as

21

“information denoting whether the sense amplifiers and/or bit lines (or a portion of the sense

22

amplifiers and/or bit lines) should be precharged,” see, e.g., Hynix I, 2004 WL 2610012 at *14-15,

23

the Court in the coordinated actions subsequently revised the construction of “precharge

24

information” to conform exactly to the proposal Rambus advances now. See 569 F. Supp. 2d 946

25

(Appendix A). In view of the foregoing, Rambus has the stronger position on this question:

26
7

27
28

At the hearing, defendants noted they had identified a single, unasserted claim that did not describe
the precharge information in terms of bits. That evidence was not presented in the papers, and is of
marginal significance anyway, given that the claim is not at issue.
14
No. 10-05446 RS
No. 10-05449 RS
CLAIM CONSTRUCTION ORDER

1

“precharge information” is construed as “one or more bits indicating whether the sense amplifiers

2

and/or bit lines (or portion of the sense amplifiers and/or bit lines) should be precharged.”

3
No.
6.

4

Claim term
register

5
6
7

Rambus’s construction
a storage element or group of
storage elements not part of a
memory array that can store one
or more bits of information

Defendants’ construction
a storage element that can store
information

The parties agree that the claim term “register” refers to a “storage element” and the dispute

more broadly, information.8 With respect to the first issue, both parties claim the support of the

10

intrinsic evidence. Rambus primarily objects to defendants’ proposal on the grounds that it is so

11
For the Northern District of California

focuses on (1) whether it is separate from the memory array, and (2) whether it stores only bits or,

9

United States District Court

8

broad as to permit the conflation of the claimed register with the memory array’s cells. It notes the

12

title of the ’916 patent describes a “[m]emory device having a variable data output length and a

13

programmable register,” with the specification further elaborating: “[r]egisters are provided which

14

may store control information, device identification, device-type and other information appropriate

15

for the chip such as the address range for each independent portion of the device.” ’916 patent, col.

16

4:23-27. See also id. at col. 23:52-54 (“The DRAM memory array is divided into a number of

17

subarrays … Each subarray is divided into arrays [] of memory cells.”). If a register were no

18

different than a memory cell in the DRAM array, Rambus reasons, every “memory device” would

19

necessarily entail a multitude of programmable registers. That result is not supported by the

20

specification, which differentiates between the two elements, or by the state of the art. See, e.g.,

21

IEEE Standard Dictionary of Electrical and Electronics Terms 797 (5th ed. 1993) (defining

22

“memory cell” as “[t]he smallest subdivision of a memory into which a unit of data has been or can

23

be entered….”).

24
25
26
27
28

8

Defendants do not address Rambus’s inclusion of the phrase “… or group of storage elements…,”
and therefore may be deemed not to oppose that language. Because Rambus’s opening brief
adequately supports its contention that the register need not consist of a single storage element, this
aspect of its construction may be adopted.
15
No. 10-05446 RS
No. 10-05449 RS
CLAIM CONSTRUCTION ORDER

Defendants argue the specification of the ’916 patent is silent as to whether the register may

1
2

be included in the memory array, and emphasize that Figure 15 does not illustrate any registers at

3

all. They note the Farmwald-Horowitz patents claim “a ‘memory device’ which includes ‘an array

4

of memory cells,’ as well as separate ‘interface circuitry including an access-time register…’”

5

(Defs.’ Br. at 15:8-10 (citing U.S. Patent No. 5,841,580, col. 25:22-31)), and suggest those two

6

components are “separate and distinct parts of the memory device.” (Id. at 15:12-13 (citing U.S.

7

App. No. 10/973,268 at Claim 163)). That evidence appears to support Rambus’s position that the

8

registry should not be conflated with memory cells. Defendants also point out that a leading

9

technical dictionary defines a “register” as “[a] device capable of retaining information, often that
contained in a small subset (for example, one word), of the aggregate information in digital

11
For the Northern District of California

United States District Court

10

computer,” and while there are some similarities between the foregoing definition and the dictionary

12

definition of “memory cell” identified by Rambus, significantly, they are not the same. See IEEE

13

Dictionary of Electrical and Electronic Terms 808 (4th ed. 1988). Because neither the intrinsic nor

14

extrinsic evidence support the high level of generality urged by defendants, Rambus’ position must

15

prevail.9
Turning to the second issue, whether the register should be construed to “store one or more

16
17

bits of information,” or more generally, “store information,” Rambus argues the specification

18

supports its position that the information stored in the register may be included in “bytes” (e.g.,

19

eight bits) transmitted by the controller to a memory device. ’916 patent, col. 10:13-15; IEEE

20

Dictionary 118 (1988) (defining “byte” as a “binary string operated on as a unit and usually eight

21

bits long”). Defendants, on the other hand, insist certain claims in the Farmwald-Horowitz require

22

the register to store other types of “information.” See, e.g., U.S. Patent No. 5,983,320 (“the ’320

23

patent”), col. 26:15-27; ’916 patent, col. 6:34-37 (“device identification (device ID) register [], a

24

device-type descriptor register [] control registers [] and other registers containing other information

25

relevant to that type of device”). While defendants’ position is not necessarily incorrect,

26

significantly, they do not suggest such “information” takes the form of something other than bits.

27
9

28

That result comports, again, with the stipulation of the parties in the coordinated Hynix II actions.
16
No. 10-05446 RS
No. 10-05449 RS
CLAIM CONSTRUCTION ORDER

1

The weight of the record demonstrates that, in this context, “information” denotes, more

2

specifically, “one or more bits.” That appears to be how one skilled in the art would understand

3

references to “information.” Accordingly, Rambus’s construction of “register” is hereby adopted.

4
No.
7.

5

Claim term
representative of

Rambus’s construction
indicates

6

Defendants’ construction
ordinary, plain meaning; no
construction required

The seventh claim term, “representative of,” appears in a variety of contexts. See, e.g., ’916

7
8

patent, col. 26:3-5 (“…wherein the value is representative of a number of cycles of an external clock

9

signal…” (emphasis added)). Rambus favors construing the term as meaning “indicates” because it
fears defendants may argue, at a later stage of litigation, that any relationship between two values

11
For the Northern District of California

United States District Court

10

means one is “representative of” the other, in service of the position that Rambus’s patents are

12

anticipated by prior art, an argument asserted in other litigation on the Farmwald-Horowitz patents.

13

It maintains a possible, future dispute over anticipation confirms there is a live disagreement

14

between the parties as to the meaning of “representative of,” and again invokes O2 Micro to demand

15

a construction of the term. See 521 F.3d at 1361.
Of course, potential legal defenses do not have any bearing on the proper construction of the

16
17

asserted claims, and as defendants rightly point out, Rambus has failed to adduce any evidence to

18

suggest that “representative of” has a peculiar meaning, either within the context of the Farmwald-

19

Horowitz patents or to persons skilled in the art. To the extent the Hynix I Court substituted

20

“indicates” for “representative of” in the course of construing various other claim terms, that does

21

not imply, as Rambus suggests, any need to construe the prepositional phrase here.10 Thus, while

22

there may be a dispute to the extent Rambus requests a specific lay meaning of the term, and

23

defendants insist no specificity is required, there is no cognizable legal basis or compelling evidence

24

in the record to support Rambus’s position. Again, a possible anticipation defense in later

25

10

26
27
28

Of course, Rambus is free to advance arguments directed to the merits at the appropriate stage of
proceedings. It may not, however, rely on language extracted from other cases in support of its
proposed construction, without acknowledging the highly context-specific nature of such holdings.
See, e.g., Tehrani v. Hamilton Med., Inc., 331 F.3d 1355, 1361 (Fed. Cir. 2003) (“the statement that
one item ‘represents’ another cannot be interpreted so broadly as to include any case in which the
two items are related in some way”).
17
No. 10-05446 RS
No. 10-05449 RS
CLAIM CONSTRUCTION ORDER

1

proceedings does not mandate a particular construction of a term, absent evidence of what the term

2

ought to mean in light of the claims. Those circumstances distinguish the present case from O2

3

Micro, 521 F.3d at 1361, which concerned a substantive dispute about the meaning of “only if”

4

within the specific context of the claims. Here, no such dispute is apparent, and “representative of”

5

may be equated with the plain, ordinary meaning of the term as it reads in the claims, with no need

6

for further construction.

7
No.
8.

8
9

11
For the Northern District of California

United States District Court

10

Claim term
sample/sampled/
sampling

Rambus’s construction
obtain(s) at one or more discrete
points in time/obtained at one or
more discrete points in
time/obtaining at one or more
discrete points in time

Defendants’ construction
capture(s)/captured/capturing

Again, both parties insist their proposed constructions for “sample” and variants thereof find

12
13

support in the intrinsic record. Rambus maintains its proposed construction is consistent with the

14

specification, the Court’s construction in the coordinated Hynix II actions, and the ordinary meaning

15

of the term. The specification employs the concept of sampling, often in verb form, to describe, for

16

example, “clocked receivers” that “sample” input signals.” ’916 patent, cols. 21:61-62, 23:12-14

17

(“input receivers [] sample the bus clocks just as they transition”), and 22:45 (reference to “sample

18

period”). In Hynix II, the Court construed “‘sample’ to mean ‘to obtain at a discrete point in time,’

19

‘samples’ as ‘obtains at discrete points in time,’ and ‘sampling’ as ‘obtaining at discrete points in

20

time.’” Hynix II, 569 F. Supp. 2d at 988. Rambus offers only a slight variation on that framework,

21

to clarify that sampling may occur at “one or more” times,11 but not continuously, as it believes

22

defendants’ preferred construction implies. The construction adopted in Hynix II also derived some

23

support from the IEEE Dictionary’s definition of the term “sampling data,” that is, “[d]ata in which

24

the information content can be, or is, ascertained only at discrete intervals of time.” IEEE

25

Dictionary 855 (1988) (emphasis added). Defendants argue Rambus’s opponents in Hynix II failed

26
11

27
28

Defendants, for their part, do not directly address this addition to the construction adopted in
Hynix II. Rambus is generally correct, however, that the Hynix II Court’s construction of the term
contemplates – or at least, does not foreclose – sampling at “one or more” points.
18
No. 10-05446 RS
No. 10-05449 RS
CLAIM CONSTRUCTION ORDER

1

to present intrinsic evidence to suggest that the term “sampling” has a meaning distinct from its

2

ordinary and plain sense, and contend they have done so here.

3

Defendants also make much of the fact that Rambus concedes “‘sampling’ does involve

4

capturing values of a signal,” and, apparently in other proceedings, has interpreted the term

5

“sampling” as referring to “captu[ring] data on the bus.” (Defs. Br. at 17:25-27); (Exh. U to Cadkin

6

Decl. at 33). Defendants also note that an Administrative Law Judge of the International Trade

7

Commission (ITC), in the context of construing asserted claims from another group of Rambus

8

patents (the Barth family), characterized “sampling” of data in a write operation as meaning

9

“capture[] data off the data bus.” In the Matter of Certain Semiconductor Chips and Prods.
Containing the Same, Initial Determination on Violation of Section 337, Inv. No. 337-TA-753, at

11
For the Northern District of California

United States District Court

10

234 (Mar. 2, 2012) (“the strobe signal ‘initiates sampling’ of data by the memory device such that

12

the memory device captures valid data received from the memory controller via the data bus”).

13

Such collateral matters, while arguably of some relevance and persuasive weight, are hardly

14

dispositive here. More fundamentally, the difference between “capture” and “obtain” is not so

15

great, and of somewhat marginal significance from Rambus’s point of view.

16

Ultimately, the more significant disagreement between the parties is limited to the frequency

17

and duration of the claimed sampling. On that question, Rambus urges sampling “is well

18

understood in the art to refer to capturing those values only at points in time, rather than, for

19

example, continuously.” (Pl.’s Br. at 19:26-28). Unlike Hynix II, defendants in this case have

20

identified some intrinsic evidence to suggest the duration and frequency of the sampling procedure

21

may vary, but that is consistent with the ordinary sense of the word, which implies nothing about the

22

required frequency or length of time data must be obtained. Moreover, defendants have not

23

identified any intrinsic evidence to suggest the claimed sampling may occur continuously – a notion

24

that does not comport with the technical or ordinary definition of the word.

25

Rambus maintains the specification’s reference to “sample period” and “sampl[ing] the bus

26

clocks just as they transition” (emphasis added), necessarily implies “discrete points of time” rather

27

than continuous “capturing.” ’916 patent, cols. 22:45, 23:12-14. As noted above, that concept is

28

19
No. 10-05446 RS
No. 10-05449 RS
CLAIM CONSTRUCTION ORDER

insist Rambus’s construction is ambiguous. For example, they ask: is a “discrete” point in time

3

instantaneous? Addressing this apparent ambiguity in the record, Rambus answers a “point in time”

4

is basically instantaneous, but insists the patents’ references to “sample period[s]” indicate that there

5

is a period of time during which sampling may occur (for example, half of a clock signal), not a

6

duration during which continuous sampling occurs. See id., col. 22:45. Along somewhat similar

7

lines, defendants also correctly note the Farmwald-Horowitz patents describe sampling as occurring

8

at various frequencies. See, e.g., U.S. Patent No. 6,304,937, col. 24:65-67 (“sampling the first

9

portion of data synchronously with respect to a rising edge transition of an external clock signal”).

10

It is not apparent, however, why the term “sample” and variants thereof must necessarily be limited

11
For the Northern District of California

also supported by the 1988 IEEE Dictionary definition of “sampling data.” In reply, defendants

2

United States District Court

1

to a particular frequency or duration, as defendants seem to imply. That understanding is not what

12

Rambus urges, and does not appear to be the common understanding of those skilled in the art. As

13

best as can be discerned, defendants so argue merely to cast doubt on the definiteness of Rambus’s

14

proposed construction. In any case, the ambiguity identified by defendants may be eliminated by

15

simply replacing “discrete” with “known,” which accords the limitation the flexibility it requires.

16

Accordingly, consistent with Hynix II, and for all the reasons set forth above, Rambus’s proposed

17

construction shall be adopted. “Sample” means “obtain(s) at one or more known points in time.”

18
19
20
21
22
23
24
25
26
27
28

No.
9.

Claim term
synchronous
dynamic random
access memory
device

Rambus’s construction
an integrated circuit device in
which information can be stored
and retrieved electronically, not
including a memory controller,
that receives an external clock
signal which governs the timing
of the response to a read request,
write request, or operation code
and includes one or more arrays
of DRAM cells

Defendants’ construction
a memory device in which an
external clock signal is used to
regulate the timing of device
operations

The principal disputes between the parties regarding “synchronous dynamic random access
memory device” (“synchronous DRAM device”) are: (1) whether a synchronous DRAM device
20
No. 10-05446 RS
No. 10-05449 RS
CLAIM CONSTRUCTION ORDER

1

must be an integrated circuit device, i.e., a single chip device, (2) whether a synchronous DRAM

2

device may include a memory controller, (3) what the requirement a device be “synchronous”

3

entails, and (4) whether it is necessary to specify a synchronous DRAM device includes “one or

4

more arrays of DRAM cells.” As an initial matter, it is important to note that synchronous DRAM

5

device does not actually appear in the specification of the asserted patents and only some of the

6

asserted claims.
On the first question, as noted above, and as Rambus’s reply brief candidly acknowledges in

7
8

a footnote, the Federal Circuit’s recent reexamination opinion, In re Rambus, 2012 WL3329675 at

9

*4-6, squarely rejected Rambus’s argument that term “synchronous memory device” is limited by
the Farmwald-Horowitz patents, and in particular by the ’918 patent, to single chip devices.

11
For the Northern District of California

United States District Court

10

Nonetheless, Rambus advances virtually the same argument here in connection with the term

12

synchronous DRAM device. As the Court of Appeals explained in In re Rambus:
This court agrees with the Board that the specification does not restrict the invention
to single chip memory devices. There are no words of manifest exclusion or clear
disavowals of multichip devices—there are only preferred embodiments and goals of
the invention that Rambus argues are better met by single chip devices. The
specification language Rambus cites shows only that the invention can be carried out
with a single chip memory device, it does not require the invention to be so
performed.

13
14
15
16
17
18
19
20

Id. at *4. Rambus seeks to limit the impact of In re Rambus on these actions by emphasizing that
the former claim construction opinion pertains to the term “memory device,” rather than
synchronous DRAM device. While that is true, the Federal Circuit’s logic is highly relevant and,
ultimately, also applicable here, for the reasons set forth below.

21
22
23

In its opening claim construction brief, Rambus argues – much as it did before the Federal
Circuit in In re Rambus – that the language and figures in the ’916 patent refer to “DRAM chips”
and illustrate “DRAM devices” as single chips.12 See, e.g.,’916 patent, col. 3:43-45, and Figs. 1, 2,

24
12

25
26
27
28

To the extent Rambus seeks to distinguish In re Rambus on the grounds that it construed
“memory device” rather than the narrower term, “synchronous DRAM device,” the effort fails,
given that before the Federal Circuit’s order was issued, it took the position In re Rambus would
“determine whether a memory device, and therefore a synchronous dynamic random access memory
device, may or may not include a memory controller, and will be binding here.” See Pl.’s Br. at
22:18-21. Rambus’s simultaneous reliance on intrinsic evidence concerning the term “DRAM
device,” another partial variant of the term to be construed here, also appears conveniently selective
21
No. 10-05446 RS
No. 10-05449 RS
CLAIM CONSTRUCTION ORDER

1

3, 9, 15. The fact that the Farmwald-Horowitz specifications describe single chip devices as DRAM

2

devices does not, however, compel the converse conclusion that the term “synchronous DRAM

3

device” must be construed as encompassing only single chip devices. Without “manifest exclusion

4

or clear disavowals,” such a limitation may not be imported from the specification into the claims.

5

In re Rambus, 2012 WL3329675 at *4. While Rambus seeks to characterize the BPAI’s decision

6

below in In re Rambus as helpful, that opinion is of very limited assistance to it. See BPAI Decision

7

on Appeal, Appeal 2010-011178, at 29 (“As the Examiner further noted, Appellant directed at least

8

one claim more narrowly to a ‘memory (DRAM) device in claim 3 of U.S. 5,841,715, thereby

9

implying a memory device is broader than a chip.”).
Notably, the Federal Circuit’s opinion in In re Rambus comports with the District Court’s

11
For the Northern District of California

United States District Court

10

holding in Hynix II. In Hynix I, construing the term “synchronous memory device,” the District

12

Court accepted the parties’ stipulated construction of “memory device” as “an integrated circuit

13

device in which information can be stored and retrieved electronically,” and focused instead on the

14

disputed meaning of the modifier “synchronous.” 2004 WL 2610012 at *6-8. In Hynix II, the Court

15

had occasion to revisit the meaning of “memory device” to resolve “whether a ‘memory device’

16

incorporates the definition of an “integrated circuit device,” and with it, the single chip limitation

17

from Infineon.” Like the Federal Circuit in In re Rambus, the District Court ultimately concluded:

18

“[b]ecause the specification does not clearly limit the scope of the invention to a single chip, the

19

court declines to read the phrase ‘memory device’ so narrowly. … A ‘memory device’ is ‘a device

20

in which information can be stored and retrieved electronically.’ It need not be on a single chip.”

21

569 F. Supp. 2d at 973. Rambus seeks to limit all these unfavorable rulings as construing different

22

claim terms, but see supra note 12, and instead emphasizes the passing observation of the District

23

Court in Hynix II, that claims directed to “a method of operation of a synchronous dynamic random

24

access memory device” apparently reflect “limits on the scope of ‘memory device’ …

25

demonstrating that Rambus knew how to limit its claims to a single chip when it wished to do so.”

26

Id. at 974. That passage is of limited import: “synchronous DRAM device” was not construed in

27

and fundamentally inconsistent with its position that “synchronous DRAM device” must be
understood entirely distinctly.
22

28

No. 10-05446 RS
No. 10-05449 RS
CLAIM CONSTRUCTION ORDER

1

Hynix II, and other than the quoted passage, the opinion does not explain how the foregoing

2

conclusion was drawn.

3

Defendants on the other hand, stress Rambus has taken supposedly inconsistent positions in

synchronous semiconductor device which includes one or more arrays of DRAM cells,” or “a

6

dynamic random access memory device that receives an external clock signal which governs the

7

timing of a response to the transaction request.” (Defs.’ Br. at 20 n.16). Defendants also advance

8

an argument they raised in connection with the term “controller/controller device,” above: that is,

9

had Rambus acted as its own lexicographer to limit expressly the claim term “synchronous DRAM

10

device” to one which is “formed on a single semiconductor substrate” or consists of an “integrated

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For the Northern District of California

the course of litigating its many cases, variously construing “synchronous DRAM device” as “a

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United States District Court

4

circuit device,” its proposed construction might be supportable. It has not done so, of course. See

12

also In re Rambus, 2012 WL 3329675 at *5 (“memory devices ‘formed on a single semiconductor

13

substrate’ are properly limited to single chip devices”).

14

Ultimately, then, on this first question, defendants must prevail. The intrinsic record does

15

not support limitation of “synchronous DRAM device” to an integrated circuit device. First, the

16

claims do not suggest any such thing. As the Federal Circuit and Hynix II observed, Rambus

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certainly knew how to claim a single-chip device and did not employ language in drafting its claims

18

indicating such intention. Second, the specification does not contain a clear disavowal of multi-chip

19

devices sufficient to support such a narrowing of Rambus’s claims. See In re Rambus, 2012

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WL3329675 at *4 (“There are no words of manifest exclusion or clear disavowals of multichip

21

devices—there are only preferred embodiments and goals of the invention that Rambus argues are

22

better met by single chip devices.”). Consistent with the logic employed by other Courts, here,

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Rambus’s suggestion that “synchronous DRAM device” must be “an integrated circuit device” must

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be rejected.

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The next point of disagreement concerns whether or not a synchronous DRAM device may

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include a memory controller. In re Rambus sheds some light on that question, as well, if only,

27

again, indirectly. Before the BPAI and the Federal Circuit, Rambus categorically argued the term

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“memory device cannot include a memory controller,” id. at *7, a position both the agency and the

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Court rejected:

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4
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Rambus’s construction broadly excluding any memory controller that provides more
functionality than simple control logic fails. … In fact, the claims [of the ’918 patent]
expressly calls for the memory device to provide the control functionality of receiving
block size requests and outputting specific amounts of data. Nothing in the claim
prevents the memory device from consisting of a storage chip and a device that
facilitates the receiving and outputting from that storage chip.

7

Id. The Court then went on to hold that a “memory device,” as the term is used in the Farmwald-

8

Horowitz patents, “may have a controller that, at least, provides the logic necessary to receive and

9

output specific data, but does not perform the control function of a CPU or bus controller.” Id.
Rambus’s opening claim construction brief conceded the Federal Circuit’s opinion would

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control this issue. (See Pl.’s Br. at 22:18-21). In light of the result reached by the Court of Appeals,

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Rambus now insists CPUs and bus controllers may not be included in a synchronous DRAM device.

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Defendants also rely on In re Rambus, but contend a “memory controller” indeed “provides the

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logic necessary to receive and output specific data,” and therefore may be included in the

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synchronous DRAM device. Consistent with both parties’ views, the term may be construed in

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accordance with the Federal Circuit’s opinion to specify a “synchronous DRAM device” “may have

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a controller that provides the logic necessary to receive and output specific data, but does not

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perform the control function of a CPU or bus controller.”

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Turning to the third point of contention, the parties agree a synchronous DRAM device must

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use an external clock for timing purposes, but disagree as to how that component of the device

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should be described. Rambus proposes “device … that receives an external clock signal which

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governs the timing of the response to a read request, write request, or operation code,” whereas

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defendants submit, more simply, “device in which an external clock signal is used to regulate the

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timing of device operations.” Rambus attacks defendants’ suggestion as vague as to whether, for

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example, all operations are regulated by the clock, or if not, which ones. Rambus rightly points out

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defendants’ construction leaves it unclear how the device uses the clock signal to regulate the timing

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of operations if it is not “received.” Finally, Rambus also claims the support of the Hynix I claim

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construction, which construed “synchronous memory device” as “a memory device that receives an

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external clock signal which governs the timing of the response to a transaction request.” 2004 WL

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2610012 at *6-8. In its proposed construction, Rambus has substituted “a read request, write

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request, or operation code” in place of “transaction request,” because the latter term is not included

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in any of the asserted claims in this case.

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Defendants respond that a construction requiring the synchronous DRAM device to receive a

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clock signal will render some claim language superfluous. See, e.g., U.S. Patent No. 6,324,120, col.

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26:30-34 (claiming a “method of operation of a synchronous dynamic random access memory

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device[,] … the memory device comprising: clock circuitry to receive an external clock signal”),
and ’696 patent, col. 24:58-61 (reciting a “synchronous memory device … [which] comprises: clock

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For the Northern District of California

United States District Court

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circuitry to receive an external clock signal”). There does not appear to be much dispute, then, as a

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substantive matter, that the claims invoke reception of the clock signal. The transitional phrase

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“comprising,” however, suggests the synchronous DRAM device includes “circuitry to receive an

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external clock signal,” precisely as Rambus suggests.13 Although defendants also insist Rambus

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has, in other proceedings, generally supported their suggestion the clock signal is used to regulate

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the timing of device operations, that advocacy, is not strictly inconsistent with the position it urges

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here.

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Finally, defendants argue Rambus’s construction of a synchronous DRAM device as

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“includ[ing] one or more arrays of DRAM cells” is redundant and unhelpful, given that there is no

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disagreement a synchronous DRAM device is a variant of a DRAM device and must include one or

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more DRAM memory arrays. Rambus does not directly dispute that fair point. Accordingly, the

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term “synchronous DRAM device” is construed as “a memory device in which information can be

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stored and retrieved electronically, and which uses an external clock signal to regulate the timing of

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device operations. It may have a controller that provides the logic necessary to receive and output

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specific data, but does not perform the control function of a CPU or bus controller.”

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13

As Rambus also points out, the “clock circuitry” limitation is an antecedent to other claims, and
therefore actually not redundant.
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2
3

No.
10.

Claim term
synchronously
with respect to

Rambus’s construction
having a known timing
relationship with respect to

Defendants’ construction
operating in step (or in phase)
with respect to

The parties’ disagreement as to the appropriate construction of the final term is limited to the

relationship…,” and defendants submitting, alternatively, “operating in step (or in phase)….” As an

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initial matter, the parties debate the implications of defendants’ proposed construction. Rambus

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maintains the phrase “or in phase” suggests the timing of operations must be in phase with the

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clock, as “in phase” is offered as synonymous with “in step.” Defendants responded that is not so,

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given the conjunction “or,” and at the hearing, offered to eliminate the parentheses in their proposed

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construction to memorialize such understanding. In any case, the larger question is whether or not

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For the Northern District of California

meaning of “synchronously,” with Rambus insisting it means “having a known timing

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United States District Court

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such a specific construction of the root “synchronous” is appropriate, given Rambus’s much more

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general construction, “having a known timing relationship….”

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The parties dispute the significance of the intrinsic record. Rambus argues Figure 13 of the

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’916 patent makes clear the delay line output signals designated 107 and 108, which are

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“synchronized with the two bus clocks,” are not “in phase” with them, but are instead “phase-

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shifted” so that the outputs are timed to correspond to the rising and falling edges of the second bus

17

clock. ’916 patent, col. 23:14-22. Defendants reply Rambus has misrepresented the function of the

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output signals, because Figure 13 represents the timing diagram for “how the internal device clock

19

is generated from two bus clock signals using a set of adjustable delay lines.” ’916 patent, col. 5:19-

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21. Defendants insist it is the internal device clock which must ultimately be synchronized with the

21

bus clocks to facilitate read and write operations. Id., col. 23:13-24. While that may be the broader

22

point of the alleged invention, the term “synchronized” is used in both contexts, in broader fashion,

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and in contravention of defendants’ understanding of the term.

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Defendants also maintain the file history supports their view of the term. Specifically, they

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argue Rambus responded to the PTO’s rejection of claims that required “providing a first portion of

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the first amount of data to the memory device synchronously with respect to a first transition of an

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external clock signal,” by arguing the claimed operation was “synchronous,” in the sense that data

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was provided “synchronously with respect to falling edges of the true and complement internal

2

device clocks….” U.S. App. Ser. No. 09/510,213, Response to Office Action at 3 (Aug. 31, 2000).

3

Defendants insist this reflects an understanding of “synchronously” as something more than “a

4

known timing relationship,” but rather something closer to “in step.” Defendants’ position is

5

unpersuasive. Rambus’s argument to the PTO does not circumscribe the meaning of “synchronize;”

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it merely limits the timing relationship with respect to that particular limitation.

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Ultimately, it is clear the term is used to describe a variety of timing relationships in the

8

Farmwald-Horowitz patents. It would therefore be inappropriate to limit the term as defendants

9

suggest, without unambiguous support from the specification. Both parties invoke various
definitions found in technical dictionaries, but those do not suggest persons skilled in the art have a

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For the Northern District of California

United States District Court

10

consistent understanding of the term distinct from the plain and ordinary meaning. See, e.g., IEEE

12

Dictionary 978 (1988) (defining “synchronization” as requiring “fixed phase relationship”);

13

Illustrated Dictionary of Electronics 537 (4th ed. 1998) (defining “synchronous” as “condition of

14

operating in step (phase) with some reference”). Nonetheless, given the parties’ apparent

15

disagreement as to the meaning of the term, some construction is required. O2 Micro, 521 F.3d at

16

1361.
While the parties raise additional arguments, they shed no further light on the issue.14

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18

Accordingly, Rambus’s construction shall be adopted: “synchronously with respect to” means

19

“having a known timing relationship with respect to.”

20

V. CONCLUSION

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The disputed claim terms of the patents-in-suit are hereby construed as set forth above.

22

Where the order has identified terms that may require further construction, such matters shall be

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Yet another quarrel arises as to whether defendants’ construction permits any margin of error,
with Rambus arguing that it does not, contrary to the reasonable expectations of one skilled in the
art, and defendants insisting that their construction simply minimizes the imprecision or “skew,”
consistent with the specification. ’916 patent, cols. 19:4-9, 23:37-39. There being no real and
discernible disagreement on this point, it need not be resolved.
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presented, if it becomes necessary, in the context of any dispositive motions or at the time of

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formulating jury instructions.

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IT IS SO ORDERED.

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Dated: 9/26/12
RICHARD SEEBORG
UNITED STATES DISTRICT JUDGE

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