Synopsys, Inc. v. Atoptech, Inc

Filing 507

ORDER CONSTRUING CLAIMS. Signed by Judge Maxine M. Chesney on January 19, 2016. (mmclc2, COURT STAFF) (Filed on 1/19/2016)

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1 2 3 4 5 6 7 8 9 IN THE UNITED STATES DISTRICT COURT For the Northern District of California United States District Court 10 FOR THE NORTHERN DISTRICT OF CALIFORNIA 11 12 SYNOPSYS, INC., No. C-13-2965 MMC 13 Plaintiff, ORDER CONSTRUING CLAIMS 14 v. 15 ATOPTECH, INC., 16 Defendant. 17 / 18 19 Before the Court is the parties’ dispute regarding the proper construction of ten 20 terms in four patents, specifically, U.S. Patent No. 6,567,967 (“‘967 Patent”), U.S. Patent 21 No. 6,507,941 (“‘941 Patent”), U.S. Patent No. 6,237,127 (“‘127 Patent”), and U.S. Patent 22 No. 6,405,348 (“‘348 Patent”). The matter came on regularly for hearing on November 30, 23 2015. Patrick T. Michael and Krista S. Schwartz of Jones Day appeared on behalf of 24 Synopsys, Inc. (“Synopsys”). Philip W. Marsh and Willow Noonan of Arnold & Porter LLP 25 appeared on behalf of ATopTech, Inc. (“ATopTech”). At the hearing, the Court afforded the 26 parties leave to file supplemental briefing, upon receipt of which the Court took the matter 27 under submission. 28 Having considered the parties’ written submissions, and the arguments of counsel at 1 2 the hearing, the Court rules as follows. 3 1. “Block”/“Blocks” (Claims 1, 5, 7, 10, 32-36 of the ‘967 Patent) Synopsys contends the term “block”/“blocks” should be given its “plain and ordinary 4 5 meaning” and, consequently, that no construction is required.1 ATopTech proposes the 6 term be construed as “a small portion of a design, above the cell level, that is designed 7 and/or laid out separately comprising cells.” The Court, for the reasons stated by ATopTech,2 construes the term “block”/“blocks” 8 9 as “a portion of a design that is designed and/or laid out separately and comprising one or 10 more cells.” For the reasons stated by Synopsys, the Court’s construction omits the word 11 “small” and the phrase “above the cell level.” 12 2. “Subgrid”/“Subgrids” (Claims 1, 17, 21, 26 of the ‘941 Patent) Although the parties, in their Joint Claim Construction and Prehearing Statement, 13 14 proposed differing constructions for the term “subgrid”/“subgrids,” the parties agreed at the 15 hearing, and the Court finds, “subgrid”/“subgrids” is properly construed as “a finer resolution 16 grid.” 17 3. 18 “Tag” (Claim 1 of the ‘127 Patent) Synopsys contends the term “tag” should be given its “plain and ordinary meaning” 19 and, consequently, that no construction is required. ATopTech proposes the term be 20 construed as “a data structure pointed to by an RF timing table which has two parts: i) a 21 first part which is loaded with a unique identifier for the clock driving the flip flop for which 22 the RF timing table was created, and ii) a second part which can contain a variety of 23 labels.” 24 1 25 26 Unless otherwise stated, the parties’ respective constructions as set forth herein are taken from their “Joint Claim Construction and Prehearing Statement Under Patent Local Rule 4-3,” filed August 31, 2015. 2 27 28 Reference herein to a party’s “reasons” includes, unless otherwise stated, the reasons provided in said party’s written submissions and by counsel for said party at the hearing. 2 The Court, for the reasons stated by ATopTech, construes the term “tag” as “a data 1 2 structure pointed to by an RF timing table which has two parts: i) a first part which is loaded 3 with a unique identifier for the clock driving the flip flop for which the RF timing table was 4 created, and ii) a second part which can contain a variety of labels.” To the extent Synopsys argued at the hearing that the term is broad enough to 5 6 encompass circuit elements other than flip flops, the Court is not persuaded. See ‘127 7 Patent, at 2:1-4 (explaining “[t]he static timing analysis of the present invention is performed 8 upon units of the circuit . . . which comprise a set of ‘launch’ flip flops, non-cyclic 9 combinational circuitry and a set of ‘capture’ flip flops”). 10 4. “Timing table” (Claims 1, 4 of the ‘127 Patent) Synopsys contends the term “timing table” should be given its “plain and ordinary 11 12 meaning” and, consequently, that no construction is required. ATopTech proposes the 13 term be construed as “a table comprised of the following four values: minimum rise time 14 (minRT), maximum rise time (maxRT), minimum fall time (minFT) and maximum fall time 15 (maxFT); and having its own tag.” The Court, for the reasons stated by ATopTech, construes the term “timing table” as 16 17 “a table comprised of the following four values: minimum rise time (minRT), maximum rise 18 time (maxRT), minimum fall time (minFT) and maximum fall time (maxFT); and having its 19 own tag.” 20 5. “A bump-envelope waveform” (Claims 1, 8, 15, 22 of the ‘348 Patent) 21 Synopsys proposes the term “bump-envelope waveform” be construed as “a 22 waveform encapsulating a response of the primary net.” ATopTech proposes the term be 23 construed as “the waveform obtained by stretching a bump-like waveform for the size of the 24 aggressor switching window where ‘bump-like waveform’ is ‘a waveform of the voltage 25 fluctuation on the output of the primary net caused by switching of the input of the 26 aggressor net.’” 27 28 3 The Court construes the term “bump-envelope waveform” as “a waveform 1 2 encompassing, for the size of the aggressor timing window, the responses of a primary net 3 caused by the switching of the input of an aggressor net.” In adopting the above construction, the Court considered both parties’ proposals 4 5 and, while the Court agrees with ATopTech that Synopsys’s definition is too general to be 6 meaningful, the Court also agrees with Synopsys that the claim is not limited to the 7 embodiment on which ATopTech’s construction is based. 8 6. 9 “Means for identifying a cross-coupled circuit contained within said netlist, wherein said cross-coupled circuit includes a primary net and an aggressor net” (Claim 15 of the ‘348 Patent) The parties agree that the term should be construed as a means-plus-function 10 11 limitation pursuant to 35 U.S.C. § 112(f), and that the function is “identifying a cross- 12 coupled circuit contained within said netlist, wherein said cross-coupled circuit includes a 13 primary net and an aggressor net.” Synopsys’s proposed structure is a “general purpose 14 computer system 112 configured to identify primary and aggressor nets of a cross-coupled 15 circuit model of an interconnect stage based on primary/aggressor grouping information 16 created based on coupling capacitor connectivity, and equivalents thereof.” ATopTech 17 contends the term is indefinite and, in the alternative, proposes as the structure a 18 “computer program static timing analysis tool capable of reading a netlist in Verilog, VHDL, 19 Epic, or SPICE formats, and capable of reading parasitic component lists in DSPF, SPEF 20 or SPICE formats.” The Court, for the reasons stated by ATopTech in its supplemental brief, finds the 21 22 term is indefinite. 23 7. “First simulation means for generating a primary waveform of said crosscoupled circuit” (Claims 15, 19 of the ‘348 Patent) 24 The parties agree that the term should be construed as a means-plus-function 25 limitation pursuant to 35 U.S.C. § 112(f), and that the function is “generating a primary 26 waveform of said cross-coupled circuit.” Synopsys’s proposed structure is a “general 27 purpose computer system 112 configured to generate a primary waveform by applying a 28 4 1 single switching input to a primary net without switching the input of the aggressor net.” 2 ATopTech’s proposed structure is a “circuit simulation program that applies a single 3 switching input to a primary net without switching the input of a cross-coupled aggressor 4 net to cause the primary waveform to be output.” The Court construes the structure as “a static timing analysis program configured to 5 6 generate a primary waveform by applying a single switching input to a primary net without 7 switching the input of the aggressor net.” At the hearing, the parties agreed on the phrase “static timing analysis program,” 8 9 and, with two exceptions, essentially agreed on the balance of the Court’s construction. As 10 to the two points of disagreement, specifically, ATopTech’s proposal to further specify the 11 aggressor net and method of generating the waveform, the Court, for the reasons stated by 12 Synopsys, finds such limitations are not appropriate. 13 8. “Second simulation means for generating a bump-envelope waveform of said cross-coupled circuit” (Claim 15 of the ‘348 Patent) 14 The parties agree that the term should be construed as a means-plus-function 15 limitation pursuant to 35 U.S.C. § 112(f), and that the function is “generating a bump16 envelope waveform of said cross-coupled circuit.” Synopsys’s proposed structure is a 17 “general purpose computer system 112 configured to generate responses of the primary 18 net caused by switching of the input of an aggressor net and encapsulating the waveform 19 response to form a bump-envelope waveform, and equivalents thereof.” ATopTech 20 contends the term is indefinite and, in the alternative, proposes as the structure a “circuit 21 simulation program that generates a bump-like waveform by switching the input of the 22 aggressor net, and stretches the bump-like waveform for the size of a switching window 23 that corresponds to switching an input on an aggressor net.” 24 The Court construes the structure as “a static timing analysis program that 25 generates a bump-like waveform by switching the input of the aggressor net, and stretches 26 the bump-like waveform for the size of a switching window that corresponds to switching 27 the input of the aggressor net.” 28 5 Contrary to ATopTech’s argument, the Court, for the reasons stated by Synopsys, 1 2 finds the term is not indefinite, and, at the hearing, the parties, in the event of such finding, 3 agreed upon the phrase “static timing analysis program.” With respect to the remainder of 4 the construction, the Court, for the reasons stated by ATopTech, adopts, in essence, 5 ATopTech’s alternative construction. See ‘348 Patent, at 11:32-57 (describing generation 6 of bump-envelope waveform by first generating “bump-like waveform on the primary net by 7 switching the input of the aggressor net,” and then “stretching the bump-like waveform . . . 8 for the size of the switching window”); 35 U.S.C. § 112(f) (providing means-plus-function 9 term “shall be construed to cover the corresponding structure, material, or acts described in 10 the specification”). 11 9. “First calculation means for determining a threshold voltage crossing point of said composite waveform” (Claim 15 of the ‘348 Patent) 12 The parties agree that the term should be construed as a means-plus-function 13 limitation pursuant to 35 U.S.C. § 112(f), and that the function is “determining a threshold 14 voltage crossing point of said composite waveform.” Although the parties, in their Joint 15 Claim Construction and Prehearing Statement, proposed differing constructions, the parties 16 agreed at the hearing, and the Court finds, that the structure is properly construed as “a 17 static timing analysis program configured to identify the time at which the composite 18 waveform crosses a threshold voltage.” 19 10. 20 “Second calculation means for determining a worst case aggressor switching time based on said threshold voltage crossing point” (Claim 15 of the ‘348 Patent) 21 The parties agree that the term should be construed as a means-plus-function 22 limitation pursuant to 35 U.S.C. § 112(f), and that the function is “determining a worst case 23 aggressor switching time based on said threshold voltage crossing point.” Although the 24 parties, in their Joint Claim Construction and Prehearing Statement, proposed differing 25 constructions, the parties agreed at the hearing, and the Court finds, that the structure is 26 properly construed as “a static timing analysis program that subtracts the times needed for 27 28 6 1 each aggressor response to reach its peak voltage point from the time at which the 2 composite waveform voltage crosses a threshold voltage.” 3 4 IT IS SO ORDERED. Dated: January 19, 2016 MAXINE M. CHESNEY United States District Judge 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 7

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