Synopsys, Inc. v. Atoptech, Inc

Filing 507

ORDER CONSTRUING CLAIMS. Signed by Judge Maxine M. Chesney on January 19, 2016. (mmclc2, COURT STAFF) (Filed on 1/19/2016)

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IN THE UNITED STATES DISTRICT COURT

For the Northern District of California

United States District Court

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FOR THE NORTHERN DISTRICT OF CALIFORNIA
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SYNOPSYS, INC.,

No. C-13-2965 MMC

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Plaintiff,

ORDER CONSTRUING CLAIMS

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v.
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ATOPTECH, INC.,
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Defendant.

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/

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Before the Court is the parties’ dispute regarding the proper construction of ten

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terms in four patents, specifically, U.S. Patent No. 6,567,967 (“‘967 Patent”), U.S. Patent

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No. 6,507,941 (“‘941 Patent”), U.S. Patent No. 6,237,127 (“‘127 Patent”), and U.S. Patent

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No. 6,405,348 (“‘348 Patent”). The matter came on regularly for hearing on November 30,

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2015. Patrick T. Michael and Krista S. Schwartz of Jones Day appeared on behalf of

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Synopsys, Inc. (“Synopsys”). Philip W. Marsh and Willow Noonan of Arnold & Porter LLP

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appeared on behalf of ATopTech, Inc. (“ATopTech”). At the hearing, the Court afforded the

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parties leave to file supplemental briefing, upon receipt of which the Court took the matter

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under submission.

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Having considered the parties’ written submissions, and the arguments of counsel at

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the hearing, the Court rules as follows.

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1.

“Block”/“Blocks” (Claims 1, 5, 7, 10, 32-36 of the ‘967 Patent)
Synopsys contends the term “block”/“blocks” should be given its “plain and ordinary

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meaning” and, consequently, that no construction is required.1 ATopTech proposes the

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term be construed as “a small portion of a design, above the cell level, that is designed

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and/or laid out separately comprising cells.”
The Court, for the reasons stated by ATopTech,2 construes the term “block”/“blocks”

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as “a portion of a design that is designed and/or laid out separately and comprising one or

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more cells.” For the reasons stated by Synopsys, the Court’s construction omits the word

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“small” and the phrase “above the cell level.”

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2.

“Subgrid”/“Subgrids” (Claims 1, 17, 21, 26 of the ‘941 Patent)
Although the parties, in their Joint Claim Construction and Prehearing Statement,

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proposed differing constructions for the term “subgrid”/“subgrids,” the parties agreed at the

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hearing, and the Court finds, “subgrid”/“subgrids” is properly construed as “a finer resolution

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grid.”

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3.

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“Tag” (Claim 1 of the ‘127 Patent)
Synopsys contends the term “tag” should be given its “plain and ordinary meaning”

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and, consequently, that no construction is required. ATopTech proposes the term be

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construed as “a data structure pointed to by an RF timing table which has two parts: i) a

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first part which is loaded with a unique identifier for the clock driving the flip flop for which

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the RF timing table was created, and ii) a second part which can contain a variety of

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labels.”

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Unless otherwise stated, the parties’ respective constructions as set forth herein are
taken from their “Joint Claim Construction and Prehearing Statement Under Patent Local
Rule 4-3,” filed August 31, 2015.
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Reference herein to a party’s “reasons” includes, unless otherwise stated, the
reasons provided in said party’s written submissions and by counsel for said party at the
hearing.
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The Court, for the reasons stated by ATopTech, construes the term “tag” as “a data

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structure pointed to by an RF timing table which has two parts: i) a first part which is loaded

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with a unique identifier for the clock driving the flip flop for which the RF timing table was

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created, and ii) a second part which can contain a variety of labels.”
To the extent Synopsys argued at the hearing that the term is broad enough to

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encompass circuit elements other than flip flops, the Court is not persuaded. See ‘127

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Patent, at 2:1-4 (explaining “[t]he static timing analysis of the present invention is performed

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upon units of the circuit . . . which comprise a set of ‘launch’ flip flops, non-cyclic

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combinational circuitry and a set of ‘capture’ flip flops”).

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“Timing table” (Claims 1, 4 of the ‘127 Patent)
Synopsys contends the term “timing table” should be given its “plain and ordinary

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meaning” and, consequently, that no construction is required. ATopTech proposes the

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term be construed as “a table comprised of the following four values: minimum rise time

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(minRT), maximum rise time (maxRT), minimum fall time (minFT) and maximum fall time

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(maxFT); and having its own tag.”
The Court, for the reasons stated by ATopTech, construes the term “timing table” as

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“a table comprised of the following four values: minimum rise time (minRT), maximum rise

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time (maxRT), minimum fall time (minFT) and maximum fall time (maxFT); and having its

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own tag.”

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5.

“A bump-envelope waveform” (Claims 1, 8, 15, 22 of the ‘348 Patent)

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Synopsys proposes the term “bump-envelope waveform” be construed as “a

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waveform encapsulating a response of the primary net.” ATopTech proposes the term be

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construed as “the waveform obtained by stretching a bump-like waveform for the size of the

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aggressor switching window where ‘bump-like waveform’ is ‘a waveform of the voltage

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fluctuation on the output of the primary net caused by switching of the input of the

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aggressor net.’”

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The Court construes the term “bump-envelope waveform” as “a waveform

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encompassing, for the size of the aggressor timing window, the responses of a primary net

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caused by the switching of the input of an aggressor net.”
In adopting the above construction, the Court considered both parties’ proposals

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and, while the Court agrees with ATopTech that Synopsys’s definition is too general to be

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meaningful, the Court also agrees with Synopsys that the claim is not limited to the

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embodiment on which ATopTech’s construction is based.

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6.

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“Means for identifying a cross-coupled circuit contained within said netlist,
wherein said cross-coupled circuit includes a primary net and an aggressor
net” (Claim 15 of the ‘348 Patent)
The parties agree that the term should be construed as a means-plus-function

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limitation pursuant to 35 U.S.C. § 112(f), and that the function is “identifying a cross-

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coupled circuit contained within said netlist, wherein said cross-coupled circuit includes a

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primary net and an aggressor net.” Synopsys’s proposed structure is a “general purpose

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computer system 112 configured to identify primary and aggressor nets of a cross-coupled

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circuit model of an interconnect stage based on primary/aggressor grouping information

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created based on coupling capacitor connectivity, and equivalents thereof.” ATopTech

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contends the term is indefinite and, in the alternative, proposes as the structure a

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“computer program static timing analysis tool capable of reading a netlist in Verilog, VHDL,

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Epic, or SPICE formats, and capable of reading parasitic component lists in DSPF, SPEF

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or SPICE formats.”
The Court, for the reasons stated by ATopTech in its supplemental brief, finds the

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term is indefinite.

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“First simulation means for generating a primary waveform of said crosscoupled circuit” (Claims 15, 19 of the ‘348 Patent)

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The parties agree that the term should be construed as a means-plus-function
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limitation pursuant to 35 U.S.C. § 112(f), and that the function is “generating a primary
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waveform of said cross-coupled circuit.” Synopsys’s proposed structure is a “general
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purpose computer system 112 configured to generate a primary waveform by applying a
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single switching input to a primary net without switching the input of the aggressor net.”

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ATopTech’s proposed structure is a “circuit simulation program that applies a single

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switching input to a primary net without switching the input of a cross-coupled aggressor

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net to cause the primary waveform to be output.”
The Court construes the structure as “a static timing analysis program configured to

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generate a primary waveform by applying a single switching input to a primary net without

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switching the input of the aggressor net.”
At the hearing, the parties agreed on the phrase “static timing analysis program,”

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and, with two exceptions, essentially agreed on the balance of the Court’s construction. As

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to the two points of disagreement, specifically, ATopTech’s proposal to further specify the

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aggressor net and method of generating the waveform, the Court, for the reasons stated by

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Synopsys, finds such limitations are not appropriate.

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“Second simulation means for generating a bump-envelope waveform of said
cross-coupled circuit” (Claim 15 of the ‘348 Patent)

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The parties agree that the term should be construed as a means-plus-function
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limitation pursuant to 35 U.S.C. § 112(f), and that the function is “generating a bump16
envelope waveform of said cross-coupled circuit.” Synopsys’s proposed structure is a
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“general purpose computer system 112 configured to generate responses of the primary
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net caused by switching of the input of an aggressor net and encapsulating the waveform
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response to form a bump-envelope waveform, and equivalents thereof.” ATopTech
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contends the term is indefinite and, in the alternative, proposes as the structure a “circuit
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simulation program that generates a bump-like waveform by switching the input of the
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aggressor net, and stretches the bump-like waveform for the size of a switching window
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that corresponds to switching an input on an aggressor net.”
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The Court construes the structure as “a static timing analysis program that
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generates a bump-like waveform by switching the input of the aggressor net, and stretches
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the bump-like waveform for the size of a switching window that corresponds to switching
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the input of the aggressor net.”
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Contrary to ATopTech’s argument, the Court, for the reasons stated by Synopsys,

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finds the term is not indefinite, and, at the hearing, the parties, in the event of such finding,

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agreed upon the phrase “static timing analysis program.” With respect to the remainder of

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the construction, the Court, for the reasons stated by ATopTech, adopts, in essence,

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ATopTech’s alternative construction. See ‘348 Patent, at 11:32-57 (describing generation

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of bump-envelope waveform by first generating “bump-like waveform on the primary net by

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switching the input of the aggressor net,” and then “stretching the bump-like waveform . . .

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for the size of the switching window”); 35 U.S.C. § 112(f) (providing means-plus-function

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term “shall be construed to cover the corresponding structure, material, or acts described in

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the specification”).

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“First calculation means for determining a threshold voltage crossing point of
said composite waveform” (Claim 15 of the ‘348 Patent)

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The parties agree that the term should be construed as a means-plus-function
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limitation pursuant to 35 U.S.C. § 112(f), and that the function is “determining a threshold
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voltage crossing point of said composite waveform.” Although the parties, in their Joint
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Claim Construction and Prehearing Statement, proposed differing constructions, the parties
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agreed at the hearing, and the Court finds, that the structure is properly construed as “a
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static timing analysis program configured to identify the time at which the composite
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waveform crosses a threshold voltage.”
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10.
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“Second calculation means for determining a worst case aggressor switching
time based on said threshold voltage crossing point” (Claim 15 of the ‘348
Patent)

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The parties agree that the term should be construed as a means-plus-function
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limitation pursuant to 35 U.S.C. § 112(f), and that the function is “determining a worst case
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aggressor switching time based on said threshold voltage crossing point.” Although the
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parties, in their Joint Claim Construction and Prehearing Statement, proposed differing
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constructions, the parties agreed at the hearing, and the Court finds, that the structure is
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properly construed as “a static timing analysis program that subtracts the times needed for
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each aggressor response to reach its peak voltage point from the time at which the

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composite waveform voltage crosses a threshold voltage.”

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IT IS SO ORDERED.
Dated: January 19, 2016
MAXINE M. CHESNEY
United States District Judge

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