U.S. Ethernet Innovations, LLC v. Acer, Inc. et al

Filing 1289

ORDER by Judge Claudia Wilken ON (1133 and 1167 in case 4:10-cv-03724-CW) SUMMARY JUDGMENT MOTIONS (ndr, COURT STAFF) (Filed on 11/7/2014)

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IN THE UNITED STATES DISTRICT COURT

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FOR THE NORTHERN DISTRICT OF CALIFORNIA

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U.S. ETHERNET INNOVATIONS, LLC,

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Plaintiff,
v.
ACER, INC., et al.,

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United States District Court
For the Northern District of California

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No. C 10-3724 CW
ORDER ON SUMMARY
JUDGMENT MOTIONS
(Docket Nos. 1133
and 1167)

Defendants.
and
ATHEROS COMMUNICATIONS, INC., et
al.,
Intervenors.
________________________________/

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U.S. ETHERNET INNOVATIONS, LLC,

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Plaintiff,

No. C 10-5254 CW
ORDER ON SUMMARY
JUDGMENT MOTIONS

v.

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AT&T MOBILITY, LLC, et al.,

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Defendants.
________________________________/

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In this consolidated patent infringement case, Plaintiff U.S.
Ethernet Innovations, LLC (USEI) moves for summary judgment on a

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number of discrete issues: infringement of claim 21 of the ‘872
patent against Intel, Intel’s intentional copying of the patented

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inventions, validity of the ‘872 and ‘094 patents in view of the

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SONIC prior art reference, and Defendants’ claims of inequitable

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conduct.1

Defendants and Intervenors (collectively, Defendants)

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oppose the motion and affirmatively move for summary judgment on

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the issues of damages, non-infringement of the ‘313 patent,

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anticipation of certain claims of the ‘872 and ‘094 patents by the

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Intel 82593 prior art reference, anticipation of all asserted

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claims of the ‘872 and ‘094 patents by the SONIC prior art
reference, non-infringement of the ‘459 patent, invalidity of

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certain ‘313 and ‘459 patent claims under § 112, and issues

United States District Court
For the Northern District of California

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specific to AT&T Services (ATTS), Marvell (MSI), Apple, and

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Atheros/Sigma/ATTS.

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Having considered the parties’ submissions and the arguments of

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counsel, the Court grants some motions and denies others, and

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grants some motions in part.

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The motions were heard on August 14, 2014.

BACKGROUND

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3Com Corporation, USEI’s predecessor-in-interest, developed
ethernet technology in the 1980s and 1990s.

In the early 1990s,

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3Com obtained the four patents-in-suit: U.S. Patent Nos. 5,434,872

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(the ‘872 patent) (Apparatus for automatic initiation of data

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transmission), 5,732,094 (the ‘094 patent) (Method for automatic

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initiation of data transmission), 5,307,459 (the ‘459 patent)

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(Network adapter with host indication optimization), and 5,299,313
(the ‘313 patent) (Network interface with host independent buffer

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management).
Defendants have withdrawn their inequitable conduct claims.
Thus, the Court need not address this issue.
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The patents-in-suit relate to the field of network interface

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controllers/adapters for managing the transmission and reception

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of data between a host computer system and a communication

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network.

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controllers manage the transfer of data between the host computer

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‘313 patent, Field of the Invention.

Typically, these

system and the communication network, relieving the host computer
to perform other tasks.

Id., Description of Related Art.

Using

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such a network controller, a sender may transmit “packets” or

United States District Court
For the Northern District of California

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“frames” of data across a communication network.

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Description of Related Art.

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according to the network “protocol” before transmission.

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Some network adapters include dedicated transmit buffers, which

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can download data of a frame before they are transmitted.

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‘872 patent,

The frames of data must be organized
Id.

Id.

A

dedicated transmit buffer allows the host computer system to

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attend to other tasks while the data frame is being processed and
transmitted.

Id.

If frame transmission is cancelled, the data

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may be retained in the transmit data buffer until the sending

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system tries to transmit the frame again.

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Id.

On October 9, 2009, USEI filed suit in the Eastern District
of Texas against sixteen computer maker defendants,2 alleging that
they were manufacturing and selling desktop and laptop computers

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Acer, Inc., Acer America Corporation, Apple, Inc., ASUS
Computer International, Asustek Computer, Inc., AT&T Services,
Inc., Dell, Inc., Fujitsu Ltd., Fujitsu America, Inc., Gateway,
Inc., Hewlett Packard Co., Sony Corporation, Sony Corporation of
America, Sony Electronics, Inc., Toshiba Corporation, Toshiba
America, Inc., and Toshiba America Information Systems, Inc.
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which incorporated chips supplied by others that practice certain

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ethernet technology, thereby infringing the four patents-in-suit.

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That case was subsequently transferred to this district and given

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Case No. 10-3724 (the Acer case).

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separate suit in the Eastern District of Texas against the

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retailer Defendants,3 alleging infringement of the same four

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patents-in-suit.

On March 10, 2010, USEI filed a

That case was subsequently transferred to this

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district and given Case No. C 10-5254 (the AT&T case). Chip

United States District Court
For the Northern District of California

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suppliers, including Intel, Marvell, Atheros, and Sigma, who

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designed and provided chips to Defendants, successfully moved to

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intervene in both cases.

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Defendants and ATTS were stayed.

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The cases against the retailer

The Court has issued two claim construction orders.

See Case

No. C 10-3724, Docket Nos. 586 and 634; Case No. C 10-5254, Docket

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Nos. 331 and 379.
LEGAL STANDARDS

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Summary judgment is appropriate only where the moving party

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demonstrates there is no genuine dispute as to any material fact

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such that judgment as a matter of law is warranted.

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P. 56(a); Celotex Corp. v. Catrett, 477 U.S. 317, 323 (1986).

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Fed. R. Civ.

Material facts are those that might affect the outcome of the
case, as defined by the framework of the underlying substantive

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AT&T, Inc., Barnes & Noble, Inc., Claire’s Stores, Inc.,
J.C. Penney Company, Inc., Sally Beauty Holdings, Inc., and Home
Depot U.S.A., Inc.
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law.

Anderson v. Liberty Lobby, Inc., 477 U.S. 242, 248 (1986).

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A dispute is genuine if the evidence is such that a reasonable

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jury could return a verdict for either party.

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Id.

The moving party bears the initial burden of informing the
district court of the basis for its motion and identifying those
portions of the pleadings, discovery, and affidavits that
demonstrate the absence of a disputed issue of material fact.

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Celotex, 477 U.S. at 323.

In opposing the motion, the non-moving

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For the Northern District of California

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party may not rely merely on the allegations or denials in its

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pleadings, but must set forth “specific facts showing that there

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is a genuine issue for trial.”

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Fed. R. Civ. P. 56(e)).

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the light most favorable to the non-moving party, making all

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Anderson, 477 U.S. at 248 (citing

The court must construe the evidence in

reasonable inferences that can be drawn.

Matsushita Elec. Indus.

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Co., Ltd. v. Zenith Radio Corp., 475 U.S. 574, 587 (1986); Intel
Corp. v. Hartford Accident & Indem. Co., 952 F.2d 1551, 1558 (9th

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Cir. 1991); Eisenberg v. Ins. Co. of N. Am., 815 F.2d 1285, 1289

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(9th Cir. 1987).

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DISCUSSION

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Anticipation of the asserted claims of the ‘872 and ‘094
patent by the SONIC prior art reference

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A.

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USEI moves for summary adjudication that the SONIC reference

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cannot anticipate the ‘872 and ‘094 patents (the “Early Transmit”

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I.

USEI’s motion

patents), because it lacks a buffer memory of a certain minimum

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5

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size as required by the balance of the claim language.

Defendants

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disagree, and cross-move for summary judgment that the asserted

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claims are anticipated by the SONIC prior art.

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Patents are presumed valid, and the presumption may only be
overcome by clear and convincing evidence.

Microsoft Corp. v. i4i

Ltd. P’ship, 131 S. Ct. 2238, 2252 (2011).

“The burden of

establishing invalidity of a patent . . . shall rest on the party

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asserting such invalidity.”

35 U.S.C. § 282(a).

Title 35 U.S.C.

United States District Court
For the Northern District of California

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§ 102 establishes the various grounds for invalidation of patents

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based on anticipation by prior art.

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presence in a single prior art disclosure of all elements of a

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claimed invention arranged as in the claim.”

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Becton, Dickinson and Co., 593 F.3d 1325, 1333 (Fed. Cir. 2010)

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“Anticipation requires the

Therasense, Inc. v.

(quoting Connell v. Sears, Roebuck & Co., 722 F.2d 1542, 1548

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(Fed. Cir. 1983)).
There is no dispute that SONIC is prior art pursuant to 35

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U.S.C. § 102.

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Art sections of the ‘872 and ‘094 patents as “representative prior

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art.”

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thirty-two byte buffer memory, not big enough to hold the smallest

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SONIC is referred to in the Description of Related

There is also no dispute that the SONIC device contains a

ethernet data frame, which is sixty-four bytes in size.
USEI contends that the plain language of the ‘872 and ‘094

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patents demonstrates that the buffer memory must be big enough to

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hold an entire ethernet frame.

For example, USEI points to claim

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1 of the ‘872 patent, which calls for: “initiating transmission of
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the frame prior to transfer of all the data of the frame to the

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buffer memory from the host computer.”

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21, which requires “logic which initiates transmission of the

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frame from the buffer memory to the medium access controller prior

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to transfer of all of the data of the frame from the buffer

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USEI then points to claim

memory, including logic which initiates transmission of the frame
when no complete frame of data is present in the buffer memory.”

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USEI finally refers to the Court’s construction of “buffer memory”

United States District Court
For the Northern District of California

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as “memory for the temporary storage of data” to argue that, taken

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as a whole, the buffer memory of the patented invention must be

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capable of holding a complete minimum-sized ethernet data frame

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from the host computer “all at one time.”

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USEI’s argument is unpersuasive.

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First, the plain language

of the claims says nothing about the buffer memory’s ability to

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hold a complete frame of data.

Instead, it states more or less

the opposite -– that a complete frame need not be downloaded into

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buffer memory before transmission can occur.

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USEI points out supports only the notion that a complete download

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of a frame need not occur.

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require that the buffer memory have the capacity to store all of

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The claim language

In other words, the language does not

the data of a frame at once, only that the transmission of the
frame away from the buffer memory is initiated before all of the

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data of the frame is fully transferred to the buffer memory.

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USEI’s own evidence of the specification, noting the disadvantages

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of prior art using a dedicated transmit buffer that accommodated a
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full data frame, actually undermines USEI’s contention; if the

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specification criticized the use of full frame capacity, that

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would indicate that the invention itself did not require full

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frame capacity.

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Moreover, the Court construed the term “buffer memory” to
mean “a memory for temporary storage of data” and did not impose
any extraneous storage requirements on buffer memory.

USEI

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previously made a similar argument that “the buffer memory is able

United States District Court
For the Northern District of California

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to retain a frame of data that has been transmitted.”

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rejected this argument, finding that such additional language

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would add a limitation that is not required by the specification.

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Docket No. 586 at 21.

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a size requirement is simply not justified by the claim language,

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The Court

Similarly, USEI’s present attempt to infer

the specification, or any other evidence.

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USEI does not present any evidence to support a finding that
SONIC does not anticipate the ‘872 and ‘094 patents.

Therefore,

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summary judgment for USEI on this point is not warranted.

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Instead, as will be discussed below, summary adjudication of the

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issue is granted for Defendants.

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B.

Defendants’ cross motion

Because Defendants also move affirmatively that SONIC
anticipates the asserted claims of the ‘872 and ‘094 patents, the

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Court turns to the other arguments they advance, all of which they

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must prove by clear and convincing evidence in order to prevail.

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Microsoft Corp., 131 S. Ct. at 2252-53.
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To show anticipation, Defendants refer to Dr. Wicker’s

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report, which provides invalidity analysis and invalidity claim

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charts that detail element-by-element how SONIC satisfies each and

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every asserted claim limitation in the ‘872 and ‘094 patents.

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Constant Decl. Ex. 14, Wicker Rpt. at ¶¶ 554-675, Exhs 9, 11.

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This evidence is largely unrefuted by USEI.

See

USEI instead pins its

substantive defense on its contention that the balance of the

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claim language imposes a lower limit on the buffer memory capacity

United States District Court
For the Northern District of California

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-- that the buffer memory, as claimed, must be large enough to

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hold a full-size ethernet data frame, which has a minimum size of

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sixty-four bytes; SONIC’s thirty-two byte buffer memory cannot

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satisfy the “buffer memory” limitation as claimed.

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USEI does not dispute any relevant facts regarding the alleged

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In essence,

anticipating SONIC prior art, but only disagrees over an

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interpretation of the claim language.

This renders the

anticipation issue one of claim construction, which is a question

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of law.

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(1996).

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Markman v. Westview Instruments, Inc., 517 U.S. 370, 384

After reviewing the claim language and the specification, the
Court finds no justification to require that the “buffer memory”
of the “Early Transmit” patents be capable of holding of a
complete minimum-sized ethernet data frame all at one time.

As

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the Court detailed above, the plain language of the claims says

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nothing about the buffer memory’s ability to hold a complete frame

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of data.

Instead, it states that a complete frame need not be
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downloaded into buffer memory before transmission can occur.

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Nothing in the specification contradicts this understanding.

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Accordingly, the Court grants Defendants’ motion for summary

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adjudication that SONIC anticipates the asserted claims of the

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‘872 and ‘094 patents.

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Because the Court finds that the asserted

claims of the ‘872 patent are invalid due to anticipation by the
SONIC prior art, the Court need not decide USEI’s motion for

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United States District Court
For the Northern District of California

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summary judgment of infringement of claim 21 of the ‘872 patent.
II.

Whether Intel intentionally copied the patented invention,
precluding any equitable defense
USEI contends that ample evidence exists to show that Intel

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copied the patented technology, which should prevent Intel from
asserting any equitable defense.

See, e.g., A.C. Aukerman Co. v.

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R.L. Chaides Constr. Co., 960 F.2d 1020, 1033 (Fed. Cir. 1992) (“A

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patentee may also defeat a laches defense if the infringer ‘has

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engaged in particularly egregious conduct which would change the

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equities significantly in plaintiff's favor.’ Conscious copying

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may be such a factor weighing against the defendant.”)

USEI

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presents evidence that Intel began testing and discussing 3Com’s
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ethernet technology in 1992.

For example, USEI has proffered

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internal Intel emails discussing the value of these accused

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infringing technologies and how they might be implemented in

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upcoming products.

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See Nation Decl. Exs. E., F.

Intel disagrees, arguing that USEI’s allegations concern the
copying of a 3Com product (the Etherlink III) that USEI’s own

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10

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experts could not even identify or describe, much less compare to

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the asserted claims.

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never compared the asserted claims to the Intel product (the

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82595TX) that was alleged to be the result of Intel’s intentional

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copying.

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Further, Intel contends that USEI’s experts

In order to establish that Intel intentionally copied the
patented inventions, USEI must first show that the product

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allegedly copied by Intel embodied the asserted claims.

Without

United States District Court
For the Northern District of California

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such a showing, the allegations of copying are irrelevant.

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e.g., Amazon.com, Inc. v. Barnesandnoble.com, Inc., 239 F.3d 1343,

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1366 (Fed. Cir. 2001) (“[E]vidence of copying Amazon’s ‘1-Click’

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feature is legally irrelevant unless the ‘1-click’ feature is

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shown to be an embodiment of the claims.”).

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See,

The proffered internal Intel emails refer to “Parallel

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Tasking,” a 3Com marketing term describing a commercial product
(the “EtherLink III” adapter) that 3Com released in 1992.

USEI

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fails to provide any evidence to show that the “Parallel Tasking”

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EtherLink III adapter embodies each and every element of the

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asserted claims or practices them.

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have not looked into whether the EtherLink III practiced any of

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the asserted claims.

USEI’s experts admit that they

See Constant Decl. Ex. 6, Mitzenmacher Depo.

at 290:16-293:19; Ex. 10, Conte Depo. at 79:1-24.

Without such a

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showing, to the extent that USEI’s motion asserts intentional

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copying, it must be denied.

USEI also contends, in this motion,

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that Defendants, including Intel, engaged in litigation misconduct
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by paying critical fact witnesses to prevent them from speaking to

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USEI.

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actions and addressed accessibility concerns regarding this

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witness.

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from asserting any equitable defense is denied.

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United States District Court
For the Northern District of California

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The Court has already denied sanctions regarding these

Docket Nos. 866, 900.

Thus USEI’s request to bar Intel

III. Non-infringement of the ‘313 patent by any of the accused
products
Claims 1 and 13 are the only asserted independent claims of
the ‘313 patent.

Defendants move for summary adjudication that no

accused product infringes claim 1 of the ‘313 patent because
(1) none of the accused products practices “network interface

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means”; (2) none of the accused products satisfies the requirement
of “buffer memory outside of the host address space;” and (3) none

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of the accused products practices “host interface means.”

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Defendants further contend that no accused product infringes claim

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13 because USEI failed to identify any accused product that

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includes the structures identified by the Court as corresponding

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to the “host interface means” or the “network interface means”

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limitation.
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A.

“Network interface means” in claim 1

Claim 1 of the ‘313 patent reads:
An apparatus for controlling communication between a host
system and a network transceiver coupled with a network,
wherein the host system includes a host address space,
comprising:
a buffer memory outside of the host address space;

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host interface means, sharing the host address space
with the host, for managing data transfers between the
host address space and the buffer memory in operations
transparent to the host system; and

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network interface means, coupled with the network
transceiver, for managing data transfers between the
buffer memory and the network transceiver.

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Defendants contend that none of the accused products

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practices “network interface means” as construed by the Court.

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Claim 1 of the ‘313 patent recites “network interface means,

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coupled with the network transceiver, for managing data transfers

United States District Court
For the Northern District of California

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between the buffer memory and the network transceiver.”

The Court

found that “network interface means” is a means-plus-function term

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governed by § 112 ¶ 6.
586 at 12.

First Claim Construction Order, Docket No.

The Court construed “network interface means” to

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perform the function of “managing data transfers between the

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buffer memory and the network transceiver” and the corresponding

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structures to be “in Figure 3, Network interface logic 104, and

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equivalents.”

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17.

Second Claim Construction Order, Docket No. 634 at

Figure 3 of the ‘313 patent shows that the “network interface

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logic 104” is made up of “XMIT DMA LOGIC 109” and “RECEIVE DMA
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LOGIC 110.”

The Court elaborated on its construction by pointing

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to the specification, which states the “network interface logic

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104 includes the transmit DMA logic 109 responsive to descriptors

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stored in the adaptor memory 103, for moving data out of the

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adapter memory to the network transceiver 105.”

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10:3-11.

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Id.; ‘313 Patent,

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Defendants contend that the accused infringing products do

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not “transmit DMA logic responsive to descriptors stored in the

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adaptor memory” because all accused products move data from the

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buffer memory onto the network irresponsive to transmit

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descriptors stored in adapter memory.

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Kunz Decl. at ¶¶ 19-23;

Carkin Decl. at ¶ 7; McCauley Decl. Ex. 1, Lin Rpt. at ¶¶ 156-169;
Hu Decl. Ex. 1, Lin Rpt. for Sigma at ¶¶ 81-91, 152-162.

USEI

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responds that, to prove infringement under the Court’s

United States District Court
For the Northern District of California

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construction, all it needs is to identify a “network interface

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logic 104” that performs the function of “managing transfers of

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data from buffers in the independent memory 103 and the network

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transceiver 105”; it does not need to identify further the

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corresponding structure to “transmit DMA logic 109 responsive to

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descriptors stored in adapter memory for moving data out of the

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adapter memory to the network transceiver.”
Thus, the debate hinges on what is required to show

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infringement of “network interface means,” a term the Court found

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to be governed by § 112 ¶ 6.

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limitation governed by § 112 ¶ 6 requires that the relevant

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structure in the accused device (1) perform the identical function

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Literal infringement of a claim

recited in the claim, and (2) be identical or equivalent to the
corresponding structure in the specification.

See Applied Med.

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Resources Corp. v. United States Surgical Corp., 448 F.3d 1324,

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1333 (Fed. Cir. 2006).

Defendants do not dispute that the

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identified structures in the accused products perform the
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identical function of “managing data transfers between the buffer

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memory and the network transceiver.”

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dispute that the corresponding structure in the specification is

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the network interface logic 104 shown in Fig. 3, which includes

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transmit DMA logic 109 that is responsive to descriptors stored in

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Defendants also do not

the adapter memory for moving data out of the adapter memory to
the network transceiver.

In fact, Dr. Mitzenmacher confirmed that

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the Court’s construction requires just such logic.

Constant Decl.

United States District Court
For the Northern District of California

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Ex. 6, Mitzenmacher Depo. at 163:21-164:13.

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dispute whether the identified structures in the accused products

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are identical or equivalent to the corresponding structure in the

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specification.

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any evidence that the identified structures in the accused

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Instead, the parties

In this regard, Dr. Mitzenmacher fails to proffer

products are identical or equivalent to the corresponding

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structure identified by the Court.

For example, in his initial

Intel Report, Dr. Mitzenmacher identifies the MAC core component

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in Intel Gigabit products as the “network interface means” but

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fails to identify any DMA logic that is “responsive to descriptors

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stored in the adapter memory for moving data out of the adapter

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memory to the network transceiver.”

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Mitzenmacher Intel Rpt. at ¶ 239.

Constant Decl. Ex. 7,
In fact, Dr. Mitzenmacher

concedes that he did not specifically identify any such DMA logic

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in the MAC core component.

Nation Decl. Ex. 41, Mitzenmacher 5/30

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Depo. at 377:20-381:3.

Likewise, Dr. Mitzenmacher’s report for

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MSI makes no mention of any structure in the accused products that
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1

is “responsive to descriptors stored in adapter memory for moving

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data out of adapter memory to a network transceiver.”

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O’Brien Decl. Ex. 6, Mitzenmacher Marvell Rpt. at ¶ 69, Ex. 8,

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Mitzenmacher Depo. at 626:12-22.

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to Dr. Mitzenmacher’s Supplemental Reports on how the structures

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Flynn-

As an alternative, USEI refers

identified in his initial reports are equivalent to the “transmit
DMA logic 109 that is responsive to descriptors stored in the

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adapter memory for moving data out of the adapter memory to the

United States District Court
For the Northern District of California

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network transceiver.”

However, the Court has not allowed these

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supplemental reports.

As a result, USEI is foreclosed from

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arguing that the structures identified in Dr. Mitzenmacher’s

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initial reports are equivalent to the “transmit DMA logic 109.”

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Accordingly, because no structure in any accused product infringes

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the “network interface means” limitation of claim 1 of the ‘313

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patent, summary judgment of non-infringement by any of the accused
products of claim 1 of the ‘313 patent is appropriate.

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B.

“Buffer memory outside of host address space” in claim 1

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Defendants contend that USEI fails to make a showing that the

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limitation “a buffer memory outside of the host address space” is

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met because the identified buffer memory in the accused Intel

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products can be accessed by the host under some circumstances,
which implies that the buffer memory is not “outside of the host

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address space.”
In his infringement report against Intel, Dr. Mitzenmacher
identifies first-in-first-out buffers (FIFOs) in the accused Intel
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products as the alleged “buffer memory outside of the host address

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space” recited in claim 1.

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Intel Rpt. at ¶ 230.

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Intel technical documentation for at least some of these products

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allows for direct addressing to the data FIFO buffers by the host

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Constant Decl. Ex. 7, Mitzenmacher

However, Dr. Mitzenmacher concedes that “the

specifically for diagnostic purposes.”

Id. at ¶ 231.

These FIFOs

in the accused Intel products do not meet the “buffer memory

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outside of the host address space” requirement because they are

United States District Court
For the Northern District of California

10

accessible by the host system and, thus, lie within the host

11

address space.

12

by the host during diagnosis but are inaccessible to the host

13

during normal data transmission, thereby rendering them “outside

14

of the host address space” during the relevant time.

15

USEI contends that these FIFOs are only accessible

Id.

USEI’s

contention fails as a literal infringement argument; the buffer

16
17
18

memory can either be inside or outside the host address space, but
not both.

To the extent that USEI argues that the FIFOs in the

19

accused Intel products are equivalent to “buffer memory outside of

20

the host address space,” that is a doctrine of equivalents

21

argument, one for which USEI has failed to proffer any evidence.

22

Therefore, summary judgment of non-infringement of claim 1 of the

23
24

‘313 patent by the accused Intel products is appropriate for this
reason as well.

25
26

Defendants further contend that Dr. Mitzenmacher improperly

27

identifies two distinctly different “buffer memories” in each

28

accused product for different limitations in claim 1, even though
17

1

the claim only mentions one “buffer memory.”

For example, Dr.

2

Mitzenmacher identifies “packet buffer data FIFO buffers” in the

3

accused Intel products as the “buffer memory outside the host

4

address,” but identifies “transmit and receive descriptor ring

5

buffers” as the “buffer memory” of the “host interface means.”

6
7

Id. at 230, 233.

Similarly, for each accused MSI product, Dr.

Mitzenmacher identifies the “MAC Rx and Tx FIFOs” as the “buffer

8
9

memory outside of the host address space,” but the combination of

United States District Court
For the Northern District of California

10

the “MAC Rx and Tx FIFOs” and the “PFU Rx and Tx FIFOs” as the

11

“buffer memory” of the “host interface means.”

12

Decl. Ex. 6, Mitzenmacher Marvell Rpt. at ¶¶ 61-67.

13

dispute this showing, but instead argues that this is covered by

14

claim 1.

15

Flynn-O’Brien
USEI does not

Claim 1 only recites one buffer memory in the “host interface

16
17
18

means,” which is for “managing data transfers between the host
address space and the buffer memory,” a reference to the “buffer

19

memory outside of the host address space.”

20

literal infringement, USEI must identify one “buffer memory” that

21

performs the claim function.

22

the two identified buffer memories are equivalent to “the buffer

23
24

Therefore, to show

To the extent that USEI argues that

memory” recited in the claim, that requires a showing of
equivalency, for which USEI has failed to proffer any evidence.

25
26

Therefore, summary judgment of non-infringement of claim 1 of the

27

‘313 patent by the accused Intel and MSI products is appropriate

28

for this reason as well.
18

1
2

C.

“Host interface means” in claim 1

Claim 1 contains the limitation of “host interface means,”

3

which the Court construed as having the function of “managing data

4

transfer between address spaces on the host system bus and the

5

buffer memory in operations performed independently of management

6
7

by the host system.”
586 at 10-11.

First Claim Construction Order, Docket No.

Defendants contend that the Court’s construction

8
9

that the data transfer must be “performed independently of

United States District Court
For the Northern District of California

10

management by the host system” dictates that the host system

11

cannot be involved in data transfers.

12

argue no infringement can be shown because the host systems in all

13

accused products are involved in managing the data transfers

14

between the host system and the network adapter by writing

15

As a result, Defendants

descriptors to a queue in the host system’s memory (i.e., the

16
17
18
19

“host address space.”)

Defendants’ Motion and Opposition, Docket

No. 1167-3 at 17.
Because, as discussed above, the Court finds that claim 1 of

20

the ‘313 patent is not infringed for other reasons, the Court need

21

not address this issue.

22
23
24

D.

“Host interface means” in claim 13

Defendants contend that USEI fails to apply the Court’s
construction of the “host interface means” in claim 13 of the ‘313

25
26
27
28

patent to identify the relevant structures in the accused products
and, instead, improperly applies the construction from claim 1.
Claim 13 reads:
19

1
2

An apparatus for controlling communication between a host
system and a network transceiver coupled with a network,
wherein the host system includes a host address space,
comprising:

3
4
5
6
7
8
9

United States District Court
For the Northern District of California

10
11
12
13
14

a buffer memory outside of the host address space,
including a transmit buffer and a receive buffer;
host interface means, sharing host address space
including a prespecified block of host addresses of
limited size defining a first area and a second area, and
coupled with the buffer memory, for mapping data
addressed to the first area into the transmit buffer,
mapping data in the receive buffer into the second area,
and uploading data from the receive buffer to the host;
and
network interface means, coupled with the network
transceiver and the buffer memory, for transferring data
from the transmit buffer to the network transceiver and
mapping data into the receive buffer from the network
transceiver.
Unlike claim 1, which recites a “host interface means” that

15

performs a single function of “managing data transfers between the

16

host address space and the buffer memory in operations transparent

17

to the host system,” claim 13 recites three functions for the

18

“host interface means,” namely, “mapping data addressed to the

19

first area into the transmit buffer,” “mapping data in the receive

20
buffer into the second area,” and “uploading data from the receive
21
22

buffer to the host.”

Second Claim Construction Order, Docket No.

23

634 at 16.

The Court identified separate corresponding structures

24

for each identified function, including an XMIT AREA register,

25

transfer descriptor logic; an XFER AREA register, upload logic;

26

and an upload DMA module, respectively.

27
28
20

Id.

1

USEI fails to base its infringement analysis on the Court’s

2

construction for claim 13, but instead applies the construction

3

from claim 1.

4

Rpt. at ¶ 250.

5

identify structures in the accused products that perform the

6
7

See Constant Decl. Ex. 53, Mitzenmacher Intel Base
USEI contends that Dr. Mitzenmacher’s reports

functions recited by the Court for the “host interface means”
element of the ‘313 patent.

Nation Decl. Ex. 35, Mitzenmacher

8
9

5/29 Depo. at 168:6-172:14, 175:8-21.

However, the record does

United States District Court
For the Northern District of California

10

not support USEI’s contention.

11

functions for “host interface means” but USEI fails specifically

12

to identify structures in the accused device that perform these

13

functions.

14

§ 112 ¶ 6 requires that the relevant structure in the accused

15

Claim 13 clearly recites three

Literal infringement of a claim limitation governed by

device (1) perform the identical function recited in the claim,

16
17
18

and (2) be identical or equivalent to the corresponding structure
in the specification.

Applied Med. Resources, 448 F.3d at 1333.

19

USEI fails to show even the first requirement that the relevant

20

structure in the accused device perform the identical function

21

recited in the claim, let alone the second requirement that the

22

relevant structures be identical or equivalent to the

23
24

corresponding structures.

Therefore, USEI fails to show an issue

of fact regarding infringement of claim 13 of the ‘313 patent and,

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26
27

thus, summary judgment of non-infringement of that claim by any of
the accused products is warranted.

28
21

2

Anticipation of claim 21 of the ‘872 patent and claims 9, 28,
and 39 of the ‘094 patent by the Intel 82593 prior art
reference

3

Defendants move for partial summary adjudication of

4

anticipation under 35 U.S.C. § 102(a) and (b), contending that

5

Intel’s 82593 chip is prior art that satisfies every limitation of

1

6
7

IV.

claim 21 of the ‘872 patent and claims 9, 28, 39 of the ‘094
patent.

However, as discussed above, the Court grants summary

8
9

adjudication of invalidity of all the asserted claims of the ‘872

United States District Court
For the Northern District of California

10

and ‘094 patents due to the SONIC prior art reference.

11

Court need not address this issue.

12

V.

13
14

Thus, the

Non-infringement of the ‘459 patent by any of the accused
products
Claims 1 and 44 are the only asserted independent claims of

15

the ‘459 patent, and they are asserted only against Intel (claim

16

1) and HP (claims 1 and 44).

17

A.

18

Defendants contend that USEI’s infringement reports regarding

19

“Means for comparing”

Intel and HP fail to establish infringement because they ignore

20
that the “means for comparing” recited in the claims is a means21
22

plus-function element governed by § 112 ¶ 6 and do not address any

23

of the corresponding structures in the ‘459 patent that the Court

24

identified for such means (e.g., blocks 224 and 318, interrupt

25

controller 60), much less show that such structures are satisfied

26

by the accused Intel or HP products.

27

Crayford Rpt. at ¶¶ 859-861.

28
22

Constant Decl. Ex. 12,

1

As noted above, literal infringement of a claim limitation

2

governed by § 112 ¶ 6 requires that the relevant structure in the

3

accused device (1) perform the identical function recited in the

4

claim, and (2) be identical or equivalent to the corresponding

5

structure in the specification.

6
7

Claim 1 of the ‘459 patent reads:

11

An apparatus for transferring a data frame between a network
transceiver, coupled with a network, and a host system which
includes a host processor and host memory, the apparatus
generating an indication signal to the host processor
responsive to the transfer of the data frame, with the host
processor responding to the indication signal after a period
of time, comprising:

12

a buffer memory for storing the data frame;

13

network interface logic for transferring the data frame
between the network transceiver and the buffer memory;

8
9
10
United States District Court
For the Northern District of California

Applied Med., 448 F.3d at 1333.

14
15

host interface logic for transferring the data frame between
the host system and the buffer memory;

16
17
18
19
20
21
22
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24
25
26
27

threshold logic for allowing the period of time for the host
processor to respond to the indication signal to occur during
the transferring of the data frame, wherein the threshold
logic includes,
a counter, coupled to the buffer memory, for counting the
amount of data transferred to or from the buffer memory;
an alterable storage location containing a threshold
value; and
means for comparing the counter to the threshold value in
the alterable storage location and generating an
indication signal to the host processor responsive to a
comparison of the counter and the alterable storage
location.
Claim 44 contains more or less the same language for “means
for comparing.”

28
23

The Court construed “means for comparing” to have two

1
2

functions: (1) “comparing the counter to the threshold value in

3

the alterable storage location”; and (2) “generating an indication

4

signal to the host processor.”

5

labeled 224 in Fig. 14 and 318 in Fig. 21 performs the first

6
7

function.
11.

The Court found that the block

Second Claim Construction Order, Docket No. 634 at 10-

The Court found that the functional components labeled

8
9

United States District Court
For the Northern District of California

10
11

“Interrupt Controller 60” shown in Fig. 4, together with “Early
Rcv Control 225” in Fig. 14, perform the second function.

Id.

USEI argues that Dr. Mitzenmacher “identifies structures

12

performing the required functions taking into account the Court’s

13

claim construction in his original Infringement Reports,” but his

14

report merely identifies a portion of the Intel source code of the

15

accused products performing the comparison function without

16
17
18

identifying any structure corresponding to the structures
specified in the Court’s construction.

Constant Decl. Ex. 7,

19

Mitzenmacher Intel Rpt. at ¶ 210; Constant Decl. Ex. 12, Crayford

20

Rpt. at ¶¶ 859-61.

21

Mitzenmacher simply opines that the recited function is performed,

22

without regard to the corresponding structure required by the

23
24

Similarly, for the accused HP products, Dr.

Court’s claim construction.

Declaration of Cameron A. Zinsli

(Zinsli Decl.), Ex. 2, Mitzenmacher HP Rpt. at ¶¶ 119, 120.

This

25
26

is not sufficient; USEI must identify structures in the accused

27

product that are either identical or equivalent to the

28

corresponding structures identified by the Court.
24

Applied Med.,

1

448 F.3d at 1333.

As an alternative, USEI points to Dr.

2

Mitzenmacher’s Supplemental Reports for evidence that the

3

proffered source code is at least equivalent to that required by

4

the Court.

5

USEI is foreclosed from arguing that the identified source code is

6
7

However, these reports have been excluded.

Therefore,

equivalent to the corresponding structures required by the Court.
Accordingly, summary judgment of non-infringement of claims 1 and

8
9

United States District Court
For the Northern District of California

10

44 of the ‘459 patent by the accused Intel and HP products is
granted.

11

B.

“Look-ahead threshold logic”

12

Intel separately contends that claim 1 of the ‘459 is not

13

infringed because Intel’s accused products do not satisfy “means

14

for comparing” in that they do not contain the “look-ahead

15

threshold logic” required by the Court’s construction.

However,

16
17
18

as discussed above, given that summary adjudication of noninfringement of claims 1 and 44 of the ‘459 patent by the accused

19

Intel and HP products is granted, the Court need not address

20

whether Intel’s products do not infringe claim 1 for this

21

additional reason.

22
23
24

C.

“Threshold value”

In addition, Defendants contend that claims 1 and 44 of the
‘459 patent are not infringed because the accused products do not

25
26

satisfy “an alterable storage location containing a threshold

27

value” limitation in claim 1 and “an alterable storage location

28

containing a transfer threshold value” limitation in claim 44.
25

Again, as discussed above, given that summary adjudication of

1
2

non-infringement of claims 1 and 44 of the ‘459 patent by the

3

accused Intel and HP products is granted for other reasons, the

4

Court need not decide this issue.

5

VI.

6

Invalidity under § 112 of claim 13 of the ‘313 patent and
claim 1 of the ‘459 patent

7

Defendants contend that nothing in the ‘313 or ‘459 patents

8

suggests a single structure for performing the functions recited

9

for the “host interface means” of claim 13 of the ‘313 patent and

United States District Court
For the Northern District of California

10
11

the “means for comparing” of claim 1 of the ‘459 patent, and ask
the Court to invalidate the claims as indefinite under 35 U.S.C.

12
13
14

§ 112.

However, as discussed above, the Court grants summary

adjudication of non-infringement of claim 13 of the ‘313 patent

15

and claim 1 of the ‘459 patent.

16

this issue.

17

VII. Exclusion of the unreliable opinion of USEI’s damages
expert, Walter Bratic

18
19

Thus, the Court need not decide

Defendants contend that USEI cannot prove damages, because

20

its expert, Mr. Bratic, used unreliable methods, unreasonable

21

inferences and speculation to reach his damages conclusions and,

22

thus, his testimony should be excluded.

23
24
25
26
27
28

However, given the findings in this order, this motion is
moot, and the Court need not address it.
VIII. ATTS’ motion for partial summary judgment of no damages or,
alternatively, to limit the AT&T royalty base
ATTS moved for summary judgment to limit the AT&T royalty
base to the number of Sigma chips purchased during the relevant
26

1

time period.

Given the other findings in this order, this motion

2

is moot, and the Court need not address it.

3

IX.

4

MSI’s motion for partial summary judgment to exclude foreign
non-party sales from USEI’s asserted damages base
MSI contends that the damages USEI claims against it are

5
6
7

improper in that they include Yukon chips that are manufactured
abroad by third-party foundries or offered for sale and sold

8

abroad by non-party Marvell Asia Pte. Ltd. (MAPL), a Singapore

9

corporation that is a legal entity distinct from MSI.

Declaration

United States District Court
For the Northern District of California

10

of Joseph Kuo (Kuo Decl.) at ¶¶ 9, 10.

11

findings in this order, the Court need not address this issue.

12

X.

However, given the other

13

Apple’s motion for partial summary judgment of noninfringement of claims 1, 9, 12 and 28 of the ‘094 patent

14

USEI accuses certain Apple products of infringing method

15

claims 1, 9, 12, and 28 of the ‘094 patent based solely on its

16

inclusion of GEM ethernet technology supplied by Sun Microsystems.

17

Declaration of Christopher Cravey (Cravey Decl.) Ex. 1,

18

Mitzenmacher Apple Rpt. at ¶¶ 52-84.

19

not infringe these method claims because it has always disabled

20

the accused infringing “Early Transmit” feature in the Sun GEM

21

ethernet technology, thus rendering use of the accused infringing

22

feature impossible.

23

54-57, and 64-69.

24

Apple contends that it does

Cravey Decl. Ex. 3, Seifert Rpt. at ¶¶ 48-52,

Because the Court grants summary adjudication of invalidity

25

of all the asserted claims of the ‘094 patent due to the SONIC

26

prior art reference, the Court need not address this issue.

27
28
27

1
2
3
4

XI.

Atheros, Sigma and ATTS’s motion for partial summary judgment
of non-infringement of the ‘313 patent
In construing the ‘313 patent’s claim 1 element, “host

interface means,” the Court found that the function of “managing
data transfers between the host address space and the buffer

5
6
7

memory in operations transparent to the host system” necessarily
includes the function of remapping a section of the host address

8

space in the host system to the buffer memory.

9

Construction Order, Docket No. 634 at 13.

Second Claim

Atheros, Sigma and ATTS

United States District Court
For the Northern District of California

10

contend that Dr. Mitzenmacher’s report does not provide any

11

analysis to indicate that these Defendants’ accused products

12

practice the claims under the Court’s construction.

Sigma and

13
ATTS argue that the same is true for the claims dependent on claim
14
15
16
17

1 in the ‘313 patent, as well as claim 13 and its dependent
claims.
However, as discussed above, the Court grants summary

18

adjudication of non-infringement of the asserted claims of the

19

‘313 patent by any of the accused products.

20
21

Thus, the Court need

not address this issue.
CONCLUSION

22
23
24
25

As discussed above, the Court has adjudicated the status of
each asserted claim of the patents-in-suit as follows:
The Court (1) DENIES USEI’s motion for summary adjudication

26

of non-anticipation of the asserted claims of the ‘872 or ‘094

27

patents by the SONIC prior art reference, and instead GRANTS

28
28

1

Defendants’ motion for invalidity of the asserted claims of the

2

‘872 or ‘094 patents in view of the SONIC prior art reference;

3

(2) DENIES USEI’s motion for summary judgment against Intel, and

4

Defendants using Intel chips, of infringement of claim 21 of the

5

‘872 patent as moot; and (3) DENIES USEI’s motion for summary

6
7

judgment that Intel may not present any equitable defense because
it intentionally copied USEI’s patented invention.

8
9

With regard to Defendants’ motions for summary judgment, the

United States District Court
For the Northern District of California

10

Court GRANTS the following motions: (1) for summary adjudication

11

that SONIC anticipates the asserted claims of the ‘872 and ‘094

12

patents; (2) for summary adjudication of non-infringement of

13

claims 1 and 13 of the ‘313 patent by any of the accused products;

14

and (3) for summary adjudication of non-infringement of claims 1

15

and 44 of the ‘459 patent by the Intel and HP accused products.

16
17
18

The Court DENIES the following Defendants’ motions as moot:
(1) to exclude Mr. Bratic’s expert testimony regarding all four

19

patents-in-suit as moot; (2) for summary adjudication of

20

anticipation of claim 21 of the ‘872 patent by the Intel 82593

21

chip prior art; (3) for summary adjudication of anticipation of

22

claims 9, 28 and 39 of the ‘094 patent by the Intel 82593 chip

23
24

prior art; (4) for summary judgment of invalidity, under § 112, of
claim 13 of the ‘313 patent and claim 1 of the ‘459 patent;

25
26

(5) MSI’s motion for partial summary judgment to exclude foreign

27

non-party sales from USEI’s asserted damages base; (6) Apple’s

28

motion for summary adjudication of non-infringement of claims 1,
29

1

9, 12 and 28 of the ‘094 patent; and (7) Atheros, Sigma and ATTS’s

2

motion for partial summary judgment of non-infringement of the

3

‘313 patent.

4
5
6
7

Accordingly, all of the asserted claims of the patents-insuit are resolved in favor of Defendants.

The Clerk of the Court

shall enter judgment in favor of Defendants, who shall recover
costs from USEI.

8
9

United States District Court
For the Northern District of California

10
11
12

IT IS SO ORDERED.
Dated:

November 7, 2014

CLAUDIA WILKEN
United States District Judge

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