STC.UNM v. Intel Corporation

Filing 110

BRIEF on Claim Construction by Intel Corporation (Atkinson, Clifford)

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UNITED STATES DISTRICT COURT DISTRICT OF NEW MEXICO STC.UNM, Civil No. 1:10-cv-01077-RB-WDS Plaintiff, v. INTEL CORPORATION, Defendant. INTEL’S OPENING BRIEF ON CLAIM CONSTRUCTION Douglas A. Baker Clifford K. Atkinson A TKINSON , T HAL & B AKER , P . C . 201 Third Street, N.W., Suite 1850 Albuquerque, NM 87102 (505) 764-8111 Robert A. Van Nest Brian L. Ferrall Benedict Y. Hur KEKER & VAN NEST LLP 710 Sansome Street San Francisco, CA 94111 (415) 391-5400 Chad. S. Campbell Timothy J. Franks P ERKINS C OIE LLP 2901 N. Central Avenue, Suite 2000 Phoenix, AZ 85012 (602) 351-8000 Table of Contents Introduction .....................................................................................................................................1 Principles of Claim Construction ....................................................................................................2 Technology Background..................................................................................................................4 A. Photolithography and Double Patterning.................................................................4 B. Fourier Transforms and Spatial Frequencies...........................................................7 The ’998 Patent and the Claimed Methods .....................................................................................9 Argument .......................................................................................................................................15 A. “spatial frequencies” [of a Fourier transform].......................................................15 B. “a pattern wherein the Fourier transform of said pattern contains high spatial frequencies” ......................................................................................17 C. “combining nonlinear functions of intensity of at least two exposures combined with at least one nonlinear processing step intermediate between the two exposures” ............................................................21 D. “first mask material”..............................................................................................22 E. “[first/second] pattern in said [first/second] photoresist layer” .............................23 F. “parts of said first mask layer” ..............................................................................23 G. “a combined mask including parts of said first mask layer and said second photoresist” .......................................................................................26 Conclusion .....................................................................................................................................27 –i– Introduction STC, the licensing arm of the University of New Mexico, alleges that portions of Intel’s advanced manufacturing processes infringe two claims of STC’s U.S. Patent No. 6,042,998 (“the ’998 patent”). Patent claims set out the metes and bounds of a patentee’s rights, and the scope of those claims is critical in determining whether they are valid and infringed. Under Markman v. Westview Instruments, Inc., 517 U.S. 370 (1996), it is the Court’s responsibility to construe the scope of disputed claim terms. The Court’s claim constructions will govern any summary judgment motions and will become jury instructions if a trial proves necessary. The primary asserted claim, claim 6, is somewhat daunting at first blush because it refers to arcane mathematical concepts and lists a long set of technical steps that must be performed. Moreover, although concepts such as “double patterning” and “spatial frequencies” were well known before the alleged invention, the patent’s description of the invention does not explain them because it was written for scientists rather than the laypeople who must decide this case. Accordingly, after summarizing the law of claim construction, this brief will start by providing background about the use of photolithography to form patterns during semiconductor manufacturing and about the use of Fourier mathematics to describe the properties of patterns. Armed with that background, the Court will appreciate what claim 6 requires: a specific set of steps requiring patterning a first mask layer, then patterning a second photoresist layer, and then using the first mask and second photoresist layers as a “combined mask” to transfer both patterns into the underlying substrate. As shown below, Intel’s proposed constructions are clear, precise, and consistent with the claim language, the written description of the invention in the patent, and the public record that the patentees created before the Patent and Trademark Office –1– (“PTO”). By contrast, STC’s constructions are overbroad, difficult to understand, and based on misapprehensions of the patent and its file history. Principles of Claim Construction An issued U.S. patent contains several sections. The title page includes bibliographical information and a short “abstract” of the claimed invention. Next come the “figures” (drawings illustrating the claimed invention), followed by a written description describing the state of the art, the problem to be solved, and the inventors’ purported solution. Finally, a set of claims sets out the particular methods or devices over which the patentees claim exclusive rights. The administrative record of the patent’s “prosecution” also becomes a public document. While pursuing a patent, applicants may cancel, add, or amend claims; they may narrow or clarify the meaning of claim terms to overcome rejections by the examiner; and they may take other actions that affect the eventual scope and validity of the claims. Together, the patent and its prosecution history make up the “intrinsic” record for purposes of claim construction. Six years ago, the Federal Circuit, which is responsible for patent appeals nationwide, restated the law of claim construction in a landmark en banc decision, Phillips v. AWH Corp., 415 F.3d 1303 (2005), that remains black-letter law today. As explained below, Phillips emphasizes the primary role of intrinsic evidence, but it still allows some consideration of extrinsic evidence to help understand the invention and the meaning of particular claim terms. The presumed audience for a patent is a person of ordinary skill in the relevant art at the time of the alleged invention, and claims are construed as such a person would have understood them. Id. at 1313. The meaning of an ordinary English term may be readily apparent to lay judges, and “[i]n such circumstances, general purpose dictionaries may be helpful.” Id. at 1314. –2– Often, however, claim terms are terms of art. Id. In such cases, courts look to “‘those sources available to the public that show what a person of skill in the art would have understood disputed claim language to mean.’” Id. Such sources “include ‘the words of the claims themselves, the remainder of the specification, the prosecution history, and extrinsic evidence concerning relevant scientific principles, the meaning of technical terms, and the state of the art.’” Id. “[T]he context in which a term is used in the asserted claim can be highly instructive,” as can “[o]ther claims of the patent in question, both asserted and unasserted.” Id. The claims, however, “are part of a ‘fully integrated written instrument’” and thus “‘must be read in view of the specification, of which they are a part.’” Id. at 1315. “[T]he specification ‘is always highly relevant to the claim construction analysis. Usually, it is dispositive; it is the single best guide to the meaning of a disputed term.’” Id. For example, the specification may reveal the patentee’s special meanings (“lexicography”) or an intent to limit or disavow claim scope. Id. at 1316. But although courts should construe claims in light of the specification, they must also take care to avoid improperly importing limitations into the claims based on descriptions of merely exemplary embodiments. Id. at 1323. Courts “‘should also consider the patent’s prosecution history …,’” as it may show “how the PTO and the inventor understood the patent.” Id. at 1317. “Yet because the prosecution history represents an ongoing negotiation between the PTO and the applicant, rather than the final product of that negotiation, it often lacks the clarity of the specification and thus is less useful for claim construction purposes.” Id. “Nonetheless, the prosecution history can often inform the meaning of the claim language by demonstrating how the inventor understood the –3– invention and whether the inventor limited the invention in the course of prosecution, making the claim scope narrower than it would otherwise be.” Id. Extrinsic evidence from outside the public record may provide useful background, but it is generally “‘less significant than the intrinsic record in determining “the legally operative meaning of claim language.”’” Id. Treatises and dictionaries (especially technical dictionaries) can be useful guides to accepted technical meanings. Id. at 1318. And expert testimony can also provide useful background. Id. But extrinsic evidence may be “less reliable than the patent and its prosecution history in determining how to read claim terms.” Id. To preserve the important public notice function of a patent, extrinsic evidence must be “considered in the context of the intrinsic evidence.” Id. at 1319. Even so, “there is no magic formula or catechism for conducting claim construction,” and judges may consider appropriate resources in any desired sequence as long as they assign appropriate weight. Id. at 1324. Technology Background A. Photolithography and Double Patterning Semiconductor chips are initially fabricated en masse on large circular “wafers” of silicon and then cut into individual chips. During fabrication, tiny three-dimensional features are constructed layer by layer, in thousands of precise steps performed in dimensions far too small to see with the naked eye or even an ordinary microscope. This case involves a portion of the manufacturing process called “photolithography.” Semiconductor photolithography is similar to lithographic printing in that it involves printing a desired pattern onto a workpiece. In semiconductor manufacturing, however, the pattern –4– corresponds to the design of electrical circuitry rather than artwork, and the workpiece is a wafer or another material on the wafer rather than paper. Figure 1: A Simple Photolithography System Photolithography involves multiple steps. The manufacturer first coats the wafer with a light-sensitive material known as “photoresist.” In most commercial manufacturing, the next step is to “expose” an image onto the photoresist using a light source (typically a laser), lenses, and a “photomask” in which a desired two-dimensional pattern has been formed. That exposure causes chemical changes in the photoresist. Next, the photoresist is “developed” so that only the portion that was exposed to the light (or, if another type of photoresist is used, the portion that was not exposed to the light) remains on the wafer. The patterned photoresist can then be used as an “etching mask” to transfer the pattern into layers beneath it. In particular, chemicals or a plasma may be used to etch into the underlying layer, with the protective photoresist mask preventing –5– etching wherever it covers that layer. Finally, the photoresist is removed, revealing the desired pattern in the underlying layer. [Declaration of Professor Bruce Smith (“Smith Decl.”) ¶ 3] This fundamental approach to photolithography has been used for many decades and long predates the ’998 patent. What has changed over time is the size of transistors and other devices on semiconductor chips. “Moore’s Law,” coined by Intel co-founder Gordon Moore in the 1960s, predicts that the number of transistors that can be formed on a chip will double every 1½ to 2 years. This shrinkage results in better performance and lower costs, and it has led to improvements in products ranging from mobile phones to personal computers to cars. But such technological progress is not automatic, and semiconductor manufacturers must constantly improve their lithography methods so that they can print ever smaller patterns and produce chips with ever more tightly packed features. For example, over time, the industry has reduced the wavelengths of the laser light used to draw the patterns, developed more advanced photoresists, and implemented a variety of other techniques to continue this progress. [Id. ¶ 3] One long-studied technique for improving pattern quality and density is “double patterning”: using two exposures of photoresist to create a pattern in a single layer. To print a particularly complex, dense pattern with elements very close to one another, it often works better to print the pattern in two steps, with each step including only part of the overall pattern. Semiconductor manufacturers and researchers had developed a variety of double patterning techniques before the claimed invention occurred. [Id. ¶ 5] As discussed below, the applicants for the ’998 patent did not purport to invent double patterning generally. Instead they purport to have developed and patented particular techniques of double patterning that enabled them to produce patterns with greater feature density. –6– Figure 2: Double Patterning B. Fourier Transforms and Spatial Frequencies In the early 1800s, French mathematician Joseph Fourier explained that any signal can be decomposed or “transformed” into a sum of sinusoidal waves having different frequencies (rates of repetition), phases (lateral positions), and amplitudes (heights). By analogy, consider a musical chord. Although the chord seems to be a single sound, it is actually a complex sound wave that can be broken down into a sum of the constituent notes that a musician plays to produce the chord. Each note corresponds to a sound wave at a certain frequency, with a certain phase, and with a certain amplitude. Separating the notes of the chord is akin to taking its Fourier transform. [Id. ¶ 6] –7– The same Fourier transformation approach can be used to derive “spatial frequencies” of visible images and patterns. Any pattern can be represented by a set of waves having different frequencies, phases, and amplitudes. The frequencies of those component waves (how often they repeat in a unit of distance) are called “spatial frequencies,” and the amplitudes of the component waves are called the “coefficients” of the corresponding spatial frequencies. [Id.] For example, consider a picket fence made of identical slats. The fundamental curve corresponding to that pattern would be a sine wave with peaks at the centers of each slat and troughs between each pair of slats. The spatial frequency of that curve would be its period: the number of slats per unit of distance. [See Smith Decl. ¶¶ 6, 8; see also ’998(2:26-27) (“‘period,’ with dimensions of nm–1, is used interchangeably with “spatial frequency”)] For a denser pattern with narrower slats, that spatial frequency would be greater. Figure 3: Fourier Decomposition and Spatial Frequencies –8– Complex patterns (and even the relatively simple pattern above) must be broken down into numerous component curves, each having its own spatial frequency, phase, and amplitude. The Fourier transform of a pattern thus may have many spatial frequencies. In general, the lower spatial frequency terms of a Fourier transform represent the fundamental shape, location, and periodicity of the pattern, while the higher spatial frequency terms represent more abrupt changes. A full range of spatial frequency terms is necessary to represent the pattern completely. [Smith Decl. ¶ 7; Declaration of Brian L. Ferrall (“Ferrall Decl.”) Exs. 6-8 (articles summarizing Fourier series and spatial frequencies)] Fortunately, neither the Court nor the jury needs to master Fourier mathematics for this case. The asserted claims recite manufacturing steps that must be performed in the concrete, physical world, not in the abstract world of Fourier mathematics, and the most important claim construction disputes between the parties involve the required physical-world steps. The ’998 Patent and the Claimed Methods According to STC, the ’998 patent [Ferrall Decl. Ex. 1] arose out of research conducted at the University of New Mexico during the 1990s. The applicants experimented with lithographic equipment in an effort to create simple, densely packed patterns (e.g., a series of lines or an array of holes). The experiments primarily involved interferometric lithography. [See, e.g., ’998(5:30-6:48; 10:63-11:27)] Unlike conventional commercial lithography, interferometric lithography uses no photomask. It instead uses two lasers whose beams interfere with each other, resulting in a precisely controllable image of parallel lines. But although interferometric lithography is useful for creating patterns of dense, tightly controlled lines in a research environment, it is rarely used in commercial production because actual semiconductor chips –9– typically involve much more complex patterns, shapes, and sizes. [Smith Decl. ¶ 4] Indeed, the applicants did not manufacture any working integrated circuits. [Ferrall Decl. Exs. 4 (transcript of Hersee deposition) at 31:17-19 & 5 (transcript of Zaidi deposition) at 30:11-13] As the ’998 patent acknowledges, scientists in photolithography had long known of inherent “nonlinear” properties of photoresist. Instead of responding proportionately to light, photoresist triggers after a certain level of exposure. As a result of this property, photoresist tends to form three-dimensional patterns with nearly vertical sidewalls when it is developed. Those vertical sidewalls are desirable because they enable greater precision in transferring patterns from the photoresist to layers below. In Fourier terminology, the three-dimensional pattern created in the photoresist has higher spatial frequencies not present in the image shone on the photoresist and not achievable through ordinary “linear” optics. As the applicants noted, however, using photoresist in this conventional way adds higher spatial frequencies only in the z (vertical) direction, not in the x–y plane of the substrate. [’998(7:41-8:66)] Using photoresist does not achieve higher pattern density. [Ferrall Decl. Ex. 5 (Zaidi dep.) at 48:17-49:4] The applicants described and claimed several purportedly new ways of using double patterning to increase pattern density and extend spatial frequencies in the x–y plane beyond what an optical system could achieve. One approach, reflected in claim 1 (which STC has not asserted here), separately patterns two photoresist layers and then combines the two patterns to make a final, joint pattern that can be transferred to a substrate. In particular, the first photoresist layer is deposited, exposed to an optical image, and developed to form a first pattern. Then a second photoresist layer is deposited over the substrate (including the patterned first photoresist). The second photoresist is then exposed and developed, creating a second pattern in the second – 10 – photoresist layer. Finally, the two patterns in the two photoresist layers are combined. [’998(20:42-67)] Figure 4: Claim 1 (Two Photoresists, No Intermediate Mask Layer) In claim 6, which is asserted in this case, the applicants described a more complex method requiring transferring the pattern in the first photoresist layer into an additional, “sacrificial” mask layer and later creating a “combined mask” out of that layer and the pattern in the second photoresist layer. Under this approach, a harder mask material that will not be removed when the photoresist is stripped (e.g., silicon nitride, Si3N4) is deposited onto the substrate before the first photoresist layer is applied. The first photoresist layer is then deposited, exposed, and developed to form a first pattern. That pattern is then transferred into the sacrificial mask layer, for example by using chemicals to etch into the mask layer where the photoresist is – 11 – not present. Then the first photoresist layer is removed, and a second photoresist layer is applied, developed, and exposed, creating a second pattern in the second photoresist. The pattern in the first mask layer and the different pattern in the second photoresist layer are then used as a “combined mask” so that both patterns can be transferred into the substrate—by a second etching step, for example. Finally, the remaining photoresist and mask material are removed to reveal a double-patterned substrate. [’998(21:14-46); see also ’998(13:63-14:17)] Figure 5: Claim 6 (Combined Mask Comprising First Mask Layer and Second Photoresist) Claim 6 reads as follows, with the disputed terms italicized: 6. A method for obtaining a pattern wherein the Fourier transform of said pattern contains high spatial frequencies by combining nonlinear functions of intensity of at least two exposures combined with at least one nonlinear processing step – 12 – intermediate between the two exposures to form three dimensional patterns comprising the steps of: coating a substrate with a first mask material and a first photoresist layer; exposing said first photoresist layer with a first exposure[;] developing said photoresist to form a first pattern in said first photoresist layer, said first pattern containing spatial frequencies greater than those in a two dimensional optical intensity image imposed onto said photoresist layer in said first exposure as a result of a nonlinear response of said first photoresist layer; transferring said first pattern into said first mask material, said first mask material comprising at least one of SiO2, Si3N4, a metal, a polysilicon and a polymer; coating said substrate with a second photoresist; exposing said second photoresist with a second exposure[;] developing said second photoresist layer to form a second pattern in said second photoresist layer, said second pattern containing spatial frequencies greater than those in a two dimensional optical intensity image imposed onto said photoresist layer in said second exposure as a result of a nonlinear response of said second photoresist layer; transferring said first pattern and said second pattern into said substrate using a combined mask including parts of said first mask layer and said second photoresist; removing said first mask material and said second photoresist.1 The ’998 patent also describes various other double-patterning methods. For example, claim 8 (which STC no longer asserts) recites a method of doubling feature density by exposing and developing the same pattern twice, but with an offset of half the minimum “pitch” between features the second time so that the features are interpolated. [’998(21:50-65); see also 1 Claim 7, also asserted, recites alternative ways of transferring the pattern, including deposition and lift-off and damascene techniques as well as conventional etching: 7. The method of claim 6 wherein said transferring step includes at least one of etching, deposition[-]and-lift[-]off, and damascene. – 13 – ’998(9:66-10:10, 15:30-16:9)] The embodiments of claims 6 and 8 also differ in another important way: their use of an intermediate layer to retain the patterns developed in the photoresist layers for use in etching the substrate. In claim 6, the first pattern is transferred into an intermediate mask layer, but the second pattern is not: the substrate is patterned using a “combined mask” comprising the patterned mask layer and the patterned second photoresist. Claim 8 does not recite a mask layer, but it requires both patterns from both photoresist layers to be transferred into an underlying “material” that could serve as a mask in later processing. Moreover, claim 8, unlike claim 6, does not require transferring both patterns into the substrate using a “combined mask” comprising a patterned mask layer and a patterned photoresist layer. Figure 6: Claim 8 (Two Offset Patterns, Both Transferred to an Underlying Material) – 14 – Argument For the Court’s convenience, the discussion below addresses the disputed terms in the order in which they appear in claim 6. That order does not, however, necessarily reflect the relative importance of the terms. For example, the parties’ dispute over the meaning of “spatial frequencies” is relatively narrow: they essentially agree on what “spatial frequencies” are, but differ somewhat on how to explain such a technical term to a lay audience. The issues where the parties diverge the most involve the critical penultimate step of claim 6, which requires transferring said first pattern and said second pattern into said substrate using a combined mask including parts of said first mask layer and said second photoresist. As shown below, the meaning of this clause is clear from both its plain language and the written description of the invention. STC’s constructions distort and broaden it in an attempt to cover a broader array of double patterning techniques that the applicants neither invented nor claimed. A. “spatial frequencies” [of a Fourier transform] Intel’s Construction STC’s Construction “a measure of how often components of an image or pattern repeat in a given unit of distance” Optional further explanation if the Court desires: “Technically speaking, a mathematical operation called the ‘Fourier transform’ represents the image or pattern as a series of waves, and ‘spatial frequencies’ indicate how frequently each of those waves repeats across space.” “A mathematical representation of a pattern. Technically defined, spatial frequencies are the coordinates in the Fourier plane resulting from the Fourier transform of the features that have been patterned.” Intel’s definition of “spatial frequencies” as “a measure of how often components of an image or pattern repeat in a given unit of distance” is scientifically accurate, clear, and helpful to the laypeople who must apply this construction. [See Smith Decl. ¶¶ 6-8; Ferrall Decl. Exs. 6-8 – 15 – (technical articles)] Intel’s construction also comports with the specification’s equation of “spatial frequency” with the “period” of a pattern and its statement that “spatial frequencies are given as the inverse of the corresponding length scale in the image.” [’998(2:19-27)] The mathematical details of how spatial frequencies are calculated can be left to expert testimony. Nevertheless, if the Court desires to include more a technical explanation, Intel has proposed an additional sentence explaining that a “Fourier transform” (a term also used in claim 6) is a way of mathematically representing a real-world pattern by decomposing it into a series of waves, and that “spatial frequencies” are the frequencies at which those component waves repeat per unit of distance. This statement helps explain both the “spatial” and “frequencies” aspects of “spatial frequencies,” and it is consistent with both the intrinsic evidence [’998(8:18-22) (defining the Fourier transform of a fluence profile); Ferrall Decl. Ex. 3 (5/18/99 Response) at 5 (“It is well known in the art that any pattern can be equivalently described by specifying the amplitudes and phases of the spatial frequencies in the pattern’s Fourier transform.”)] and the extrinsic evidence [Ferrall Decl. Exs. 6-8 (technical articles)]. By contrast, STC’s proposed construction is both inaccurate and overly complex. The first sentence, saying that “spatial frequencies” are a “mathematical representation of a pattern” is simplistic and technically imprecise. In actuality, the Fourier transform is the mathematical representation of the pattern, and spatial frequencies are components of that transform (along with amplitudes and phase terms). [Smith Decl. ¶ 6; Ferrall Decl. Exs. 6-8] STC’s second sentence, referring to “coordinates in the Fourier plane resulting from the Fourier transform,” is more accurate, but unhelpful: it substitutes one set of technical jargon for another and would make no sense to anyone not already an expert in Fourier mathematics. The second sentence of – 16 – Intel’s construction, referring to component waves rather than coordinates in the Fourier plane, is more helpful because it uses terminology that laypeople can visualize. B. “a pattern wherein the Fourier transform of said pattern contains high spatial frequencies” Intel’s Construction STC’s Construction “a pattern whose density in the x–y plane (the plane of the substrate) is greater than the optical system could produce” “the final pattern resulting from the below method steps have spatial frequencies (1) that are not present in any of the individual exposures, and (2) whose magnitudes are larger than the limit of the linear optical system response, resulting in sharper corners, smaller features, or higher pattern density” Because “patterns” are real-world phenomena, because claim 6 ultimately requires realworld steps, and because laypeople understand real-world concepts better than mathematical concepts, Intel’s proposed construction focuses on what a pattern whose Fourier transform has “high spatial frequencies” will look like. It also captures the purportedly unique result of the claimed steps, rather than results that can be obtained by other means. By contrast, STC’s construction focuses primarily on the Fourier world, and when it finally (in its last clause) converts the claim language into real-world phenomena, it is both confusing and misleading. On its face, the term “high spatial frequencies” is ambiguous: it begs the question “how high?” But applicants are entitled to set out and adopt their own definitions, and the specification here provides some guidance. In particular, it indicates that “high” spatial frequencies are additional spatial frequencies higher than the optical system could otherwise produce. [See, e.g., ’998(12:17-18, 50-51) (referring to “high” spatial frequencies as those “beyond the optical propagation limit” and “extending beyond the capabilities of an optical system”)] – 17 – This leaves the question of what “high” spatial frequencies represent in the real world. Intel agrees that increasing pattern density in the x–y plane beyond what the optical system could produce results in “high” spatial frequencies. If a process makes a series of lines twice as dense, for example, the frequency of the pattern will be twice as great. [See Smith Decl. ¶ 8; see also ’998(16:9-32)] Indeed, the patentees represented to the PTO that their invention was novel over the prior art in part because it “use[d] frequency doubling to obtain a denser pattern ….” [Ferrall Decl. Ex. 3 (5/18/99 Response) at 7; see also id. Ex. 2 (1/14/99 Response) at 8 (describing the invention as “increasing the pattern density in the plane of the wafer”)] Contrary to STC’s suggestion, however, it is not true that reducing feature sizes or sharpening corners in the x–y plane reflects the invention in claim 6, or that smaller features and sharper corners correspond to spatial frequencies higher than the optical system could produce. The sizes of features on a chip can be reduced in many ways, most of which do not produce higher spatial frequencies than the optical system can produce. [See ’998(7:33-40); see also Ferrall Decl. Ex. 2 (1/14/99 Response) at 10 (distinguishing earlier patent that described how to make thinner lines but did not increase feature density); Smith Decl. ¶ 10] For example, one can reduce the feature size of a line by exposing the photoresist to less light so that only a smaller portion of it develops. Or one can use etching to eat away all but the tiniest dimensions. Indeed, larger sized features can have the same or greater spatial frequency than smaller features. Feature size alone, without knowledge of pattern density, is not enough to ascertain the spatial frequency content of a pattern. [Smith Decl. ¶ 10] In fact, the patent and prosecution history describe only one way in which high spatial frequencies and smaller feature sizes are linked—a way that the patentees admittedly did not – 18 – invent and a way that involves high spatial frequencies in the z dimension rather than high spatial frequencies for the pattern in the x–y plane. As discussed above, it was well known by the date of the claimed invention that photoresist exposure and development inherently produced sharp, nearly vertical sidewalls in the z dimension, which can help a manufacturer reduce feature size. [See ’998(7:41-8:53); see also Ferrall Decl. Ex. 3 (5/18/99 Response) at 6; Smith Decl. ¶ 9] Sharper profiles in the z dimension also correspond to higher spatial frequencies in that dimension, but the patent itself acknowledged that the spatial frequency components in the x–y plane are unaffected. The focus of the purported invention was on improving results in the x–y plane, not in the z dimension. [’998(8:54-66)] Furthermore, the applicants told the PTO during prosecution that sharp corners of features in the x–y plane do not necessarily correspond to additional, higher spatial frequencies in that plane. The ’998 patent described a method for producing squared off (“sharp”) corners rather than rounded corners in the x–y plane—e.g., the rectangular features of Figure 6B rather than the elliptical features of Figure 6A. [See ’998(12:56-13:31)] But the patent did not say that patterns of squarer features necessarily have higher spatial frequencies than patterns of rounder features, much less spatial frequencies higher than the optical system can produce. To the contrary, during prosecution the applicants expressly acknowledged that the patterns in Figures 6A and 6B “have the same spatial frequencies,” just a different “distribution” of those frequencies. [Ferrall Decl. Ex. 2 (1/14/99 Response) at 9 (emphasis added); see also id. Ex. 3 (5/18/99 Response) at 7 (referring to “redistribution of Fourier intensities to obtain square two dimensional holes at the resolution limit with square profiles”) (emphasis added)] In other words, the coefficient weights on the component spatial frequencies (sinusoidal curves) change, but the – 19 – spatial frequencies themselves remain unchanged. [Ferrall Decl. Ex. 2 (1/14/99 Response) at 9 (discussing the different “roll-off of the magnitudes of the Fourier coefficients” in the round and square cases) (emphasis added); Smith Decl. ¶ 10] Claim 6 refers to obtaining additional, “high” spatial frequencies, not to reweighting the same spatial frequencies. Because small features and sharp corners often do not correlate with high spatial frequencies, STC’s construction would work mischief and should be rejected. STC must not be permitted to expand the claims and suggest, for example, that a pattern’s Fourier transform has high spatial frequencies because the pattern has square corners, small features, or high density. The final clause of STC’s construction is also problematic because it ambiguously refers to “sharper” corners, “smaller” features, and “higher” pattern density without identifying the comparator. STC’s construction does not specify and leaves open to speculation whether it means sharper corners, smaller features, and higher pattern density than in the individual exposures; sharper corners, smaller features, and higher pattern density than the optical system could produce; or something else. The term “sharper corners” is ambiguous in another way as well. A three-dimensional pattern can have corners in the x–y, x–z, and y–z planes. STC’s construction does not indicate whether the sharper corners to which it refers may be in any of those planes or just in the x–y plane. The difference is important because, as the applicants themselves recognized, it was well known that exposing and developing photoresist inherently results in sharp sidewalls in the z direction and thus sharp corners in the x–z and y–z planes. Intel’s construction, in contrast, provides a clear and accurate definition solidly grounded in the ’998 patent: “high spatial frequencies” indicate denser features on the surface of the wafer than the optical system could produce. Intel’s construction is one that the Court and, if necessary, – 20 – the jury, can readily and accurately apply. If the surface plane of the wafer has more features on it than the optical system could produce, then high spatial frequencies exist. If not, then not. C. “combining nonlinear functions of intensity of at least two exposures combined with at least one nonlinear processing step intermediate between the two exposures” Intel’s Construction STC’s Construction “combining the response of two exposures of photoresist and at least one nonlinear processing step (for example, development of the first photoresist) that occurs after the first exposure and before the second exposure” “combining the patterns that were formed in the two exposed photoresists, and having a non-linear process step, for example, development of the first resist, after the first exposure and before the second exposure” The parties’ proposed constructions of this term are similar, but there is an important difference: STC’s construction refers to combining the patterns in the two exposed photoresists. STC’s construction is incorrect on two levels. First, this limitation does not discuss combining patterns. It discusses combining “nonlinear functions of intensity of at least two exposures” with a nonlinear processing step between the two exposures. The focus is on the response of the photoresist to the two exposures, not the patterns that later result. Second, neither the preamble nor the body of claim 6 refers to combining the patterns formed in the two photoresist layers. To the contrary, the body of the claim makes clear that the combination of patterns occurs by using a “combined mask” of the first mask layer and the second photoresist to transfer both patterns to the substrate. Nowhere does the claim refer to combining the two exposed photoresist layers, as STC’s construction would suggest. – 21 – D. “first mask material” Intel’s Construction STC’s Construction “material that is not photoresist, and that shields some or all of the underlying layer” “a layer of material used to preserve the first pattern for later use in the combined mask” The term “first mask material” originally appears in the claim phrase “coating a substrate with a first mask material and a first photoresist layer.” That phrasing makes clear that the mask material must be separate and distinct from the photoresist layer. The other steps of claim 6 confirm the distinction: a pattern is later formed in the first photoresist layer and then transferred into the first mask material. Intel’s construction appropriately reflects this distinction. Intel’s construction further clarifies what a “mask” is: a mask by definition serves to shield some or all of an underlying layer from something else (e.g., light or chemicals). [See Smith Decl. ¶ 11; Ferrall Decl. Ex. 9 (scientific dictionary definition)]2 STC’s construction says both too much and too little. First, the mask material itself is a layer of film. The mask layer exists before it is patterned, and it should not be defined by the way in which it will be altered in a later step. Second, STC’s construction does not go far enough because it focuses solely on the role that the mask layer plays later in the claim. Intel agrees that the first mask material is used “to preserve the first pattern for later use in the combined mask,” but that much is clear from the claim language expressly requiring “transferring said first pattern into said first mask material” and “using a combined mask including parts of said first mask layer.” Moreover, the first photoresist layer also “preserve[s] the first pattern for later use in the 2 The first “transferring” step of claim 6 further requires that the first mask material include silicon dioxide (SiO2), silicon nitride (Si3N4), a metal, a polysilicon, and/or a polymer, but that additional requirement is clear on its face and need not be repeated here. – 22 – combined mask,” and the first photoresist and first mask layers are distinct. The first mask layer is not, as STC would have it, any “layer of material used to preserve the first pattern for later use in the combined mask.” The Court needs to make clear that the first mask layer cannot be the first photoresist layer itself. E. “[first/second] pattern in said [first/second] photoresist layer” Intel’s Construction STC’s Construction “the configuration of the [first/second] photoresist layer remaining after developing” “shape(s) resulting from developing the photoresist” Claim 6 requires “developing said [first] photoresist [layer] to form a first pattern in said first photoresist layer” and later “developing said second photoresist layer to form a second pattern in said second photoresist layer.” Intel’s construction makes clear that the pattern in a photoresist layer is what remains of that layer after it has been exposed and developed. This is plainly correct: the claim itself states that the pattern is “in” the photoresist layer. By contrast, STC’s construction—“shape(s) resulting from developing the photoresist”— is flawed because it does not state where the “shape(s)” must be. The claim language emphasizes that the pattern must be “in said [first/second] photoresist layer” itself. F. “parts of said first mask layer” Intel’s Construction “the portions of the ‘first mask material’ that remain after the first ‘transferring’ step” STC’s Construction “some or all of the first pattern from the first mask layer” Claim 6 requires “transferring said first pattern and said second pattern into said substrate using a combined mask including parts of said first mask layer and said second photoresist.” A threshold problem with “parts of said first mask layer” is that claim 6 nowhere refers to any – 23 – “first mask layer.” Nevertheless, the claim previously refers to a “first mask material,” so “first mask layer” presumably refers to a layer formed from the “first mask material.” The question, then, becomes which “parts” of the “first mask material” are included in the “combined mask.” And the answer is all portions that remain after the first pattern has been transferred into the first mask layer. The claim language makes clear that all of the first pattern and all of the second pattern must be transferred into the substrate: it requires “transferring said first pattern and said second pattern into said substrate using a combined mask,” not just some of each pattern. The specification is consistent and makes clear that the combined mask includes the portions of the “first mask material” that remain after the “first pattern” is transferred into the “first mask material.” In particular, it describes (1) exposing and developing a pattern in the first photoresist layer; then (2) using a “suitable etching step” to transfer that first pattern into a “sacrificial” layer of SiO2 or Si3N4 (the claimed “first mask material”), then (3) exposing and developing a second pattern in a second photoresist layer, and then (4) transferring both the first and second patterns into the substrate using a “combined etch mask” including both the remaining portions of the sacrificial layer (the first pattern) and the second photoresist (the second pattern): In a preferred embodiment, a sacrificial layer, such as, for example a SiO2 or Si3N4 layer, is used with additional processing between the two exposures. More particularly, following a suitable interferometric lithography exposure and develop of a first pattern in a first photoresist layer, the resulting pattern is transferred into the sacrificial layer by a suitable etching step. Any remaining photoresist from the first photoresist layer is then removed and the wafer is then preferably coated with a second photoresist layer and a second exposure and develop sequence is suitably carried out to transfer a second pattern into this second photoresist layer. … A second etch step is preferably carried out to transfer the combined pattern into the underlying wafer layers. The second etch step – 24 – preferably uses a combined etch mask, parts of which are preferably comprised of the nitride layer and parts of which are comprised of the undeveloped photoresist layer. … Finally, the remaining mask layers, both photoresist and sacrificial material, are preferably removed. [’998(13:63-14:17)] STC’s construction of “parts of said mask layer” as “some or all of the first pattern from the first mask layer” must be rejected because the patent nowhere suggests that the applicants contemplated using only a subpart of the already-patterned first mask layer to transfer patterns into the substrate. Indeed, STC’s construction would undermine the point of having a first pattern at all. According to STC, regardless of what the first pattern contains, claim 6 covers the use of any portion of the pattern, no matter how small. Using one square of an entire checkerboard pattern would suffice; indeed, using a single pixel of an entire image would suffice. That is not the invention that the applicants described to the PTO and the world. As discussed above, the claim language requires the entire first pattern (“said first pattern”) to be transferred, and the specification similarly refers to transferring “the combined pattern,” not parts of the combined pattern, into the underlying layers [’998(14:8-10)]. When claim 6 refers to “parts” of the first mask layer, it merely reflects the fact that some of the original first mask material (before patterning) is etched away during the transfer of the first pattern into the first mask material. It does not suggest that only a portion of the first pattern must be transferred into the substrate. – 25 – G. “a combined mask including parts of said first mask layer and said second photoresist” Intel’s Construction STC’s Construction “a single mask consisting of (i) ‘parts of said first mask layer’ (defined above) and (ii) the patterned second photoresist, with each of the two independently shielding some part of the substrate not shielded by the other” “layering of the two lithographic patterns in the two layers and/or in the hard mask layer” The “combined mask” limitation is at the heart of claim 6, and STC’s construction would improperly blur this key term in an ill-disguised effort to broaden the scope of the claim. Claim 6 expressly requires that the “combined mask” “includ[e] parts of said first mask layer and said second photoresist.” The “first mask layer” component was discussed above. Intel’s construction further clarifies that the other component, “[parts of] said second photoresist,” refers to the portions of the second photoresist that remain after that layer has been patterned. Including all the remaining second photoresist in the combined mask is necessary to transfer the entire second pattern (“said second pattern”) into the substrate using the combined mask. The final clause of Intel’s construction (“each of the two independently shielding some part of the substrate not shielded by the other”) merely confirms that the two components of the combined mask have to be distinct. It makes no sense to speak of a “combined mask” or transferring two distinct patterns if one pattern is identical to or merely a subset of the other. STC, by contrast, is trying to read out claim 6’s express requirement that the combined mask comprise the first mask layer (as patterned) and the second photoresist layer (as patterned). Although STC lifts its proposed construction verbatim from the specification’s general Summary of the Invention [’998(9:56-62)], that statement does not correspond to the language of claim 6 and is virtually incomprehensible out of context. STC’s construction speaks of “layering of the – 26 – two lithographic patterns in the two layers and/or in the hard mask layer” (emphasis added). Although STC does not identify “the two layers” in its construction, Intel presumes that STC is referring to the two photoresist layers, as that is what the ’998 specification discusses at that point. [See ’998(9:46, 52-56)] But claim 6 is not so general. Claim 6 does not use the ambiguous term “layering,” and it does not cover use of any combination of patterns in the two photoresist layers and/or the hard mask layer. Instead, claim 6 expressly requires the two patterns to be transferred using parts of the “first mask layer” and the “second photoresist.” STC’s attempt to cloud this clear and specific requirement must be rejected. Instead of relying on the high-level Summary of the Invention that tries to generalize the approach used in all the claims (including claims 1 and 8, which, as discussed above, rely on different combinations of layers), the Court should look to the portion of the specification that actually parallels the language of claim 6. There the specification specifically refers to a single “second etch step” using a single “combined etch mask” comprised of the remaining portions of the first mask material (the nitride layer) and the remaining portions of the second photoresist layer (those not removed during the second development step): A second etch step is preferably carried out to transfer the combined pattern into the underlying wafer layers. The second etch step preferably uses a combined etch mask, parts of which are preferably comprised of the nitride layer and parts of which are comprised of the undeveloped photoresist layer. [’998(14:8-13) (emphasis added)] Intel’s proposed construction calls for exactly that sort of combined mask, and claim 6 should not be stretched to cover more than that. Conclusion The claims should be construed in accordance with Intel’s proposed constructions. – 27 – Dated: June 21, 2011. Respectfully submitted, A TKINSON , T HAL & B AKER , P . C . /s/ Clifford K. Atkinson Douglas A. Baker Clifford K. Atkinson 201 Third Street, N.W., Suite 1850 Albuquerque, NM 87102 (505) 764-8111 K EKER & V AN N EST LLP Robert A. Van Nest Brian L. Ferrall Benedict Y. Hur P ERKINS C OIE LLP Chad S. Campbell Timothy J. Franks Attorneys for Defendant Intel Corporation – 28 – Certificate of Service The undersigned hereby certifies that on June 21, 2011, the foregoing document and the cited declarations were electronically filed with the Clerk of Court using the CM/ECF system, which will automatically send notification of such filing to all counsel who have entered an appearance in this action. A TKINSON , T HAL & B AKER , P . C . /s/ Clifford K. Atkinson Clifford K. Atkinson 20336-1313/LEGAL21091877.5 – 29 –

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