Apple, Inc. v. Motorola, Inc. et al

Filing 92

Declaration of Christine Saunders Haskett filed by Plaintiffs Apple, Inc., NEXT SOFTWARE, INC. re: 90 Motion Requesting Claims Construction (Attachments: # 1 Ex. 1 Moto Infring. Cont. Ex. A, # 2 Ex. 2 '157 patent, # 3 Ex. 3 '179 patent, # 4 Ex. 4 '329 patent, # 5 Ex. 5 '230 file history, # 6 Ex. 6 Oxford dictionary definition, # 7 Ex. 7 '559 file history, # 8 Ex. 8 The OSI Model, # 9 Ex. 9 ISO Standard, # 10 Ex. 10 Japanese file history, # 11 Ex. 11 Japanese prosecution appeal, # 12 Ex. 13 Moto Infring. Cont. Ex. E, # 13 Ex. 14 IEEE Standard, # 14 Ex. 15 '333 patent, # 15 Ex. 16 '721 file history, # 16 Ex. 17 '193 file history, # 17 Ex. 18 Moto Infring. Cont. Ex. F, # 18 Ex. 19 Merriam Webster Dictionary, # 19 Ex. 20 Webster's Dictionary) (Haslam, Robert)

EXHIBIT 15

United States Patent

[19]

[11]

Twardowski

[45]

4,328,540

[54]

TRANSMITTER AND RECEIVER FOR
CONTROLLING REMOTE ELEMENTS

[75]

Inventor:

Joseph W. Twardowski, Schaumburg,
Ill.

[73]

Assignee:

Chamberlain Manufacturing
Corporation, Elmhurst, Ill.

[21]

Appl. No.: 422,452

[22]

Filed:

[51]
[52]
[58]

H04B 9/00; H04Q 9/00
340/825.69; 340/825.22;
340/825.31; 340/825.72; 455/151
Field of Search
340/825.69, 825.22,
340/825.31, 696, 825.72; 455/151
References Cited
U.S. PATENT DOCUMENTS
318/266
455/151

~

1423126

364/167

1/1976 United Kingdom

340/825.72

ABSTRACf

[57]

Sep. 23, 1982

4/1981 Lee et al.
9/1981 Muller et al.

5/1982 Matsuoka et al.

Primary Examiner-Donald J. Yusko

Int.
U.S. CI.

4,263,536
4,291,411

Aug. 13, 1985

FOREIGN PATENT DOCUMENTS

0. 3

[56]

4,535,333

Patent Number:
Date of Patent:

Transmitters and receivers for controlling remote elements which use a synchronous serial transmission format and which allows changes in coding to be automatically made between the receiver and transmitter and
wherein the code is stored in memories of the transmitter and receiver and wherein the receiver can generate
and transmit a new code with a light emitting diode so
as to change the code in the transmitter. The transmitter
and the receiver use micro-computers which are suitably programmed and include non-volatile memories.
12 Claims, 12 Drawing Figures

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Sheet 1 of9

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Sheet 20£9

FIG. 2

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Sheet 3 of9

Aug. 13, 1985

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4,535,333
2

Other objects, features and advantages of the invenTRANSMITIER AND RECEIVER FOR
tion will be readily apparent from the following deCONTROLLING REMOTE ELEMENTS
scription of certain preferred embodiments thereof
taken in conjunction with the accompanying drawings
CROSS-REFERENCE TO RELATED
5 although variations and modifications may be effected
without departing from the spirit and scope of the novel
APPLICATIONS
concepts of the disclosure and in which:
This application is related to co-pending application
of Joseph W. Twardowski and F. J. Liotine entitled
BRIEF DESCRIPTION OF THE DRAWINGS
"Method and Apparatus For Controlling the Coding In 10
FIG. 1 comprises a block diagram of the transmitter;
A Transmitter and Receiver".
FIG. 2 comprises a flow chart for the transmitter;
FIG. 3 comprises a block diagram for the receiver;
BACKGROUND OF THE INVENTION
FIG. 4 comprises a flow chart for the receiver;
1. Field of the Invention
FIG. 5 illustrates a transmission signal format;
This invention relates in general to control transmit- 15
FIG. 6A illustrates a sync header waveform;
ters and receivers and in particular to a novel control
FIG. 6B illustrates a terminating header waveform;
system.
FIGS. 7A and 7B comprise a schematic diagram of
2. Description of the Prior Art
the transmitter;
Remote control transmitters and receivers are known
FIGS. 8A and 8B comprise a schematic diagram of
as, for example, for garage door openers and other 20 the receiver; and
devices. Initially, a different carrier frequency was utiFIG. 9 illustrates a typical pulse train.
lized for each pair of transmitters and receivers so as to
isolate them from other units. Also, various coding
DESCRIPTION OF THE PREFERRED
schemes have been utilized to encode data into binary
EMBODIMENTS
form. Certain of such transmitters and receivers include 25
FIG. 1 illustrates in block form the transmitter of the
a plurality of two position switches which control the
invention which comprises an antenna 10, an RF transcoding for the transmitter and receiver and in such
mitter section 11 connected to the antenna and a microsystems the codes can be changed by manually changcomputer 12 supplying an input signal to the RF transing the positions of the switches to different positions to
mitter 11. The micro-computer is connected to a memassure that the position of the switches in the transmitter 30 ory 13 which may be a non-volatile type memory and a
and receiver are the same.
number of channel select inputs 16, 17, 18 and 19 are
connected to a channel selector unit 14 and supply inSUMMARY OF THE INVENTION
puts to the micro-computer 12. A power supply comThe present invention comprises a novel multi-chanprises a battery E and a transmif switch 22 such that
nel transmitter and receiver for controlling a plurality 35 when the transmit switch 22 is closed the transmitter is
of functions and includes the feature of changing the
energized by applying power to the various units of the
code in the receiver and transmitter to one of a large
transmitter. A programming signal receiver 21 is connumber of codes in an automatic manner. A pulse
nected to the micro-computer and provides means for
length binary code is utilized.
selecting the code in the transmiitter.
When it is desired to change the identification code, a 40
FIG. 2 comprises the transmitter flow chart and
program mode switch is closed in the receiver and the
when power is turned on the micro-computer 12 determicro-computer recalls from the non-volatile memory
mines whether a valid programming signal is present.
the last stored code. Using this code as a start, it perFIG. 3 is a block diagram of the receiver 30 which
forms a random number generation algorithm and
comprises an antenna 31 for receiving radiation from
stores the newly generated code in the non-volatile 45 the transmitter 9. The receiver 30 includes an RF secmemory and immediately transmits the new code
tion 32 which is connected to the output of the antenna
through a light emitting diode. The transmission format
31 and the RF receiver section 32 supplies an input to a
with the light emitting diode at the receiver continues
micro-computer 33. A memory 34 such as a non-volatile
until the program mode switch is turned off. During the
type is connected to the micro-computer 33. A program
energization of the light emitting diode in the receiver, 50 mode switch 41 is connected to the micro-computer and
the transmitter is placed in close proximity to the reoutput channel leads 37, 38, 39 and 40 supply operating
ceiver so that it detects the code from the light emitting
signals for various apparatus or functions which are to
diode and the new code is then stored in the memory of
be controlled as, for example, channel 1 might comprise
the transmitter which then produces a flashing ready
a garage door opener. Channel 2 might comprise a
signal to indicate to the operator that the programming 55 security control channel. A programming signal transcycle has been completed.
mitter 36 is connected to the micro-computer 33 for
It is seen that the present invention provides an improgramming the transmitter 9.
proved remote control system that can be used for a
FIG: 4.comprises a flow chart for the receiver.
number of channels and allows for automatic change of
The transmitter and receiver of the invention elimithe address coding between the transmitter and re- 60 nate the dip switches for code selection which are receiver.
.
quired in prior art devices and allows the expansion of
Another object of the invention is to provide transchannels so that a number of channels can be utilized to
mitters and receivers which have a large number of
control different functions. Faster response times are
possible codes so as to eliminate interference between
obtained than prior art control transmitters and receivclosely spaced transmitters and receiver systems.
65 ers. A specific embodiment of the invention was conYet another object of the invention is to provide an
structed wherein a four-bit single chip micro-computer
improved transmitter and receiver system for a remote
was utilized rather than custom discrete logic integrated
control device.
circuit for performing the encoding and decoding of the

3

4,535,333

algorithm. In addition, a non-volatile memory is used
rather than a multiple three position switch for storing
the custom code for each transmitter and receiver system.
The use of a single chip micro-computer rather than 5
a discrete logic integrated circuit allows system flexibility for additional expansion and for various other radio
controlled applications in addition to garage door
opener systems without the requirement of major and 10
exhaustive. redesign efforts or custom integrated circuits. For such subsequent changes, a simple micro-program change in the self-contained mask ROM is all that
is required and thus only software changes are necessary.
15
By using non-volatile memories rather than the dip
switches used in the transmitters and receivers of the
prior art devices requires that the randomly selected
code be supplied from the receiver to the transmitter.
Because of Federal Communication Commission rules 20
and regulations, the transmission of radio frequency
signals for this purpose cannot be used since the trans. mission of a coding signal for defining the code in the
transmitter would not be within the Rules for actuating 25
a garage door opener. This would comprise the transmission of a message containing information. This
means that (1) during the programming mode transfer
of code information from the receiver to the transmitter, the transmitter and receiver would have to be hard 30
wired together or (2) the transfer of such data occurs by
using infrared transmitters and receivers. The use of
infrared transmitting and receiving means requires no
physical contact between the systems.
In the present invention a synchronous serial trans- 35
mission data format is utilized because (1) the equivalent
replacement of the prior art nine pole three-position
switch with a non-volatile memory requires that the
electrical inputs be binary and (2) the present design
allows additional channel expansion and identification. 40
In a particular embodiment constructed according to
the invention, the maximum number of channels was
selected to be sixteen and allow 2 16 possible code combinations or 65,536.
45
The transmission format used in the invention utilizes
security and privacy and is binary and uses pulse position modulation as the decoding format for data transmission. FIGS. 5 and 6A and 6B illustrate the data format used. As shown in FIG. 5, a synchronization header 50
frame of two bits is used for synchronization at the
receiver. The first word 1 is a channel identification
block of four-bits in length which contains the binary
coded information that identifies the transmitting channel and this selection limits the maximum number of 55
channels to sixteen.
Words 2 through 5 are data blocks and comprise four
words each of four-bits containing binary coded information that can represent the code for a particular chan- 60
nel (2 16 possible code combinations or 65,536). Alternatively, other forms of digital information as, for example, the output of a transducer can be included in these
words.
Word 6 is a checksum block and is an error checking 65
format which is derived by the binary addition of the
identification block with data blocks 1 through 4 and
eliminates any carry bits. For example:

BLOCK
Channel Identification Block
Data Block I
Data Block 2
Data Block 3
Data Block 4
Checksum Block =
binary sum of all
blocks less any
carry bits

4
MSB
Bit 4
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Then a termination header which is two-bits in length
indicates to the receiver that the current information
transmission train has terminated. Then there is a blanking period of 28 bits which in a specific embodiment
comprises 28 msec and then the data format is repeated
again.
An example of word 1 is shown in exploded form in
FIG. 5 comprising four-bits of a typical word and a
logic 1 comprises a pulse of 0.75 msec and a 0.25 period
of no signal. A logic 0 comprises a signal of 0.25 and
then no signal for 0.75 msec.
FIG. 3 illustrates the receiver block diagram and the
software flow chart for the receiver is illustrated in
FIG. 4. When the power is turned on, the receiver
software first turns on the complete hardware system. It
first interrogates the program mode switch input. If the
program mode switch 41 is closed, the micro-computer
33 proceeds to access the non-volatile memory 34 to
recall the last stored code. Using this code as a start, it
then performs a random number generation algorithm
and stores the newly generated code in the non-volatile
memory and immediately transmits this new code
through the light emitting diode 36. The transmitter 9 is
placed in close proximity to the receiver 30 such that
the programming signal receiver 21 receives the information from the light emitting diode 36. The transmission signal format of the receiver is as shown in FIG. 5
except that it does not need the channel identification
block and uses a shorter blanking time equal to 5 msec.
The receiver continues to transmit the code until the
program mode switch 41 is opened after which the
receiver monitors the receiver input port from the RF
section and antenna.
The receiver algorithm contains a software phase
lock loop to lock it on the receiver sync header. All
timing information required to perform the remainder
of the algorithm is contained in the pulse width of the
sync pulse. A software timing loop times out the pulse
and stores this value in the memory. For each consecutive negative to positive transition, the micro-computer
samples the input at the time interval it calculated from
the sync pulse, as illustrated in FIG. 9. After all of the
bits are sampled and stored in the memory, a comparison is made with the code stored in the non-volatile
memory for a valid match. If a match is found, the
appropriate channel output is identified by an appropriate light emitting diode to identify that particular channel.
FIG. 1 comprises a block diagram of the transmitter
and FIG. 2 illustrates the software flow chart of the
transmitter. The transmitter upon power up interrogates the input photo-transistor 21 for a period of about
10 msec for indication of a valid programming signal. If
no programming signal is available within the first ten
milliseconds, the transmitter software assumes that the

5

4,535,333

presently stored code is accurate and the transmitter
proceeds to transmit such code. It accesses the stored
code from the non-volatile memory, reads the channel
identification number, computes the checksum and then
transmits all the information using the format illustrated
and described.
If a programming signal is received, the transmitter
decodes the incoming information and if the checksum
is correct stores the new code in its non-volatile memory 13 and outputs a flashing ready signal to indicate
that the programming cycle has been completed.
All output transmission timing is based on an ideal
instruction execution time of 20 msec. Since the software is fixed, the only parameters that affect output
timing are the resistor capacitor tolerances and any
input tolerance variations between different micro-computers.
A software pseudorandom number generator is utilized at the receiver to generate the different codes.
The use of software to generate random values results
in a paradox. The fact that an algorithm exists for a
process implies that the process outputs are not truly
random because the algorithm can be used to predict
the output sequence. True random values can only be
generated by the use of systems such as "memory garbage" or "human reaction time". The use of human
reaction time requires additional hardware and expense
which is undesirable in the high volume electronic industry. In the present invention, the use of "memory
garbage" to start the system "initiation" or starting
value is used on a one time basis.
In the algorithm used every time a random number is
required a new sixteen bit configuration will result from
the seed or initiation value used. Continuous recall for
sufficient number of times will result in all the possible
sixteen bit configurations. However, the outputs will
appear random if the sequence of outputs are considered and it is impossible to prove that the program is not
producing true random numbers. The distribution of
outputs is uniform over the range of possible outputs
although all possible sixteen bit values appear before
any repetition occurs. In the present invention 65,536
outputs will occur before any repetition occurs.
The algorithm used works as follows. The random
code is stored in four blocks of memory each four-bits
wide for a sixteen bit word. This allows a binary representation of 65,536 discrete numbers. However, for the
random number generator algorithm to work, the all
zero state must not be used therefore there are only
65,535 numbers that can be used.

5

10

15

20

25

30

35

40

45

50

6

The program for the transmitter micro-processor 12
and the program for the receiver micro-processor 33 are
attached.
FIGS. 7A and 7B illustrate the electrical schematic of
the transmitter 9, the antenna 10 is connected to the RF
transmitter 11 which receives an output on lead 50 from
output terminal SO of the micro-computer 12. The
micro-computer 12 may be a National type 404LP, for
example. The non-volatile memory 13 may be a XICOR
type X-221O and is connected by leads 51 through 57 to
the micro-processor 12 as illustrated. An octal latch 26
is connected to the micro-computer 12 by leads 58
through 66 and might be a type 74C373. A EPROM 27
might be a type 2716 available from INTEL and is
connected by leads 58 through 69 to the micro"computer 12 and is further connected to the octal latch 26
by leads 70 through 77. The power supply E and transmit switch 22 are connected to a regulator 23 which
produces the drive voltage + Vcc. Infrared sensor 90 is
connected by lead 91 to the micro-computer 12. A
ready indicator 92 is connected by lead 93 to the microcomputer 12. Channel selector switches 94 through 97
are connected to channel selector leads 16, 17, 18 and 19
which are connected to the micro-computer 12. A lead
101 is connected from the memory 13 to the reset terminal of the micro-computer 12.
FIG. 8 illustrates the receiver in :schematic form. The
micro-computer 33 may be a type 404LP available from
National Corporation. The antenna 31 is connected to
the RF receiver 32 and by lead 10'5 to the micro-computer 33. The programming LED 36 is conne~ted
through a resistor and a transistor 1'1 to lead 107 which
is connected to the micro-computer 33. A non-volatile
memory 34 which might be a type X2210 available from
XICOR is connected by leads 110 through 119 to the
micro-computer 33. A reset circuit 121 is connected by
leads 122 and 123 to the reset of the micro-computer 33
and the memory 34. An octal latch 8 which might be
type 74C373 is connected by leads 125 through 133 to
the micro-computer 33. An EPROM 7 which may be a
type 2715 is connected to the octal latch 8 and to the
computer 33 by leads 125 through 136. The EPROM 7
and octal latch 8 are connected together by leads 137
through 144. The program switch 41 is connected to the
micro-computer 33 by lead 200. The channel indicator
lights 250, 251 and 252 are connected to the micro-computer by leads 150, 151 and 152 and illustrate which
channel is energized.
Although the invention has been described with respect to preferred embodiments, it is not to be so limited

t

-----D----------------I

as changes and modifications can be made which are
Whenever the program calls for random number, the
within the full intended scope of the invention as deprevious value or "seed" is recalled. Each bit is shifted
fined by the appended claims.
left one position. Bits 14 and 15 are exclusive or-ed and 65
the result is shifted into the first position of block 4. In
this manner, all possible 65,535 combinations will result
before the pattern repeats.

4,535,333

7
APPENDIX'

TRANSMITTER SOFTWARE LISTING

oem:

c, 'CoS"", ~ 1/ \ c;

; c'\'\E.C.,,"':.I.l I "l

2

OOIE

BlK4 = 1.14

i II.fOOMATl ON BlCJCl( 4

3

oolD

BLK3 = 1.1:1

; INFORHATl (IN BlCJCl( 3

4

oolC

BlK2 = 1.12

; INFffiMATl ON BLOCK 2

5

oolB.

lUI"' 1.11

; I//FORMATl ON BlJJCj( I

b

oolA

IlJU1 = 1.10

iI. D NUI'fF!fR

S

002E

COl.llno

= 2,14

; GF' COUNTER 0

9

002D

COUNTl = 2.13

j (if' COUNTER I

10

OOZC

COONT2

= 2. 12

; rR COUNTER 2

11

003F

SCRATe

= 3.15

; SCRATCH F'AD REGISTER

12

003E

BRPNT

= 3.14

i BR /!EMORY POI NTER

13

003D

BDPNT

= 3,13

; BO IlEMORY POINTER

14

OO3C

COMF'I

= 3. 12

j COHPARE REGISTER I

15

oo3B

COHP2

= 3,11

iCOMPARE REGISTER 2

16

003A

CNTROL

17

0030

NOOsr = 3, 0

18

00(»=

FLAGI

19

= 3.10

= 0.15

j CCMROL WORD REGISTER
; SCRATCH PAD REGISTER
iFLAG REG1STER I

; INITJALlZATJON

20 000 00

CLRA

21 001 3E

LBI SCRATC

22 002 7F

sm

23 003 40

r.Dl1P

24 (J04 3E

LBI SCRATC

25 005 333A

Ol1G

; INITJALIZE G PORT

26 007 333C

CAl1Q

; INITJALlZE L PORT

27 009 3361

LEI I

; TRISTATE L PORT

28 OOB 50

CAB

; SET SIp;. BI1-lARY COUNTER

29 OOC 332.£

aBO

jSET~;(I=O

30

J5

; INITIAlIZE D PORT

8

4,535,333
9
31

,CHECI: FOR VALID PROl3RIW1ING SIGNAL ON INPUT GO

32

,FOR A PERIOD

3300E2E

START

(f

APPROx. 10 MSEC.

LSI TRIll

34 OOF 70

sm 0

35 010 2E

LSI IRIN

36 011 3301

SKGBZ 0

; IS INPUT A LOGIC 1 ?

37 013 OS

.F BRI

,YES

38 014 E5

J' BEGIN

; NO. ACT! VI' INPUT •CHECK

BRI

CLRA

; FOR SytlC PllSf.

F:R.-~

S1IiF.Z 0

; IS INPUT

..F BHZ

, YES

.1' P.EGlIl

;NO. ACTlVE INPUT, CHFI1(

39 015 00
41 (117

::::;nj

42 019 DB
4~

iliA E5

44 OIB 51

BR2

AI~{:

I

45 Ole D7

AISC 1

48 OIF 06

X0

49 (CO 05

LD 0

50 021 5A

AISC 10

:>1

smr PUlSE

X0

47 OlE 51

A LOGIC 1 ?

,J' BR3

46 OlD Db

; FOR

~;TlLL

JP BRI

022 Il5

52 023

JMF' STRTX

t.(l[l(J

i

NO INDICATION OF A PR03RAMMlNCi

; SIGNAL IIlTHIN to M:,EC

53

LBI BDPNT

i

INlTIALIZE RECEIVED DATA

55 026 7B

sm II

i

MEt10Ry POI tITER

56 027 2D

LSI COlJlITO

i

RESET COUNTER IRIN

57 028 70

sm 0

58 029 70

sm 0

59 02A 19

LBI lDNU1'1

6J 02L 70

sm

0

62 02[1 70

sm

0

b3 02E 70

STII 0

b4 O:1f 70

8m

os 030 70

sm 0

bb 031 2D

LBI COlJNT (J

67 032 3301

SJ<GBZ 0

54 025 3C

BEGIN

(J

; IS INPUT A LOGlC 1

?

10

4,535,333

12

11
be 034 F6

J' LODY.I

j

69 035 E5

J> BEGIN

iNO

70 036 00

LOOU·

71 037 51

YES

QRA
AISC 1
Sl<GBZ 0

; IS INPUT STILL A LtXi!C I

73 03A Fe

JP BR4

j

74 038 E5

J> BEGIN

~

;NO

72 033 3301

75

((~

51

BR5

BR4

YES

AISC I

76 03D F8

&BR5

77 081: 06

X0

78 03F 51

AISC I

79 040 Ob

X0

80 041 05

LO 0

81 042 5D

AISC 13

B2 043 b03h

-t1P Loon

83 045 2£

LEI IRIN

84 04b 00

a.RA

85 047 3301

SI<[;I::] 0

; IS lI.'PIJT A LOGIC 0

B6 049 C7

-.I' . -2

iNO

AI&: I

; YES

ee (l4 E 3.,"01

SKGBZ 0

; IS INPUT STILL A LODIC 0

89 040 Cf

.I'BR7

i NO, RISING TRANSITION DETECTED

90 04£ CA

.I'SRb

iYES

X0

; STORE COUNT IN IRIN

AlSC 14

; FOR SAMPLE VALUE

87 04A 51

91 04F Db
93 0.51 5E
94

0~2

44

SRb:

SR7:

; VALID 5 MSF.C BlANf: TIME

?

?

NO?
~AMPLE

95 0:.3 2C

LBI COUNT I

i STORF.

9b 054 06

X0

i IN COUNTER 1

97 055 2£

LBI IRIN

; CHECI< FOR O'JERFLQI,J

98 056 00

(lRA

S'9 057 21

Sl<E

VALUE

100 053 DB

J' REPEAT

; NO OVERFLOW

101 059 bOot

J1P START

; OVtRFLQI,J Ell STS

102 05B 3301

RFPEAT SKGBZ 0

i CHF.O: FOR FALLING TRANSITION

4,535,333

13
10::: (15D DB

J> . -2

; INPUT STILL HIGH

,y.:I< SAMPLE

; FALLING TRANSITION DETECTED

lOS OW 3C

LBI BDPNT

; POJrH TO RECEIVE DATA POINTER

106 ObI 2S

LD 2

107 062 50

CAB

108 063 20

SKC

109 OIA 6067

J1P BRB

110 Ob¢ 413

5MB 3

104

O~,f

6974

III Ob73301

BR8:

BR9:

; l[fJl(

JP BR8

'113 OM E7
114 0613 3301

FOR FAlLING TRANSITION

SKGBZ 0

; Itlf'UT STlI.L LOll

Sl(GB2

(I

11506[1 EB

J> .-2

; INPUT STILL HIGH

116 Olf 6974

JSR SAMF'LE

;FALIING TRANSlTION DETECTED

117 070 3C

LBI BDPIIT

; POINT TO

118071 2S

LD 2

119 072 50

CAB

120 073 20

Sl:C

121 074 F6

JP BRIO

122 075 46

5MB2

123 076 3301

BRIO

SKGBZ

(I

RECEI~'E

DATA POINTER

; LOOK FOR FALLING TRAtlSTTJON

FA

JP BRIt

; ltJF'UT STI LL HICiH

125 079 F6

JP [:RIO

; ltJPUT STILL LO\.J

124

()7~:

126 07A nOI

[:PI I

Sl<G[:: 0

127 07e FA

JP -2

; INPUT STILL HIGH

128 07D 6974

,y.:I< SAMPLE

; FALL WG TRAilS I TI ON DETECTED

129 o7F 3C

LBI BDFfH

; POINT TO RECEIVE OATA POINTER

130 080 25

LD 2

131 081 50

CAB

132 Of.'2 20

S1(C

133 083 85

oJ' ffi12

134 OC;4 47

5MB J

135 005 3301

SKGBZ 0

; LOOK FOR FAlLING TRAIISITION

136 OB7 B9

JP BRl3

; INPUT ST I LL HICiH

137 OB3 B5

oJ' £''R12

; HIPUT STILL LOll

138 0'09 3301

BR12:

BRI3

SKGBZ 0

14

4,535,333
15
139 08B B9

.p . -2

i

140 OSC 6974

JSR SAMPLE

; FAlLING TRANSITION [IfTECTED

141 08£ 3C

LBI BDPNT

; POINT TO RECEIVE DATA POINTER

142 08F 25

lD 2

143 090 50

CA8

-145

on

S'4

JP PRI4

14b 093 40

147 094 3C
148

os'S

INPUT STILL HI GH

SI1E: 0

P.R14

05

LBI BDPNT

; INCREMENT BD PO INTER

LD 0

149 096 51

AISC I

,lAST MEMORY lOCATION FILLEDi

150 097 99

,I' BR15

,NO

151 098 9F

..f' BR16

; YES

em

BR15

X0

BRI7

SKGBZ 0

,lOOK FOR FALLI NG TRANS ITI ON

154 091: 605B

...tIP REPEAT

; INPUT STILL HIC,H

155 09E 9A

JP SR17

; INPUT STILL LI)l.I

152

Db

153 09A 3301

15.)

; CALCLIlATE RECEIVED DATA CHW:SUI1

157 09F 00

BR16

a..RA

158 OAO lA

LBI BLKI

159 CAl 31

ADD

160 CA2 1B

LEI BLI:2

161 0A3 31

ADD

162 0A4 lC

lBI BLK3

163 CAS 31

ADD

-16.5 0A7 31

ADD

166 OAg IE

LBI CKStJM

167 009 21

SKE

i

1M OM 600E

J1P START

; CHECKSUM INCORRECT

169

i

CHECKSUM CORRECT

PROGRAM NON-VOlATILE MEMORY

170 ou:; DE

LBI FLAGI

171 CAD 4C

RI1BO

172 OAf. 39

lSI CNTROL

173 0;'; 73

STl! 3

174 OW 6933

JSR NVRM

; STORE DATA IN N\'RA11

175 OB2 3F

LBI NW3E

; lNlTJATE A STORE COM::AIl[r

; SET IIR lTE TO NVRM FLAG

;STORE CONTROL WORD

16

4,535,333
17
176 GF:3 70
177 OE4 :-iF

LBI

; TO NVRAM

STII 13
NOU~.E

178 OP5

:«,A

OI1Ci

179 OBi

:>f

LEI NOJ.f:;E

180 0[':': 7F
181 0E.1 3F

LEI t/Dlf:;E

I S2 OEIl 3-:.'"?.A

; TERMltJATF.: STORE TO tJ'JRArl

8Tl1 15

OMG
LEI COMPZ

; INITJALIZE COMPARE

184 OBD 7F

sm 15

; REGISTERS

185 DBE 7F

sm 15

186 OBF 2C

LBI

187 OCO 70

sm 0

ISS OCI 70

STlI 0

189 0C2 OA

LEI 0, II

190 0C3 333E

OBD

191 0C5 b9B2

JOJl TIMF.:R

192 OC7 2C

LEI COUNTt

193 0C2 70

sm 0

194 0C9 70

sm 0

195 DCA DE

un 0,15

·197 OCD 6';82

JSR TH'oER

198 ocr f;C

.F BRI8

183 OBC 3A

BRie

; RESET COUt/TER REGISTERS

COl~m

; WRN ON READY INDICATOR

; RESET COUNTER REGISTERS

; TURN OFF ItIDICATOR

199

; START TRANSl1lT SEQUENCE

200 ODO 3387

8TRTX

LEI 0,7

; I NST lTUTE AN ARRAY RECALL

201 002 mE

OBD

; CYCLE TO NVRAM

202 004 DE

LBI 0.15

203 005 333E

aBO

204 007 DE

LEI FLAG!

205 ODS 4D

SI1BO

206 orr? 39

LEI ctlTROL

207 ODA 77

ST11 7

208 ODB b9K,

JSR NVRAM

209 ODD 19

LEIIWUM

210 ODE 332E

1M.

211

; CALGU..IlTE CHECKSlJI1

; SET READ FROM NVRAM FLAG

; STORE CONTROL WORD

; READ CHANNEL lD NUMBER

~

DATil BLOCKS AND lD NUME.'ER

18

4,535,333

19
212 OEO 00

Q.RA

213 OE! 19

LBI IOOlJI1

214 0E2 31

ADD

215 0E3 iA

L8I BlKI

'217 OE; 18

LBI 8LK:2

218 OE6 31

ADD

219 0E7 IC

LBI B1.K3

220 OEe 31

ADD

2210£910

LBI BlK4

222 OEA 31

ADD

223 OEB IE

LSI CKSIJr;

224 DEC 06

X0

225

i

226 OED 3B

INITX

; STORE CHECI;SIJ1'1 1N c/;SUM

TRANSMIT SYNC PUlSE
LBI cmlPI

727 CiEE 78

STlI 8

228 DEI' 00

ClRA

229 01'0 38

LSI CONPI

230 01'1 3369

LEI 9

; INITIUZE COOPAAE REGISTER

231 01'3 51

BR19

-AISC I

; SET EII3= L SO= 1
;TR~~SMIT

LOCiIC I

232 01'4 21

SKE

7J3 01'5 1'3

JP BR19

234 CH 3361

LEI 1

; SET

235 01'8 3B

LEI COI1Pl

; TRANSMIT LOGIC 0

236 Of9 iD

STlI 13

; FOR 1. 5 MSEC.

237 OfA 00

Q.RA

238 om 3B

LSI COMPI

239 OFC 51

BR20:

AISC 1

240 OFD 44

Nap

241 OFE 21

SKE

242 OFF 60fC

J1P BR20

243 101 44

IU'

244 102 44

NOP

245

; TRAIQIIT !lA"' A BlOC!<

i

FOR 500 USEC.

EN~:=().

so=o

20

4,535,333

21
246 103 3C

LBI SDPNT

; INITIALIZE SO POINTER TO

.248 105 3A

LEI (:0111"2

; DATA TO E:E TfW.ISl1lTTED

249

BTl]

li),~

70

25(J }(J; 3C

(I

NXBYTE LSI BDPNT

251 108 25

LD 2

25;' IDS' 50

CAB

253 lOA 23b1

LEI 1

; SET EII3=O. SO=O

254 lOG 13

SrME:Z 3

; CHEe.!< LOGIC STATUS OF BIT ;;

255 100 00

JP 81\21

; RAM 83= t

2".Jb WE 32

RC

; RAM 83=0

257 10F 01

JP E:R22

258 1j(J L.!

BR2t

se

259 111 69tB

13fP'".
44

JSR TXMIT

; 160 IY.:iEC DELAY

260 1133£

LSI SCRATC

261 114 7E

sm 14

262 1153£

LSI SCRATC

263 116 06

X0

2b4 11751

A1SC 1

265 118 07

J' .-1

'267 ItA 3t

LBI BDPNT

268 lIE 25

LO 2

269 lie 50

CAB

270 110 3361

LEI 1

; SfT EtI3=O.5O=0

271 llF 03

SKMBZ 2

; CHECK LOGIC STATUS OF BIT 2

272 120 E3

JP ERZ3

; RAM B2=1

273 121 32

Re

; RAM 82=0

274 122 E4

JP BR24

275 123 22

BR"j-j

sc

276 124 69CB

AA24

JSR maT

..... '

277 126 3E

LBI SCRATC

278 127 7£

sm 14

279 12'3 3E

LEI SCRATe

2SO 129 06

X0

281 12A 51

AI~;(;

232 12B EA

,F'

1
-1

; 160 USEC [HAY

22

4,535,333
23
2S3 12C 44

NOP

284 12D 3C

LBI BOP/IT

285 12£ 25

LD 2

m

CAB

12F 50

287 130 3361

LEI 1

; SET EN3=0. 50=0

288 132 11

SKMBZ 1

; GIECK LOGIC STATUS OF BIT 1

289 133 F6

J' BR25

.RAM Bl=1

290 134 32

RC

iRAM B1=0

291 135 F7

J> 006

m

136 22

BR25

SC

m

137 69GB

BR26:

JSR TX/'llT

294 139 3£

LBI SCRATC

275 13A 7E

STJI 14

296 13[: 3E

LBI SCRIIlC

297 131: 06

X0

298 130 51

AISC 1

301 140 3C

LBI BDPNT

302 14i :5

LO 2

303 142 50

CAB

304 [43 3361

LEI 1

; SET EN3=O. $0=0

305 145 01

SKMBZ 0

; CHECK LOGIC STATUS OF BIT 0

306 146 C9

J' BR27

; RAM BO=I

307 147 32

RC

i

RAM f:(J=(J

303 148 CA

JP BR28

i

INCRE/'IErlT BD POltlTER

i

LAST Mr:MORY LO!:l!TI '-':I

309 149 :2

007
BR"o
.(,.'.'

OCLAY

~t

31 (I 141\ t.9CB

; 160 USEr

JSR nMlT

311 14C 3C

LSI E:DPNT

312 140 05

LD 0

313 14E 51

AIS(; 1

314 14F 44

NOP

315 150 06

X0

316 lSI 05

LD 0

317 152 3A

LSI CONP2

'319 154 t.lll!

clMF' NH<YTE

320

NOP

15.~,

44

; NO
i

YES

24

4,535,333

26

25
321

I~,i

3361

LEI I

322 15'; :;8

L8I COll'l

323 l:oA 78

sm 8

324 158

(lRA

O(J

325 15C 38

LE:J COtlPl

326 15D 44

NO,'

327 15E 44

tmp

328

; TRAIJSNIT TERMINATOR

329 15F 38

LE:j COMPl

no

1<.0 78

8m

:>31 161 00

CLRA

332 162 3E

LEI

C(~lF'1

333 163 2::'.,,9

LEI

9

334 165 51

BRi·~'

8

; SET H13= I. 511= I
; TRAIJSMIT LOI, 1C 1 FOO 500

AISr:

3-.15 1M 21

E,;E

336 167 E5

ell' EK"?

337 16& :<361

LEI 1

lim:

i

SET EtJ:>O, SO=I)

; TRANSMIT E:LAtJK TI ME OF 23 MSEC.
339 16A 3A

LSI CCd'1P2

340 168 72

sm

2

341 16C 76

sm

6

342 160 2C

L81 COUNT I

343 IbE 70

sm

344 16F 70

sm 0

345 170 6981

J:J< TIMER

346 172 WED

JMP

347

i

350 17500

i

RESET COlJUTER REGISTERS

i

RETRANSMIT MTA

0

mm

SUN<OUT INES

348
349 174 2C

; INITIALIZE COMPAfi'E REGISTERS

SUBROUTINE SAMPLE
SAMPLE LSI COlMI
CtRA

; SETUP SAMF'L ING VALUE

'lOP
353 178 21

SrE

354 179 F6

..F SlIBI

Sl:G8Z 0

356 I7C 6181

JMP SUB:

; READ ltIPUT

4,535,333
27
~7

sc

17E 22

i

INPUT IS A LOGIC 0

i

INPUT IS A LOGIC 1

..tIP SUB3

358 17F blS2

181 32

SIJB2:

RC

360 182 48

SUB3

RET

~9

W£:RWTlNE rlVRAN

361

LEI COMl'I

i

INITIALIZE BD MEMORY POWTER

3b3 184 7F

STIllS

i

AND COMPARE REGISTER

364 135 7B

sm 11

362 183 3B

36-'5 ISO 3C

NVRAM:

SUBb:

LD 2

I~

51

; OOTPUT ADDRESS POINTED TO

AISC I

3bb 187 25
367

LBI BDPNT

; EY COMPARE REGI STER

369 ISA 332-.£

[lB[I

370 ISC 39

LEI CNTROL

•OUTPUT CONTROL IoIDRD TO

371 ISO 333A

ONG

; MEMORY

372 18F OE

LEI FLAGl

i

373 190 01

SKMBZ 0

; FLAG

374 191 DB

$' SIJB4

; firAD FLAG

375 192 3C

LBI £:OF-NT

; WRITE FLAG

376 193 25

LD 2

377 194

~.o

CHECK FOR READ (lR IoiRITE

CAE

378 195 00

CLRA

379 196 333C

GANO

; WRITE TO tNRAM

330 198 3.165

LEIS

i

331 19A £1

JP SI.I£:5

3S2 19B 3C

SlJB4

ENABLE L DRIVERS

LBI BDF'rn

33.3 19C :5

LD 2

334 190 50

CAR

335 19£ 332E

lNL

336 lAO 06

Xa

327 tAl 3F

WB5

LEI NfUJSE

333 lA2 7F

STII 15

3!39 IA3 ::;F

LBI NOUS£

390 IA4 33.'"JA

0t1G

; READ FRi)11 INRAI1

i

INITIATE A DESELECT

28

4,535,333

29
311 lAb 3361

LEI

392 lAS

LBI BDPNT

3[;

; DISHf:LE L DFiI'.!ERS

393 IA9 05

LD 0

394 1M 51

AISC I

39S lAB Ob

X0

; STORE NEW VALUE FOR

':rib lAC 05

LD

;MEMORY POINTER

':ri7 lAD 3B

LEI CC\'1PI

; LAST MEMORY LOCATION

398 IAE 21

SKE

; ACCESSED?

399 tAF bIBb

.t1P SUBb

400 IBI 4B

RET

.402 !E:2 2D

TIMER

(J

;NO
; YES

LBI COUNTO

403 183 OD

CLRA

404 !E:4

AI;';(. I

~,J

405 IE::; F4

..IF' -I

•640

406 IBb 05

LD 0

; COf.~lTO COIITENTS TO Ar:CU

407 IF.7 51

AISC: 1

; ADn I TO ACClI

405 ISS FD

JP LPI

409 lB9 07

XDS

; STORE ZERO ItI COUNT (J

410 IE;A OS

LD 0

; DECREMENT TO COUNT 1

411 lBB 51

AIS"C 1

;ADD 1 TO COUNT I

412 IBr.: 44

NOP

41., IBn <16

LPI

1I~;[c

DELAY LOOP

X (J

414 !E:E 3A

LEI W'lP2

; COMF'ARE COU!JTERS TO

415 ISF 05

LD 0

; COMPAh"t REGISTERS

41b ICO 2C

LBI

w.um
; SKIP IF MasT SIGN WJt<r

417 ICI 21
418 IC2 blB2

.J1P TIMER

419 IC4 3B

LBI W1PI

420 ICS 05

LD 0

:j

SI:E

·422 ICi

J1F' TIMER

424

1(''';

RET

48

42b ICB 38

TXMIT

L81 C:OMPI

; WJALS COMP2

; WUALS WJNTO
; NO, INSTITUTE ANnrHER CYCLE

30

4,535,333
31
427 ICC 73

STII 3

429 lCD 00

(1.RA

429 ICE 38

LBI COMPI

430 lCF 44

NOP

431 100 33h?

LEI 9

; 58 Etl:?.: I. S{J= 1

AI S<~ I

; 250 USEe LOOP

432 trr2 51

INCI

433 1[13 21

~H

434 104 02

JP INCI

435 ID5 20

SI:C

436 lOb

JP

[iF

437 107 38
432

ID~:

; TRAN~:MJT A LOGIC L S(I=l
TF.AN~;O

i

TRANSMIT A LOGIC 0,

LEI COl1f'l

74

STII 4

439 109 3B

L81 COMPI

440 lOA 00

QRA

441 lOB 51

INC2

AISC 1

442 IDe 21

SKI:

443 100 DB

oJ' lNC2

444 IDE 48

; 240 USEC. LorJP

RET

445 IDF 33hl

TRANW -LEI 1

; SET EtB=O

446 lEI 38

LBI Cot1F'1

447 lE2 73

STII 3

448 lE3 3B

LBI CO!'lF'I

449 lE4 00

QRA

450 1£5 51

1NC3

AISC 1

451 lEI, 21

SKI:

452 lE7 E5

oX' INC3

453 lE8 48

; 18(1 USEe LOOP

RET

.<;~

~'In

BWNT 0()3D

BEGW 0025

ELKI

OOIB

BLY,2

001C

BLK3

0010

BLK4

001E

BRI

0015

PoRIO

,
00'"0

BRII

007A

BIll 2

0085

BRI3

0039

BRI4

0094

BR15

0099

BR16

009F

BRI7

009A

BR18

OOE1:

BRI?

OOF3

BR2

OOIB

BR20

OOFC

BR21

0110

BR22

0111

BR23

0123

BR24

0124

BR2S

0136

BR26

0137

BR27

0149

BR?B

014A

BR29

0lt.5

~;O=O

32

4,535,333

34

33
BR7

OO~F

BRS

pm

oo,:.,F.

E:RPNT OO:-iE

CKSUM

O{J!F

CNTROt 003A

cntlPI

003C

COHP2 0(J3B

COlINTO 002E

CilUIJT 1 002D

COUNT2 0(12C

00i,7

IDI~JM

(lOlA

INCI

0102

INe2

INITX

OOED

IRIN

0021'

NOUSE 0030

f

OlDB

f

FLAG1 000F
INC3

01E5

LOOK 1 0036

LPI

OIW

NVRAM 0183

NXBYTE 0107

REPEAT 005B

StW'LE 0174

stRATC 003F

START QO(JE

STRTX

OODO

SUBI

0176

SUB2

0181

SUB3

SUB4

OIS'B

SUBS

DIAl

SUB6

0186

TIMER OlB2

TXMIT

01eB

0182

TRANSO 01DF

tJU Ef;,,'OR LWES

489 ROM \lORDS USED

COP

420 ASSfMt:LY

WJRCE CHEC'n;/JM = 50Ci
OBJECT (:H£C'J:StlM = OCB2

INPUT FILE

GENUSER. JANfi SRC Vl{

OBJECT FILE

GENUSER. ,IANN LM

2

3
4

'"

.~,I

CHAME:EPLA I N MANUF f-iCTUR I r4Ci CORF'ORAT I ON

/::..

{.;LL R I CiHT:,,: RE:":ERVF.D"

7
,-,
c'

9

=

10

00lF

11

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1, 14

1

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001D

1,

1 .-,
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BLf<2

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; INFORMATION BLOCK 2

14

001I::

BU<I.

1. I. 1

;

15

(lOlA

I DNUt'l

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1, 15

=

1. :~:

1, 10

; INFORMATION BLOCK 4
; I NFORl'lA T J ON l':L.OCf<

INFOF~MATION

; I.

D.

NUMBER

:~:

BLOCK 1

4,535,333

35

36

... , J.5

; INFRARED INPUT COUNTER

te,

002F

IRIN =

17

002E

eOl...INTO

2, 14

1-::'
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002[1

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:7~ J

1. ::=:

; GP COI.JNTFR

1 ',I

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12

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20

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21

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;:': ~ 14

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3,

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12

24

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2~5

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; CiF'

COI.. INTER 0

COUNTER 2

iSCRATCH PAD REGISTER
;,BR MEMORY POINTER
;BD MEMORY POINTER

:::::

; COMPARE REGISTER
; COMPARE REGISTER 2
0

00:::0
:::: (),

I

(lU()F

hC:r-:.:~;i..II\·l

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OOOE

RBU<4

O. 14

29

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31

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J ~'I

; INITIAL. IZAT! ON
000 00

eLRA

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37 002 7F

:::::TI I 15

::::::: 00:::: 40
::'::9 004 ::::E

Lrn :::::CR?HC

40 005 ::::::::::::A

OMCi

i

41 007 ::::::::::::C

CAMO

; INITIALIZE L PORT

4':1 009 ::::::=:60

LEI 0

; TR I ::;TrHE L F'I,'IRT

43 OOB 50

CAB

;8FT 81 AS SHIFT REGISTER

44 ooe ::':::::::':E

OBD

; ::::iET :=:0 '" 0

45

; INITIALIZE D PORT

4<'-, OOE 0:::::
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7 OOF

INITIALIZE Ci PORT

LDI FLAG1
5MB 0

;8ET READ FROM NVRAM FLAG

4::::: 010 :::::9

LBI CNTROI.

; STORE CONTROL WORD

49 01 1 77

::;T1 I 7

50 OJ. 2 3:::::,':7

LBIO,7

4[1

; INSTITUTE AN ARRAY RECALL

38
i

CYCLE

; CHECK FOR PROGRAM SWITCH
; Cl..O::::URE

iND.

MONITOR RECEIVE

;VES,

PROGRAM SWITCH

IN~JT
(~OSED

iCHECK FOR ALL ZERO INPUTS

;BI.I<l=O

; BUC?=O

;ALL BLOCKS EQUAL 0
• STORE DEFAULT NUMBER

iTRANSFER GENERATED NUMBER
iTO BLOCKS I THRU 4

4,535,333

40

39

o::m

OE:

LBI

E:7 Cl:3E

,••
1 c-1

LD

O:~:F

06

86

8:3

x

0,12
1

0

89 040 OC

LBI

90 041

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15

x

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0, 1::':

0

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94 ()45 Cit:.

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95 04/:. o:=.:

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9/,. 047 4C:

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LF:J OHROL

9 b.: 04'::'

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1 ...-:·

';19 04A 69D7

FU~Gl

iPROGRAM NEW CODE
N'v'R?i~l

i

TO

i

INSTITUTE A STORE COMMAND

::=:

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100 04C :=.:F

LBI

NOU::::E

101 04[1 7[1

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13

102 04E :=.:F

L [: I

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104 051 ::::F

LBI NOU:;:::E

105 052 7F

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107 054 :=.::=':::=:A

O~lCi

1 ():'::

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109 OSt. 00

15
NOU::::E

CALCULATE DATA BLOCK CHECKSUM
CLRA

lA

un

1 1 1 05:::: ::::1

ADD

1 1·~' 059

If:

LB1

1 1:::

31

AnD

1 14 05B lC

un

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31

ADD

1 1 t. 05[1 1D

LB1

1 17 05E ::': 1

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1 H:: 05F lE

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1 1 9 Ot.O 06

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1 10 057

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4,535,333

41
120

42

iTRANSMIT SYNC PULSE

121 0"=.1

::::E:

INITX:

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122 062 7:::

ST I I :::

12::::

; INITIL IZE COMPARE REGISTER

O(,.:~:

00

CLRA

124 064

:~:E:

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12~j

:~:~:e,9

LEI 9

065

L?"=. 067 51

BR1 ',I:

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; TRAN:=;MIT LOGIC

127 06::: 21

; FnR 500 U:;::EC.
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129

O/:.A

1::::0 (J(-,C

:~::~:61

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1

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:=;T TTl :":
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1::::::::: 06F :c:F:

1::=:5 071

44

NOP

1 ::::7 07::::: (:,070

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1 ::::=: 075 44
139 076 44
140

NOF'
; TRf4N::::MIT DATA BLOCK

141 077

::::c:

LBI BDPNT

; INITIA LIZE BD POINTER TO

142 078 7E:

::;TI I

;FIRST AND LAST LOCATION OF

14::::: 079 :::::A

LBJ COMF'2

144 07A 70

:=:T T J 0

145 07B

:~:C

NXBYTE'

11

iDATA TO BE TRANSMITTED

LSI BDPNT
LD 2

147 (17D

:':;0

LEI

1.

; ::£T

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1 49 0:::::0 1 :'~:

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; RAl'l B:::::= 1

1 '-' 1.

0:::::2 :::::2

RC

; RAM B:::::=O

1 5:-:'~

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0.-

1 :::::4

1 5::::: 0:::4 .-,.-,
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80=0

I_OGTe STATIJS OF BIT 3

4,535,333

44

43
154 0::::5 f:.A1F

BR22

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0:::7 3E

LB1

1 ~5l-:. (X::::::: 7E

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1,57 0:::::-;; ::::E
15:::: O::::A

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11:,0 O::::C

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159 0::;;:1':

; 160 U:::;EC,

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1 f:.

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1 (.;~~ O::::E ::::C
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CAB

1(.5 091 ::::::=:61

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11::..6 0':;13 0::::

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If::.,7 094 97

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; PAM E:2:.= 1

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16:=::

09~5

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11::.8 09/-, 9::::
170 097 22
171

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.1.73 09B 7E

:=:T1 I

1 74 09C :=:E

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17,', 09F.

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l.E: I ::::CF,ATI-:

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1 77 09F 9E
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7:::: OAO 44

NOF'

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179 OA1

1 :=.:0 OA2 25

LD 2

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CAE:

1::':1
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50

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1 ::::::::: (}?i/,

L.EI
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I 1

t84 OA7 AA
It:::5 OA::::

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1

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1t=:f:. OA',' AB
187 OAA 22

BR25:

SC

1:::::::::: OAB t.• 1 F
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BR26:

c.l:::;R TXMIT

i. RAM Bl.=O

DFl.AV

4,535,333

46

45
1:::::9 OAD ::::E

LBI :::;CRATC

190 OAE 7E

STII 14

1 ';1 J. OAF ::::E

LBI SCRATC

1 'O"~I OBO 06

X 0

193 OBl 51

AISC

194 OB2 £:1

._.IF'

195 OB3 44

NOP

19(,. 01::4 :;::c:

LBT BDF'NT

197 OB5

2~5

LD 2

OB(~

50

CAB

198

; 160 U:::::EC.

DELAY

-1

199 OB7 3361

LEI 1

; :::::ET EN:::=O. SO=O

200 OB9 01

Sf(MBZ 0

; CHECK LOGIC STATUS OF BIT 0

201 OBA BD

.JF' BR27

; RAM 80=1

202 OBr::

RC

~:2

dP BR28

203 Or::C BE
204 OBD 22

BR27:

SC

205 OF:E bAlE

BR2S:

.JSR TXMIT

20&, oeo 8C

LBI BDPNT

207 OCl 05

LD 0

-;"08

oe2 51.

AI:=;C

209

oee: 44

NOE'

210 OC4 06

X 0

21 1 OC5 05

LD 0

212 OCt:. 3A

LBI

21 ::: OC7 21

:::::KF.

; INCREMENT BD POINTER

:.'1 4

oe:::::

215 (leA

CO~1F'2

; TRMJ:::::MITTFD

{~,07F:

.1t'1F' NXB'iT[

44

tKlr"'

LEI

2l.7 OCD ::::F:

L HI COt1P 1

21:::: nCE 7:::::

:=.;Tl I

219 OCE 00

CL

220 ODO 3r::

L.r-:T COI"1P 1

22l OD1 44

NOP

.-,.-/,-,

NOP

..

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44

;

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; LAST MEMORY LOCATION

:~:

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4,535,333

47

.-",-,,:,
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48

; TRANSMIT TERMINATOR

224 OD:::: 3[:

LBI

22:~

0[14

7':'

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22~. .

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CO/,lP1

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227 0[16
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OD7 :::::::/':"')

"229 0[19 51
2::::0

ODA

:e:

COi'lF'l

LEI 9
AI::::C

; TRANSMIT LOGIC 1 FOR 500 USE:

LEI 1

BR:?9:

;8FT EN3=O,80=0

21

2::::1 ODE: D',I
2:32 ODC ::::::::(,,1
2:~:3

I

2::::4

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5 MSEC.

.-, r,

- ...-,1':-

TRANSMIT BLANK TIME OF

.'.':J

,.~,

t-t

236 OEO 7B

STII 8

2:37 (lEI 2C

LB1 COUNT1

23::: OE2 70

:=;T1 I 0

239 OE3 70

STI I 0

240 OE4 6A06

cJSR

241 OEt.

un NOUSE

; CHECK FOR PROGRAM

242 OE7 :,:::32E

INL

I

SW ITCH CLO:::;URE

243 OE'::I 1-'
..:.

S~:::MBZ

244 OEA F1

.JP BEGIN

I

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245 OEB 0::::

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; :=;W I TCH CLOSED

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RESET

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246 OEC 1 1

I

247 OED 6061

...IMP INITX

248 OEF

1,:,021

,..IMP

249 OF1

4t:"
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IS PROGRAM FLAG SET?
RETRANSMIT DATA

O:~:

250 OF2

CLOSED

251

OF::::

'

NGEN

IYES

iNO GENERATE NEW RANDOM NUM8F

RMB

-

.. 2

::~:;::1..

LEI

2

252 OF5 ::::r.::

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; INITHiL.Ti'E S'ECEI VETI

253 OFf., 7A

:::';T1 I

; MD'lCifiY PO INTER

254 OF7

LBI COI..INTO

2[1

10

255 OF::: 70

::';11 I 0

256 OF9 70

STII 0

257 OFA 09

LBI RIDNLIM

;RE8ET COUNTER IRIN

DATA

4,535,333

49

50

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:=:TI I 0

259 OFe 70

STI I

260 OFD 6104

,JMP .".IT4

261
'21:":'~

OFF

44

NOP

100 ::::::=:/'·.0

LEI

2/:..::'::: 102 1,,01 r::
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104 70

0

(;

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0

2(.5 105 70

::'::TI I

0

2/-,/-,

1 Of:. 70

:=:T I I

0

;U-,7

1 07

:=:T I "r

n

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1 n:=: ;?n

LF: I

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10',1 ::<::01

:=: I:" (i r: z 0

; J::':I NF'/.IT (4 1._C1Cil"C

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;

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273 1. OF

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; 1S INPllT ST1:LL A LOGIC 1

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1 1":' ,',OF 1
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277

COUNTO

; YF::=:

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BFI4:

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; NO

Al:::::C 1

27:=: 1. 1C. DO·

.JF' BR5

279 1 17 06

X 0

2:~:O

1 1::: 51

AISC

2:::::1

1 19 06

X 0

2:=:2 1 lA 05

LD 0

2::::;::: 1 1[: 5f-i

P,I::::;C 1. 0

2:=:4

1 1C blOE

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2:=:~~

1 IE 2E

L1':T

2:::::{~-.,

1 IF 00

CLRA

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L?O

:=;f':"I-if-:7 0

:?::::9 l2::::

:-'::::01
~:=;

1.

BR 6

IRIN

AI:::;r.:::

;VALID 10 MSEC"

BLANf< TIME

l

"290

124 :::::::01

:::f<m::z

291

l21:. EC'
-'-'

,..IP BR7

INCl.

292 127 E3

•.IP BR6

lYE::':;

X 0

; :::::TORE. COUNT

293 12::: 0/"

BR7:

0

I

IS INPUT STTLL A I..OGIC 0

?

RISING TRANSITION DETECTF

TN

TRIN

4,535,333

52

51
294 1.29 05

L.D 0

i ::;:UBTRACT CORRECTION F{lCTOR

295 12A 5E

AI:3C 1.4

iFOR SAMPLE VALUE

296 121:: 44

NOP

297 12C 2C

LBI COUNT1

iSTORE SAMPLE VALUE

29:3 12D 01.:.

X 0

; IN COUNTER 1.

299 12E 2E

LBI

::;:00 12F 00

CLRA

;,:01.

1::::0 21.

:;:::KE

302

1.3.1

•
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i NO O',jERFLm·j

JMP ::=':TART

i OVr::RFL.OW E X I ::::T:3

::=':f<CmZ 0

iCHFCK FOR FALLING TRANSITION

F4

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1.

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REPEAT:

IRIN

-2

•
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F4

iCHECK FOR OVERFLOW

i INF'IIT STILL HIGH

::::06 1.:'::7 1...,9r::~:

,JSR ::=':At'1PLE

i

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un

iPOINT TO RECEIVE DATA POINTEI

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BDF'NT

FA!.LJ NG TRAN:,';] TI ON DETECTED

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:;:12 13F

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314 142
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; INF'IIT :::;'-TLL HIGH

,..IF'

1 'l::=': CO

iLOOK FOR FALLING TRANSITION

,.. IF' F:R9

(:4

::::f<GF: I' 0

;

F:f~:C:

T~WUT

:::TILL.. LOW

::::f<OBZ 0

317 1 4-(:, C4-

,IF'

:::: 1:::: 147

,j::::R ::=':AMPI... E

/-.,'~:·C::::

::::19 1 49 :-::1··:

320 1. 4A

LF:l

-"2

[:[l1"r',T

i TNPUT ::::T I LI._. HI CiH

iF'nINT TO RECEIVE nATA POINTF

I.D ,-',
..':'

.-,c•• ::", J

::::21.

1 4B 50

CAl':

:~:22

14e :20

SKC

:~2:~:

14[1 rF

,JP f-:F,' 10

324 1.4E 4'
1-"
:~:25

.r
1 Ll-

:~:26

::::~:O 1

::=':t1[: 2
:=:f<CiJ::Z 0

iL..OOK FOR FAL.LTNG TRANSITION

151 n::::

,..IF' F:Fi'1. 1.

; INPUT :3T I LL H TGH

:'::27 152 CF

,..IP F:R1. 0

i INPUT :::;THL LOW

32:~:

l:;'.-,

1 0".1 •.:' ::::::::01

E:Fi 10:

BR1. 1

::=':KC,f-:Z 0

4,535,333

.

::':":?9 1 "' •.•.1•• 1

54

53

; INF'UT ::::T1LL HIGH

[13

::::::::0 1 5/:-. f<:-II::: c:

.J:=;R ::::AMPL.E

iFAI LING TRANSITION DETECTED

:::::::: j

15:~:

3C

L 1':1 r:DPNT

iF'OINT TO

::'::~:2

1 ~~'':)

.-,~-

I.

:~::.::::::

1 ~A 50

•. • ••,,1

::::::':4 1 5B

DE

nATA POINTF

n ::::

:~:O

1 C::;I-:

RF~FJVF

::::::::~

...IF' r:R 12

::::::::f:. 15[1 47

:::::t1E: 1.

:::::::7 15E :330 1

BR1.2:

iLOOK FOR FALLING TRANSITION

::: :~~:~~:

1 1-.0

E'~'

._.IF' BR 1 :~:

:":": :'~: ,:',

1 /.

1"11"=

,IF' F:F:: 1 .:-'

1

::·:40 1 i.'~'):

;~::3n

I

1':1'1::' S

SI<:GB2. 0

::':4 1 1(,.4 E2

,..IP

-2

::':42 1e.5 f:,',JC:::::

·J:=:R

:::::A~1PLE

iFALLING TRANSITION DETECTED

::::4:3 le.7 3(:

un

BDPNT

iPOINT TO RECEIVE DATA POINl

344 16:::::
~:45

a5

; INPUT STILL HliCiH

LD 3

1 t:.9 50

CAB

346 16A 20
:347

~6B

ED

dF' BR14

:::4:::: 1 6(: 4D
:::49 le:.D 3C

:::::MB 0
BR1.4:

LBI BDPNT

i INCREMENT BD POINTER

~:50

l6E 05

LD 0

:::51

16F 51

AJ~;C

i

;3~52

170 F?

o..IF' BR15

; NO

::::5:~:

17 1. FE:

...IP BR16

i

;:':54

172 OC:.

r-:R15:

~:55

1 7'~' ::::::::0 1
-'

BFi17:

351:.

I._I
1 -'t= 1,.1::::4

~lEMORY

LOU4TION FILLF:

VEl::;

x 0
; LOOf< FOR FALLING TRAN::::IT10r;
..JMP RF:PEAT

::':5:=-:

i

35'7:'J 17:::: 00

BR1f:.:

; INPUT ::=:TILL HIGH

.. IP BR1.7

::;57 177 F::::

; J NF'UT :=;T I LL LOW

CALCULATE FiFCEIVED DATA CHECf<'SUM
CLRA

::::(:.0 179 O·?

LElI RIDNUM

::;61

17A 81.

ADD

:31.. . 2

1 7E: OA

LI::I RBLK1.

::::/.,.:::: 17C ::: 1

LA:::;-r

4,535,333

56

55
or:::

LBI

::::1;-.5 17E

:~:

1

ADD

:::::(,,(,. 17F

oe

L.BI

1.::::0 ::::1.

Ann

:~:(,.4

'3(:,7

J. 7D

RBU<2

RF:UG:::

L F: T R.r:: U::4
:~:

(-, ';1 1:::: 2

:~:

1

ADD

:=:70 1:::::::: OE

:::71

LE:I RCYSUM

::::kF

1 ::::4 21.

;CHFCKSUM CORRECT
; UIFC:f:-:;::I_

rr-1 I r·wr:RFo:;:'CT

::::7:::: 1:=:7 Cl::::

U:;-[

FLAnl

::::74

1:=::::: 4[1

::::I'1F:

il

;SFT

:~:75

1::::9 :::9

LBI

CNTf;'OI

;

::::Tm~F

i

INSTITUTE

RFAD FROM NVRAM FLAG
CCiNTf';'j-rl._

WORD

:=;T1 T 7

I HI

0,7

ORO

AN ARRAY

; CYCLE

::::7';"' 1:::F OF

LBI 0, 1.5

:=:::::0 190 ::::::::::::E

CiBD

192 (-8n7

,.J::m

NVRAt'1

::::::::2

194 1 A

LE: I

F:l fU

::::::::~:

195

:~::=:

1

1.

~j

L.D

::::::::~

;

1.

;=:kE

:::::=:4 196 21
197 601 B

::::::::1:. 199 1B

,..IMP ::::TART

LE: J

F:U:--?

::::::::7

1. 9A 15

LD 1.

::::::=::=;

1. 9B

·~'.l

::::I<E

::::::'::9 19(:

,~~,O

1B

,..IMP ::':1" AM'T

:::90

19F 1.e

LB J f:L K::,:

:::91

_1 ';IF 15

LD

I ~~

1 (-,\ ) I

1

I·:

::::',14 1 P,::: 1 n

1.1:::-1: [:IYA

::::95

L_n 1

1 A4

1 C';

::::96 1 A~5 21

:::f':-C

::::97

...Il'lP :::::T ART

lAI:. 601 B

;CHFCk

LBT RIDNI.l1'1

NI.lMr::Ff~

FOR

RANDOM

r1{~TCH

RECALL

58

; INJTILTZE COMPARE REGISTERS

; T:.J ITT AL TiE COIINTFR F;:I::'"G I :=. TFF~::::

4 1 I::

Ie 1

4 19

1[:2 &. 1 B5

420

1 C4

4"~~ 1

lCI:. 1:.0 IF:

06

:~:360

·..IT2:

X 0
.J~lP

.JT:~:"

.JT 1

LEI

(>

.JMP :=:TART

4~-:/~?

4?::':

:=;JJBROJ IT I NE ::::N·lPI . .F

4):4 1 c:=: :?C

425

1 C9 00

4";::-f:.

...1
1 CA '" 1

:=;AJ'1F'1..F

Lr: l COJ.JNT 1
CI. R{-,

::::;I..Il:: 1 :

AT:=;C

427 1 cr:: 44
4:~::=:

1 CC: 2 1

4~'?9

J CD CA

4:~:O

leE

4:::J

1 DO f:. 1 D~';"

.JMP ::::;1..11::2

4:~:2

1 D2 22

:::.;c

.JF'

:=;ur:: 1

:~.::~:c) 1

; F'G<D

; TNPUT

I NF'I.JT

IS A LOGIC 0

4,535,333

60

59
4:::::3 1[1:3 61 [II:,

,_.11'1P SUB:3

4::::4

1 [I;') 32

::::1.11.':2:

RC

4::':5

1D6 4:;::

:;::I.m::.:;

RET

N'v'h'At1'

I.,

• INPUT

IS A I...OOIC 1

4:~::6

::::r::

r:: I

:-:O/'1F'1.

1 [I::::: 7F

:=;TTJ

15,

1 D',I 7E:

:::::1' I I

11

437

1.D7

4::::;:::
4::'::9

440 IDA ::::C
441

1 Dr::

'?~

.::.:.

! ill

1. [IF

INITIALIZE SD MEMORY POINTER

;AND COMPARE

REGISTER

L.B I BDPNT

1\/

444

:=.:UBI:,:

i

I..D '?

; OUTF'! IT

p,nnRF:~::=;

PO I tJTED

or::n

:~n:~::F:':

445 1. EO ::::';'

I . BT

CNTROI.,

446 1F 1. ::::::::::::A

; MEt'1.CIRY

n .f'Ki 1.

447 lC:': 0::::

L.B I

44:":

::;;f,:'MF:7

1 E4 01.

0

RE.~,n

• CHECk FOR

I'IF:

lJR TTF

; FLACi

44',1 1E5 EF

,.IF' :::;1.11::4

• READ FU~;-:;

4c';O

1.

LB I I;:DPN1'

; Wf-i: I TF FU.;G

451

1E7 25

F/-, 3C

LD 2

452 1E:::: C:'(;

eM:

45:3 1 E',I 00

CL.F,;;

4~-,4

1EA

; WFi I TE Tn

CAl'lf)

:~::~:::'::C

~Nr:;:AI'1

l..EI 4
456

1.

FE

4~)7

1FF ::.:C

4~~~:=:

1F 0

, .1 F' :=; iI [: ~'5

F~',

:=:1..1 E: 4 '

LBI

BDPNT

LD 2

~~f~:;

459 IFl 50
460

J F2 ::':::'::2E

INi

4(-,1

1.F4 06

X 0

4(·.?

1F5

:~::F

4/,,:::: 1F 6 7F
41:,4

1F7 ::::F

41:,~"

1.

1.

Fr~

41:.7

1 FC

LBI NOU:::::F
:::;1'1 I

; INITIATE A DESELECT

15

I.B I NOI.I::=;E

F::::: ::'::3::::A

466

::::1.Jr::5:

::::::::1:,0

l. ET

:~:C

LBI BDF'NT

0

• DISABLE L DRIVERS

TO

62

,STORE NEW VALUE FOR

n

• MEMORY POINTER

471 200 05.

l.

472 201 ::::E:

LRI CO"'1F'1

• LAST MEMORY IItCATTON

4 ...·-· 20';' 21
I.:.

:~;f:::F

; ACCES:;F.D'::'

474

"20:~:

1-.1

475

~~O~

(J

.NO

n""

4:~:

RET

• YES
SlIF:ROUT I NF.

47/~.

477

20t~1

-?f1

TTMFR:

TI

MFR

LBI COUNTfi

/!I-,-,
...... " .... ";'-C>7 Oi)

1-:;I.RA

479 208

"'.

.. I j

AI::::C

4::::0 -;::0';'

C:~:

,JF'

-1

; 640

I.J~:F'-:_

DELAY LOOP

20A 05

LD 0

; COLJrJTO CONTENT:::; TO ACCU.

482 208 51

AISC

.ADD 1 TO ACCU

4:~:1

4:=::~:

-?fiC

n1

,._IF' r .F'1

4:=:~1

;wn

07

xns

4:~:5

20F

O~

I

4::::/:.

';;-,OF 51

ni.~.

; nF.CRF.:MFNT Tn COl INT 1

(l

AT:=:C

: Ann 1 TO (:'-11 tNT t

1

NOP

4:37 210 44
4:=:;3 -;: t 1

n

; STORE ZERO IN COUNTO

1.F'1-

X 0

; COl'lPARE COIINTFRS TO

4;=:9 212 3A

iCOMPARE REGISTERS

LD 0

4','0 21:::: 05
491 214

2C

LSI CCIUNT1

4Q-, 215

21

:==.::E

4'7::::: 21l-.

(:":-:O~.

JMP TIMF.R

:-:n

I RT

"~5 ;,£,19 0'"

..

LO

496 21A 2D

LBI COUNTO

i

497 21.B 21

SKE

: EQUAL.S COLINTO

4';>8 21C 6206

.jMP TIMER

f'·:'.'J

499

--"-1

~7:

21E 48

0
SKIP

iNa.

TRANSMIT SUBROUTINE
TXMTT:

COUNT

(':OM~'l

RET

500
501 21F 3B

;SKIP IF MOST SIGN_

LSI COMP1

IF l.EAST SIGN.

COUNT

INSTITUTE ANOTHER CYCLE

4,535,333

63
.;)
502 220 7'-'

64

. ST.l T 3

503 221 00

CLRA

504 222 3B

LBI COMP1

505 223 44

NOP

506 224

LEI 9

; :3ET EN::::= 1 • so= 1

AI:~:C

; 2FoOI JSEC.

336~1

507 226 51

INC 1:

LOOP

SOt;: 227 21

SKI::

509 228 Eb

,JP INC1

510 229 20

SI<C

; TRAN:=:MTT A I.nOIe 1.

::::0=1

51 1 22A F:::

.JP TRANSO

; TRAN:=;MTT A LOfiIC O.

:~;O=O

512 22B :3B

L.BI COMPI

513 22C 74

STIr

514 22D 3B

LBI COMPI

515 22E 00

CLRA

516 22F 51

INC2:

4

; 240 U:=:EC.

ATSC 1

517 230 21

SKF.

518 231 EF

.JP JNC2

519 232 48

LOOP

RF.T

520 233 3:361
521.

;~:35

TRANSO:

:38

; :=:ET F.N;:::=CI

LF.T
L F: I r:Or'lP 1

522 2:=:.=.. 7:3
5:7!::: 2:::7 ::::8

LBt cnMP1

524 2:38 OCI

CLRA

e,-,e
•. I .~ .. '. I

~':"~~:9

51

52{~,

:/:~:A

21

~::?7

;':~:8

F';I

.IF'

52:~:

'~~:"?:C:

4:=:

RF.·[

TNC3'

I Nr:::::

5'29

; RANDot1 Nl.Il'lr-:FR iiENFRATnR

5:~:O

; :=:FED r:nr·.n (:. J NFn l Nil, 1 1)

5:~:1

; FOR A NFW FiANnOl'l rJIIMF:FR

5:::2

; (0. 11) THRU (0. 14)

5:::::3 2::::[1 :::C

RANDOM'

TH;:~:; I

(1. 1 'f)

r;Ft,jFRATF.fI

I:::: I.I::;F:D .,:;:=; .; ;::14:=: T:::;

TN ANn :=:Tm~F[I TN

LEI nDPNT

5::::4 2::::E 7F.:
5::::5

~-:::::F

1A

LF:J r-:U-::1

CO·-,

240

n~

Lfl ()

l
,.. l ••,,:.':'_

,xnk 8TTS 1 AND 2 OF ELKl

4,535,333

66

65
::::41 4F

XA:,:;

5::=:::':: 24:? LiF

X{1:=;

24::=: 02

XOR

E::'".-, ,
,.1·.:'1

5:~:'"i)

540 '244 :',:F

L.F:T tJOII:::;F

541 245 0("

X

542 24/-, 0::;:

:=;f::'ME: 7

~54::::

0

,..IMP

247 1:,25E

544 24',1 (:0259

'?

:~;UBIO

,..IMP :=;111:: 11
::;;UE: 12'

l..E:J nnPNT

~,t~·5

"?4E: :::::C

1::":"1.'

'~;" ~1 r~':

,--, ~-~~

,n

504" 2.41}

SO

; :::;H I FT I.EFT F:LOCK::::; 1 THRIJ

CSf,B

.

la~·r,

548 24E 1.5

Ln 1

549 24F 4F

XA:::;

550 250 4F

XA::;

55l 251

17

xns

'-,r='-,

4E

CBA

552

...:.. .....1.:.

1;:'".:=- .....

253 3C

.........1 •.:.

; ENTRY .FOR THE LEAST
iSIGNIFICANT BIT OF BLK4

LBI BDPNT

554 '254 26

X

555 255 50

CAB

556 2.56 1::::

SKMBZ 3

557 257 625E

.JMP SUE:10

55:3 259 1A

21-,.1

::::c

:;;;UB1::=:·.

564 262 05
5(:.5 263
5tJ"

570

571

; FnRCE LEAST SIGN. BIT ON

LBJ BDPNT

;SHTFT REGISTER TO 1

()

...IP SUB14
...IMP :::::LIB12

567 265 624B

569

; XOR OPERATION =

AI:::::C .,.
'.'

•.•.1••

48

iSHIFT REGISTER TO 0

LBI 1 , 15

LD

.,..,.
..1

264 E7

51:,::: 267

iFORCF LEAST SIGN. BIT ON

01':1)

::::;UF:lO:

51::.2 25F :::'::::::::':E
~ll:.::::

; XOR OPERATION

...IMP :::::UBl::::

6261

5/:.1 25E 1E

=0

LBI 1 , 1 1
OBn

:=;UBl 1

559 25A ::::::::3E
5/:.0 25C

:7~

SUBl4:

RET

I

I

CONTINUE UNTIL FINISHED

TERMINATE PROCESS

4,535,333

67
572

"COPYF\' T OHT

19(;:2

CHAMBERLAT N MAN! IF {4CTUf~ I NCi

57::::

68
CORF'Of~iH

ION.

ALL R T f:;HT::;; Rr:::::;ERVFD"

575

576
577

END

I claim as my invention:
1. Apparatus for controlling a receiver with a remote
radio frequency transmitter comprising a first micro-·
processor and a first memory means in said receiver for
storing at least one address code, non-radio frequency
transmitting means in said receiver, switch means for
energizing said non-radio frequency transmitting means
to transmit an address code, a non-radio frequency receiving means in said transmitter for receiving said
address code, a second micro-processor and second
memory means in said transmitter for storing said address code, radio frequency radiating means in said
transmitter for radiating said address code, receiving
means in said receiver for receiving said radio frequency radiated address code, said first micro-processor
in said receiver comparing the received address code
with the address code stored in said first memory, an
output circuit energized by said comparing means when
said addresses are the same, wherein said first memory
means comprises a non-volatile memory and a programmable read only memory and said second memory
means comprises a non-volatile memory and a programmable read only memory.
2. Apparatus according to claim 1 wherein said first
micro-processor is programmed to operate as a pseudo
random number generator to generate a plurality of
different address codes to allow the address codes in
said transmitter and receiver to be changed.
3. Apparatus according to claim 2 wherein said nonradio frequency transmitting means is a light radiator.

15

4. Apparatus according to claim 3 wherein said nonradio frequency receiving means in said transmitter is a
light detector.
5. Apparatus according to claim 2 wherein said nonradio frequency transmitting means in said receiver is an
electrical conductor.

20

25

6. Apparatus according to claim 4 wherein said address code comprises a serial binary code of pulse
length modulated form of a plurality of word lengths.
7. Apparatus according to claim 6 wherein said address code contains a binary check block for indicating
whether a correct signal has been received.

8. Apparatus according to claim 6 wherein said address code contains a binary synchronizing block for
30 synchronizing the transmitter and receiver.
9. Apparatus according to claim 6 wherein said address code contains a terminating block.
10. Apparatus according to claim 6 wherein said
address code is repeated and each address code is separated by a blanking period.
11. Apparatus according to claim 2 including a first
octal latch in said receiver which is connected to said
first micro-processor.
40
12. Apparatus according to claim 2 including a second octal latch in said transmitter.
35

* * * * *
45

50

55

60

65