Google Inc. v. Netlist, Inc.

Filing 182

MOTION to Stay Pending Reexamination of U.S. Patent No. 7,289,386 filed by Google Inc.. Motion Hearing set for 10/26/2010 01:00 PM in Courtroom 3, 3rd Floor, Oakland. (Attachments: # 1 Affidavit, # 2 Exhibit 1, # 3 Exhibit 2 (1 of 2), # 4 Exhibit 2 (2 of 2), # 5 Exhibit 3, # 6 Proposed Order)(Ezgar, Geoffrey) (Filed on 8/26/2010)

Google Inc. v. Netlist, Inc.

Doc. 182 Att. 5

Exhibit 3

Dockets.Justia.com

UNITED STATES PATENT AND TRADEMARK OFFICE
Commissioner for Patents United Stales Patents and Trademark Office P.O.Box 1450 Alexandria, VA 22313-1450 www uspto gov

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THIRD PARTY REQUESTER'S CORRESPONDENCE ADDRESS

Date: MAILED

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AUG 0 9 2010
CENTRAL REEXAMINATION UNrT

Transmittal of Communication to Third Party Requester Inter Partes Reexamination REEXAMINATION CONTROL NO. : 95000546 PATENTNO. : 7289386 TECHNOLOGY CENTER : 3999 ART UNIT : 3992

Enclosed is a copy of the latest communication from the United States Patent and Trademark Office in the above identified Reexamination proceeding. 37 CFR 1.903. Prior to the filing of a Notice of Appeal, each time the patent owner responds to this communication, the third party requester of the inter partes reexamination may once file written comments within a period of 30 days from the date of service of the patent owner's response. This 30-day time period is statutory (35 U.S.C. 314(b)(2)), and, as such, it cannot be extended. See also 37 CFR 1.947. If an ex parte reexamination has been merged with the inter partes reexamination, no responsive submission by any ex parte third party requester is permitted. All correspondence relating to this inter'partes reexamination proceeding should be directed to the Central Reexamination Unit at the mail, FAX, or hand-carry addresses given at the end of the communication enclosed with this transmittal.

l'l()i.-2070(KL'v.()7-0-l)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE Llnited States Patent and Trademark Office Address: COMMISSIONER FOR PATENTS
P.O Box MSO Alexandria, Virginia Z23\3-1450 w-ww.usplo.gov

APPLICATION NO.

FILING DATE

FIRST NAMED INVENTOR 7289386

ATTORNEY DOCKET NO.

CONFIRMATION NO.

95/000,546
20995 7590

05/11/2010
08/09/2010

19473-0052RX1
EXAMINER PEIKARl, BEHZAD ART UNIT 3992

8688

KNOBBE MARTENS

OLSON & BEAR LLP

2040 MAIN STREET FOURTEENTH FLOOR IRVINE, CA 92614

PAPER NUMBER

MAIL DATE 08/09/2010

DELIVERY MODE

PAPER

Please find below and/or attached an Office communication concerning this application or proceeding. The time period for reply, if any, is set in the attached communication.

PTOL-90A (Rev. 04/07)

Control No.

Patent Under Reexamination 7289386 Art Unit 3992 address.

ORDER GRANTING/DENYING REQUEST FOR INTER PARTES REEXAMINATION

95/000,546 Examiner B. James Peikari

The MAILING DATE of this communication appears on the cover sheet with the correspondence

The request for inter partes reexamination has been considered, identification ofthe claims, the references relied on, and the rationale supporting the determination are attached.

Attachment(s);

D PTO-892

3 PTO/SB/08

DOther:

1. 1 ^ The request for inter partes reexamination is GRANTED. n An Office action is attached with this order. 3 An Office action will follow in due course.

2. n The request for inter partes reexamination is DENIED. This decision is not appealable. 35 U.S.C. 312(c). Requester may seek review of a denial by petition to the Director of the USPTO within ONE MONTH from the mailing date hereof 37 CFR 1.927. EXTENSIONS OF TIME ONLY UNDER 37 CFR 1.183. In due course, a refund under 37 CFR 1.26(c) will be made to requester. All correspondence relating to this inter partes reexamination proceeding should be directed to the Central Reexaniination Unit at the mail, FAX, or hand-carry addresses given at the end of this Order.

u s . Patent and Trademark Office PTOL-2063 (08/06)

Paper No. 20100804

Transmittal of Communication to Third Party Requester Inter Partes Reexamination

Control No. 95/000,546 Examiner B. James Peikari

Patent Under Reexamination 7289386 Art Unit

3992

-- The MAILING DATE of this communication appears on the coversheet with the correspondence address. -

Enclosed is a copy of the latest communication from the United States Patent and Trademark Office in the above-identified reexamination proceeding. 37 CFR 1.903. Prior to the filing of a Notice of Appeal, each time the patent owner responds to this communication, the third party requester of the inter partes reexamination may once file written comments within a period of 30 days from the date of service of the patent owner's response. This 30-day time period is statutory (35 U.S.C. 314(b)(2)), and, as such, it cannot be extended. See also 37 CFR 1.947. If an ex parte reexamination has been merged with the inter partes reexamination, no responsive submission by any ex parte third party requester is permitted. All correspondence relating to this inter partes reexamination proceeding should be directed to the Central Reexamination Unit at the mail, FAX, or hand-carry addresses given at the end of the communication enclosed with this transmittal.

U.S. Patent and Trademark Office PTOL-2070 (5/04)

Paper No 20100804

71338

U.S. PTO

95000546 - GAU: 3992
PTO/SaOSa (07-09)

05/1 /IO

Approved for use through 07/31/2012. OMB 0651-0031 U.S. Patent and Trademarti OtTice; U.S. OEPARTMEI^ OF.COMMERCE 'Under Ihe PaperworK Reduction Act of 1995. no persons are required to respond lo a colledion of Informalion unless n contains a v«lid<>tilB'mBtrol CJSSJerp P T n n«mlief Sulwtitute for fomn 1449/PTO

Complete tf Known

INFORMATION DISCLOSURE STATEMENT BY APPLICANT
(Use as many s/ieets as necassary)

Application Nuinber Filing Date First Named Inventor Art Unit Examiner Name Attomey Docket Number

5/11/2010 Jayesh R. Bhakta

j^t^nnn.^A

il
1

Peikari
19473-0052RX1

V

Sleet
Examiner Initials' Cite No.'

JiL
Document Number Number-Kind C o d e " " " ^ Publication Date MM-DD-YYYY

U. S. PATENT DOCUMENTS
Name of Pstentee or Applicant of Cited Document Pages, Columns. Unes. Where Relevant Passages or Relevant Figures Appear

, ^ ^ 7,289,386 ^s- 6.209,074 us-6,414,868 us- 4,368,515 us-2006/0117152 ususususususususususususususExaminer Initios' Cite No.' Foreign Patent IJocument

10/30/2007 03/27/2001 07/02/2002 01/11/1983 06/01/2006

Bhakta e t a l . Dell e t a l . Wong et al. Nielsen Amidi et al.

F O R E I G N P A T E N T D O C U MENTS Publication Name of Patemee or Date Applicant of Cited Document MM-OD-YYYY Country Ctxto'"Number'-Kind Coda'lit luKMn)

Pages. Columns, Unes, Where Relevant Passages Of Relevant Figures Appear

V

Examiner Signature

/B. James Peikari/

Date Considered

08/05/2010

'EXAMINER: Initial if reference considered, whether or not dtat'on is in conformance with MPEP 609. Draw line through citation if not in confonnance and nol considered Indude copy of this form with next communication to applicant. 'Applicant's unique citation designation number (optional). ' S e e Kinds Codes of USPTO Patent Documents at www.usplo.aov or MPEP 901 04. ' Enter Olfice that issued the document, by the two-letter code (WIPO Standard ST 3) ' For Japanese patent documents, Ihe Indication of the year of the reign of the Emperor must precede Ihe serial number of the patent document. 'Kind of document by the appropriate symbols as indicated on Ihe document under WIPO Standard ST.16 it possible. 'Applicant is to place a check martt here If English language Translation is attached. This collection of information is required by 37 CFR 1.97 snd 1.98. The information is required to obtain or retain a benefit by the public which is to file (and by Ihe USPTO to process) an application. Confidentiality is governed by 35 U.S.C. 122 and 37 CFR 1.14. This collection is estimated to take 2 hours lo complete, including gathering, preparing, and submitting the completed application fomi to the USPTO. Time will vary depending upon the individual case. Any comments on the amount of time you require to complete this fomn and/or suggestions for reducing this burden, should be sent to the Chief Information Officer, U.S. Patent and Trademark Office, P.O. Box 1450, Alexandria, VA 22313-1450. OO NOT SEND FEES OR COMPLETED FORMS TO THIS ADDRESS SEND TO: Commissioner for Patents, P.O. Box 1450, Alexandria, VA 22313-1450. If you need assistance in completing ttie form, call 1-800-PTO-9199 (1-800-786-9199) end select option 2.

ALL REFERENCES CONSIDERED EXCEPT WHERE LINED THROUGH. /BJP/

95000546 - GAU: 3992
PTO/SB/08b (07-09) Approved lor use through 07/31/2012. OMB 06S1-O031 U.S. Patent and Tradenwrtc Oflice; U.S. DEPARTMENT OF COMMERCE

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Complete if Known Application Number Filing Date First Named Inventor Art Unit

_

_

^

INFORMATION DISCLOSURE STATEMENT BY APPLICANT
(Use as manysliaets as necessary)

5/11/2010 Jayesh R. Bhakta

Examiner Name Attorney Docket Numtjer

Peikari
19473-0052RX1 / | T^

\Sheet

2

of

2

Examiner Initials*

Cite No.'

NON PATENT LITERATURE DOCUMENTS Include name ofthe author (in CAPITAL LETTERS), title ofthe article (v/hen appropriate), title of the item (book, magazine, journal, senal, symposium, catalog, etc.), date, page(s), volume-issue numt}er(s), publisher, city and/or country where published.

Barr, Michael, "Programmable Logic: What's it to Ya?," Embedded Systems Programming, June 1999, pp. 75-84.

·

-=--^

Examiner Signature

IB. James Peikari/

Date Considered

.08/05/2010

·EXAMINER: InHial if reference considered, whether or not citation is in conformance with MPEP 609 Draw tine through dlation il nol in contormance and not considered. Include copy of this t o m wilh next communication to applicanl. 1 Applicant's unique citation designation number (optional). 2 Applicant is to place a check mark here if English language Translation is attached. This collection of infonnation Is required by 37 CFR 1.98. The infonnation is required to obtain or retain a benefit by the public which is lo file (and by the USPTO to process) an application. Confidentiality is governed by 35 U.S.C. 122 and 37 CFR 1.14. This colleclion is estimated to take 2 hours to complete, including gathering, preparing, and submitting the completed application form to ttie USPTO. Time wtll vary depending upon the individual case. Any comments on the amount of time you require to complete this form and/or suggestions for reducing this burden, should be sent to Ihe Chief Information Officer. U S . Palent and Trademark Office. P O. Box 1450, Alexandria, VA 2231J-1450. DO NOT SEND FEES OR COMPLETED FORMS TO THIS ADDRESS. SEND TO: C o m m i s s i o n e r f o r P a t e n t s , P.O. B o x 1 4 5 0 , A l e x a n d r i a , V A 2 2 3 1 3 - U 5 0 . If you n e e d assistance in completing the fonn, call l-eoChPTO-9199 ( 1 - 8 0 0 - 7 6 6 - 9 1 9 9 ) a n d select option 2.

ALL REFERENCES CONSIDERED EXCEPT WHERE LINED THROUGH. /BJP/

Application/Control Number: 95/000,546 Art Unit: 3992 RESPONSE TO REQUEST FOR INTER PARTES REEXAMINATION

Page 2

1.

The Request filed May 11,2010 alleges that there are substantial new questions of

patentability (SNQ) affecting claims 1-12 of U.S. Patent Number 7,289,386 (the '386 patent) based on the following prior art references: · ·
·

U.S. Patent No. 6,209,074 to Dell ("Dell"). U.S. Patent No. 6,414,868 to Wong ("Wong"). U.S. Patent No. 4,368,515 to Nielsen ("Nielsen"). U.S. Patent Publication No. 2006/0117152 to Amidi ("Amidi"). Barr, Michael, "Programmable Logic: What's it to Ya?" Embedded Systems Programming, June 1999, pp. 75-84 ("Barr").

Brief Overview ofthe Patent 2. The '386 patent is directed to a memory module decoder wherein a memory module is

connectable to a computer system and includes a printed circuit board, a plurality of memory devices coupled to the printed circuit board, and a logic element coupled to the printed circuit board. The plurality of memory devices has a first number of memory devices. The logic element receives a set of input control signals from the computer system. The set of input control signals corresponds to a second number of memory devices smaller than the first number of memory devices. The logic element generates a set of output control signals in response to the set of input control signals. The set of output control signals corresponds to the first number of memory devices.

Application/Control Number: 95/000,546 Art Unit: 3992

Page 3

Prosecution History 3. The '386 patent matured from patent application number 11/173,175, whose relevant

prosecution history may be summarized as follows: · Application 11/173,175 is a continuation of 11/075,395 (which issued as U.S. Patent No. 7,286,436). · · Application 11/173,175 was filed on July 1, 2005 with claims 1-20. Ina telephone interview on January 10, 2007, an election was made to prosecute claims 1-15 due to a restriction requirement. · In the Office Action mailed January 26, 2007, claims 1, 2, 8-10, 14 and 15 were rejected under 35 U.S.C. § 103(a) as being unpatentable over Lee (U.S. No. 7,120,727); claims 4-7 were rejected under 35 U.S.C. § 103(a) as being unpatentable over Lee in view of Barr; claims 1-3,8, 11 and 14 were rejected under 35 U.S.C. § 103(a) as being unpatentable over Miyasaka (U.S. No. 4,392,212); claims 4-7 were rejected under 35 U.S.C. § 103(a) as being unpatentable over Miyasaka in view of Barr; and claims 12 and 13 were indicated as having allowable subject matter. · On June 19, 2007, an amendment was filed which cancelled claims 1-11 and 1420, amended claim 12, and added new claims 21-31.

Application/Control Number: 95/000,546 Art UnlL 3992 ·

Page 4

On July 30, 2007, a Notice of Allowance was mailed, in which the examiner allowed claims 12, 13 and 21-31 and provided the following reasons for allowance:

"With respect to independent claim 12, there is no teaching, suggestion, or motivation for combination in the prior art to the logic element generating a second command signal, corresponding to a first number of ranks, based on the first command signal, corresponding to a second number of ranks, wherein the second number of ranks is less than the first number of ranks (i.e., the logic element generates more rank select signals from a number of rank select signals)." · · · On July 19, 2007, comments on the statement of reasons for allowance were filed. On October 30, 2007, the application issued as U.S. Patent No. 7,289,386. On May 13, 2008 a Certificate of Correction was issued.

SNQs Raised in the Request 4. The Requester identified the following SNQs (see Request, pages 5-6): · Issue 1: A substantial new question of patentability as to claims 1-5, 7 and 9-12 is raised by Dell. · Issue 2: A substantial new question of patentability as to claims 6 and 8 is raised by Dell in view of Barr. · Issue 3: A substantial new question of patentability as to claims 1-4, 10 and 12 is raised by Wong. · Issue 4: A substantial new question of patentability as to claims 5-8 is raised by Wong in view of Barr.

Application/Control Number: 95/000,546 Art Unit: 3992
·

Page 5

Issue 5: A substantial new question of patentability as to claims 1,3, 10 and 12 is raised by Nielsen. Issue 6: A substantial new question of patentability as to claims 5-8 is raised by Nielsen in view of Barr.

·

Issue 7: A substantial new question of patentability as to claims 1-12 is raised by Amidi.

Discussion of SNQs 5. A prior art patent or printed publication raises a substantial new question of patentability

where there is: (A) a substantial likelihood that a reasonable Examiner would consider the prior art patent or printed publication important in deciding whether or not the claim is patentable, MPEP §2242 (I) and, (B) the same question of patentability as to the claim has not been decided in a previous or pending proceeding or in a final holding of invalidity by a federal court. See MPEP §2242 (III). For any reexamination ordered on or after November 2, 2002, reliance on previously cited/considered art, i.e., "old art." does not necessarily preclude the existence ofa substantial new question of patentability that is based exclusively on that old art. Rather, determinations on whether a substantial new question of patentability exists in such an instance shall be based upon a fact-specific inquiry done on a case-by-case basis. See MPEP 2242.

Application/Control Number: 95/000,546 Art Unit: 3992
Issue 1

Page 6

A substantial new question ofpatentability as to claims 1-5, 7 and 9-12 is raised by Dell.

6.

Dell is directed to a memory module that has a logic circuit and multiple memory devices

that are each configured in M banks. The logic circuit receives from a memory controller a number of address inputs and a number of bank address signals. The received address inputs and bank address input signals correspond to N-bank memory devices. The logic circuit re-maps at least one ofthe address inputs as an additional bank address signal to the memory device having M banks {note the Abstract). This remapping allows a system that expects a module with N banks to use a module that actually has 2N banks {note column 8, lines 15-28. 52-61). Dell further notes an application in which a "system may need a two bank memory chip, but the memory module may include a memory device that is a four bank device" {see column 2, lines 29-31). Thus, Dell appears to teach or suggest a logic element generating a second command signal, corresponding to a first number of ranks, based on the first command signal, corresponding to a second number of ranks, wherein the second number of ranks is less than the first number of ranks, which it appears that the examiner considered as allowable features of claims 1-5, 7 and 9-12.

7.

There is a substantial likelihood that a reasonable examiner would consider the teachings

of Dell important in deciding the patentability of claims 1-5, 7 and 9-12 ofthe '386 patent. Dell is not of record in the file ofthe '386 patent and is not cumulative to the art of record in the

Application/Control Number: 95/000,546 Art Unit: 3992

Page 7

original file. The teachings of Dell were not subject to a final holding of invalidity by a federal court. Accordingly, Dell raises a substantial new question of patentability with regard to claims 1-5, 7 and 9-12.

Issue 2 A substantial new question of patentability as to claims 6 and 8 is raised hy Dell in view of Barr.

8.

In addition to the teachings of Dell described above, Barr discloses that field-

programmable gate array (FPGAs) and complex programmable-logic devices (CPLDs) are commonly used in memory circuitry as address decoders {see Barr, pages 2-4). Thus, Barr appears compatible with Dell in teaching the use of FPGAs or CPLDs for use with a logic element generating a second command signal, corresponding to a first number of ranks, based on the first command signal, corresponding to a second number of ranks, wherein the second number of ranks is less than the first number of ranks, which it appears that the examiner considered as allowable features of claims 6 and 8.

9.

There is a substantial likelihood that a reasonable examiner would consider the

combination of Dell and Barr important in deciding the patentability ofthe claims ofthe '386 patent. Barr was of record in the file ofthe '386 patent and was used in rejections during the original prosecution. However, the request describes the applicability ofthe logic elements of

Application/Control Number: 95/000,546 Art Unit: 3992

Page 8

Barr to prior art systems that were never cited during the original prosecution. Therefore, the teachings of Barr have been presented in a new light. The teachings of Barr were not subject to a final holding of invalidity by a federal court. Accordingly, the combination of Dell and Barr raises a substantial new question of patentability as to claims 6 and 8.

Issue 3 A substantial new question of patentability as to claims 1-4, 10 and 12 is raised hy Wong.

10.

Wong is directed to a memory module that has a logic circuit, including a buffer and a

bank control circuit, and multiple memory devices that are organized into banks (i.e., "ranks") on the module. The logic circuit receives from a memory controller a number of address inputs and a number of bank select signals. The received address input signals and bank select input signals correspond to that number of banks. The logic circuit re-maps at least one ofthe address input signals and the bank address signals into more bank address signals than were received from the memory controller. This remapping allows a system that expects a module with one bank, for example, to use a module that actually has two banks, {note, e.g., Figs. 4A and 4B, showing the mapping of one hank select inpul signal PASO and one address input signal A 13 into two hank select output signals RASllX and RASLX, which select tM'o different banks). Thus, Wong appears to teach or suggest a logic element generating a second command signal, corresponding to a first number of ranks, based on the first command signal, corresponding to a second number of ranks, wherein the second number of ranks is less than the

Application/Control Number: 95/000,546 Art Unit: 3992

Page 9

first number of ranks, which it appears that the examiner considered as allowable features of claims 1-4, 10 and 12.

11.

There is a substantial likelihood that a reasonable examiner would consider the teachings

of Wong important in deciding the patentability of claims 1-4, 10 and 12 ofthe '386 patent. Wong is not of record in the file ofthe '386 patent and is not cumulafive to the art of record in the original file. The teachings of Wong were not subject to a final holding of invalidity by a federal court. Accordingly, Wong raises a substantial new question of patentability with regard to claims 1-4, 10 and 12.

Issue 4 A sub.stantial new question ofpatentability as to claims 5-8 is raised hy Wong in view of Barr.

12.

The teachings of Wong and Barr have been described above. Barr appears compatible with Wong in teaching the use of FPGAs or CPLDs for use with

a logic element generating a second command signal, corresponding to a first number of ranks, based on the first command signal, corresponding to a second number of ranks, wherein the second number of ranks is less than the first number of ranks, which it appears that the examiner considered as allowable features of claims 5-8.

Application/Control Number: 95/000,546 Art Unit: 3992
13. There is a substantial likelihood that a reasonable examiner would consider the

Page 10

combination of Wong and Barr important in deciding the patentability ofthe claims ofthe '386 patent. Accordingly, the combination of Wong and Barr raises a substantial new question of patentability as to claims 5-8.

Issue 5 A substantial new question of patentability as to claims 1,3, 10 and 12 is raised by Nielsen.

14.

Nielsen is directed to a memory module that has a logic circuit, which includes address

decode logic, and multiple memory devices. The multiple memory devices are each activated by a separate chip select (CS) signal and thus each memory device is a "rank" on the module. A chip select is not a necessary input into the module; however, a single rank can be addressed from the computer side without necessarily using a chip select signal. The address lines for the module provide signal lines for only a single memory. The logic circuit generates more chip select signals than it receives (which could be zero) in order to address more ranks and increase the number of addressable memory locations {see column 2, lines 3-5, and Fig. 4). The logic circuit detects certain preprogrammed addresses appearing on the address signal lines from the computer (the game console) and switches the active rank that responds to general addresses accordingly {see column 5, lines 54-66).

Application/Control Number: 95/000,546 Art Unit: 3992

Page 11

Absent the use of and response to the preprogrammed switching addresses, the memory module would provide in effect a single rank of memory. The logic circuit converts a sequence of address signals for one rank into signals that address multiple ranks {.see, e.g., Figs. 3 and 4, showing the generation of multiple chip select (CS) signals). Thus, Nielsen appears to teach or suggest a logic element generating a second command signal, corresponding to a first number of ranks, based on the first command signal, corresponding to a second number of ranks, wherein the second number of ranks is less than the first number of ranks, which it appears that the examiner considered as allowable features of claims 1,3, 10 and 12.

15.

There is a substantial likelihood that a reasonable examiner would consider the teachings

of Nielsen important in deciding the patentability of claims 1,3, 10 and 12 ofthe '386 patent. Nielsen is not of record in the file ofthe '386 patent and is not cumulative to the art of record in the original file. The teachings of Nielsen were not subject to a final holding of invalidity by a federal court. Accordingly, Nielsen raises a substantial new question of patentability with regard to claims 1,3. 10 and 12.

Issue 6 A .substantial new question of patentability as to claims 5-8 is raised by Nielsen in view of Barr.

Application/Control Number: 95/000,546 Art Unit: 3992
16. The teachings of Nielsen and Barr have been described above.

Page 12

Barr appears compatible with Nielsen in teaching the use of FPGAs or CPLDs for use with a logic element generafing a second command signal, corresponding to a first number of ranks, based on the first command signal, corresponding to a second number of ranks, wherein the second number of ranks is less than the first number of ranks, which it appears that the examiner considered as allowable features of claims 5-8.

17.

There is a substantial likelihood that a reasonable examiner would consider the

combination of Nielsen and Barr important in deciding the patentability ofthe claims ofthe '386 patent. Accordingly, the combination of Nielsen and Barr raises a substantial new question of patentability as to claims 5-8.

Issue 7 A substantial new question of patentability as to claims 1-12 is raised by Amidi.

18.

Amidi is directed to a memory module that has a logic circuit, which includes a CPLD

(complex programmable logic device) and register circuitry, and multiple DRAM memory devices organized into "ranks". The ranks of memory devices are each activated by one ofa larger number of output chip select (CS) signals, e.g., one of four signals rcsO, rcsl, rcs2 or rcs3, that are generated from a smaller number of input chip select signals, e.g., one of two signals csO or csl, and an address signal {see, e.g.. Fig. 6A. or paragraphs 8-11).

Application/Control Number: 95/000,546 Art Unit: 3992

Page 13

Thus, Amidi appears to teach or suggest a logic element generating a second command signal, corresponding to a first number of ranks, based on the first command signal, corresponding to a second number of ranks, wherein the second number of ranks is less than the first number of ranks, which it appears that the examiner considered as allowable features of claims 1-12.

19.

There is a substantial likelihood that a reasonable examiner would consider the teachings

of Amidi important in deciding the patentability of claims 1-12 ofthe '386 patent. Amidi is not of record in the file ofthe '386 patent and is not cumulative to the art of record in the original file. The teachings of Amidi were not subject to a final holding of invalidity by a federal court. Accordingly, Amidi raises a substantial new question of patentability with regard to claims 1-12.

Conclusion 20. Claims 1 -12 are subject to reexamination.

21.

On page 21 ofthe request, the conclusion states:

"For the foregoing reasons, substantial and new quesfions of patentability exist with respect to claims 1-12 of the ' 386 patent. The references cited above render claims 1-13 ofthe '386 patent unpatentable as set forth above. Reexamination of these claims is therefore requested." From this passage, it is not clear to which set of claims the requestor was referring when requesting reexamination.

Application/Control Number: 95/000,546 Art Unit: 3992

Page 14

Also, there is some confijsion as to whether requester meant to assert the existence ofa substantial new question of patentability (SNQ) for claim 13. For example, in contrast to the statement from page 21 recited above, claim 13 was listed among the substantial new questions of patentability (SNQ) on pages 3 and 4 ofthe request. On the other hand, the proposed rejections in the table of contents (pages i and ii) mention claims 1-12, but not claim 13. All things considered, it appears that the request did not assert the existence ofa substantial new question of patentability (SNQ) for claim 13, inasmuch as claim 13 is missing from the claim charts submitted with the request (see 35 U.S.C. § 311 (b)(2); see also 37 CFR 1.915b and 1.923). Consequently, claim 13 will not be reexamined. Note Sony Computer Entertainment America Inc., et al. v. Jon W. Dudas. Civil Action No. 1:05CV1447 (E.D.Va. May 22, 2006), Slip Copy, 2006 WL 1472462, in which the District Court upheld the Office's discretion to not reexamine claims in an inter partes reexamination proceeding other than those claims for which reexamination had specifically been requested. The Court stated: "To be sure, a party may seek, and the PTO may grant,... review of each and every claim ofa patent. Moreover, while the PTO in its discretion may review claims for which ... review was not requested, nothing in the statute compels it to do so. To ensure that the PTO considers a claim for... review, §311 (b)(2) requires that the party seeking reexamination demonstrate why the PTO should reexamine each and every claim for which it seeks review. Here, it is undisputed that Sony did not seek review of every claim under the '213 and '333 patents. Accordingly, Sony cannot now claim that the PTO wrongly failed to reexamine claims for which Sony never requested review, and its argument that AIPA compels a contrary result is unpersuasive."

Application/Control Number: 95/000,546 Art Unit: 3992
Service of Papers 22.

Page 15

Any paper filed with the USPTO, i.e., any submission made, by either the Patent Owner

or the Third Party Requester must be served on every other party in the reexamination proceeding, including any other third party requester that is part ofthe proceeding due to merger ofthe reexamination proceedings. As proof of service, the party submitfing the paper to the Office must attach a Certificate of Service to the paper, which sets forth the name and address of the party served and the method of service. Papers filed without the required Certificate of Service may be denied consideration. 37 CFR 1.903; MPEP 2666.06.

Amendments in Reexamination Proceedings 23. Any proposed amendment to the specification and/or claims in this reexamination proceeding

must comply with 37 CFR 1.530(d)-(j), must be formally presented pursuant to 37 CFR 1.52(a) and (b), and must contain any fees required by 37 CFR 1.20(c). Amendments in an inter partes reexamination proceeding are made in the same manner that amendments in an ex parte reexamination are made. MPEP 2666.01. See MPEP 2250 for guidance as to the manner of making amendments in a reexamination proceeding.

Extensions of Time 24. Extensions of time under 37 CFR 1.136(a) will not be pennitted in inter partes

reexamination proceedings because the provisions of 37 CFR 1.136 apply only to "an applicant" and not to the patent owner in a reexamination proceeding. Addifionally, 35 U.S.C. 314(c) requires that inter partes reexamination proceedings "will be conducted with special dispatch"

Application/Control Number: 95/000,546 Art Unit: 3992

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(37 CFR 1.937). Patent owner extensions of time in inter partes reexaminafion proceedings are provided for in 37 CFR 1.956. Extensions of time are not available for third party requester comments, because a comment period of 30 days from service of patent owner's response is set by statute. 35 U.S.C. 314(b)(3).

Notification of Concurrent Proceedings 25. The patent owner is reminded ofthe confinuing responsibility under 37 CFR 1.985(a), to

apprise the Office of any lifigation activity, or other prior or concurrent proceeding, involving the patent undergoing reexamination or any related patent throughout the course of this reexamination proceeding. The third party requester is also reminded ofthe ability to similarly inform the Office of any such activity or proceeding throughout the course of this reexamination proceeding. See MPEP § 2686 and 2686.04.

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All correspondence relating to this inter partes reexamination proceeding should be directed: By Mail to: Mail Stop Inter Partes Reexam Central Reexamination Unit Commissioner for Patents United States Patent & Trademark Office P.O. Box 1450 Alexandria, VA 22313-1450 By FAX to: [phone] Central Reexamination Unit By hand to: Customer Service Window Randolph Building 401 Dulany Street Alexandria, VA 22314 Registered users of EFS-Web may alternatively submit such correspondence via the electronic filing system EFS-Web, at https://sp0rtal.uspt0.g0v/authenticate./authenticateuserl0calepfhtml. EFS-Web offers the benefit of quick submission to the particular area ofthe Office that needs to act on the correspondence. Also, EFS-Web submissions are "soft scanned" (i.e., electronically uploaded) directly into the official file for the reexamination proceeding, which offers parties the opportunity to review the content of their submissions after the "soft scanning" process is complete. Any inquiry conceming this communication should be directed to the Central Reexamination Unit at telephone number [phone]. /B. James Peikari/ B. James Peikari Primary Examiner Central Reexamination Unit 3992

enn.^'^^SS'CA HARRISON SUPERVISORY PATENT EXAMINER