Apple Inc. v. Samsung Electronics Co. Ltd. et al

Filing 663

EXHIBITS re #660 Administrative Motion to File Under Seal Apple Inc.'s Notice of Motion and Motion for Partial Summary Judgment Exhibits to Mueller Declaration ISO Apple's Motion for Partial Summary Judgment [660-9] filed byApple Inc.(a California corporation). (Attachments: #1 Exhibit Mueller Decl Exhibit 43, #2 Exhibit Mueller Decl Exhibit 44, #3 Exhibit Mueller Decl Exhibit 45, #4 Exhibit Mueller Decl Exhibit 46, #5 Exhibit Mueller Decl Exhibit 47, #6 Exhibit Mueller Decl Exhibit 48, #7 Exhibit Mueller Decl Exhibit 49, #8 Exhibit Mueller Decl Exhibit 50, #9 Exhibit Mueller Decl Exhibit 51, #10 Exhibit Mueller Decl Exhibit 52, #11 Exhibit Mueller Decl Exhibit 53, #12 Exhibit Mueller Decl Exhibit 54, #13 Exhibit Mueller Decl Exhibit 55, #14 Exhibit Mueller Decl Exhibit 56, #15 Exhibit Mueller Decl Exhibit 57, #16 Exhibit Mueller Decl Exhibit 58, #17 Exhibit Mueller Decl Exhibit 59, #18 Exhibit Mueller Decl Exhibit 60, #19 Exhibit Mueller Decl Exhibit 61, #20 Exhibit Mueller Decl Exhibit 62, #21 Exhibit Mueller Decl Exhibit 63, #22 Exhibit Mueller Decl Exhibit 64, #23 Exhibit Mueller Decl Exhibit 65)(Related document(s) #660 ) (Selwyn, Mark) (Filed on 1/25/2012)

Mueller Exhibit 59

EXHIBIT E

SAMSUNG’S PATENT L.R. 3-1(A)-(D) DISCLOSURES FOR
U.S. PATENT NO. 7,200,792

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ASSERTED CLAIM
(PATENT L.R. 3-1(A))
11. An apparatus for receiving data in a
communication system, comprising:

ACCUSED INSTRUMENTALITY AND HOW EACH ELEMENT IS MET BY ACCUSED
INSTRUMENTALITY
(PATENT L.R. 3-1(B)-(D))
Apple’s 3G Products1 include an apparatus for receiving data in a communication system. See,
e.g.:
Apple iPhone user guide re iOS 3.1: (iPhone 3G or later, p. 21):

1

“Apple’s 3G Products” include iPhone 3G, iPhone 3GS, iPhone4, iPad 3G, iPad2 3G and any other products compliant with
3GPP UMTS standard.

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2

http://www.apple.com/iphone/specs.html (iPhone 4)

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3

iPad iOS 3.2 user guide: (iPad)

http://www.apple.com/ipad/specs/ (iPad 2)

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[a] a demodulator for demodulating a
received symbol into a plurality of
systematic bits and parity bits;

Apple’s 3G Products include a demodulator for demodulating a received symbol into a plurality of
systematic bits and parity bits. The 3GPP Technical Specification 25.212 v6.0.0 (“TS 25.212
v6.0.0”) describe a turbo encoder for coding data bits to generate systematic bits and parity bits.
The coded data bits are received by Apple’s 3G products and decoded. See, e.g.,
TS 25.212 v6.0.0 §4.5:

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5

TS 25.212 v6.0.0. § 4.5.3:

TS 25.212 v6.0.0 § 4.5.7 and Figure 17:

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TS 25.212 v6.0.0 § 4.2.3:

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TS 25.212 v6.0.0 § 4.2.3.2, Figure 4:

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[b] a first deinterleaver for writing the
Apple’s 3G Products include a first deinterleaver for writing the plurality of systematic bits on a
plurality of systematic bits on a column by column by column basis and performing inter-column permutation. See, e.g.,
column basis and performing inter-column
permutation;

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TS 25.212 v6.0.0 § 4.5.4.4:

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TS 25.212 v6.0.0 § 4.5.5:

TS 25.212 v6.0.0 § 4.5.6, Figure 18:

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TS 25.212 v6.0.0 §4.2.11:

…

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Apple’s 3G Products include a second deinterleaver for writing the plurality of parity bits on a
[c] a second deinterleaver for writing the
column-by-column basis, and performing inter-column permutation. See, e.g.,
plurality of parity bits on a column by
column basis and performing inter-column
TS 25.212 v6.0.0 § 4.5.4.4:
permutation;

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03498.51845/4323110.2

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TS 25.212 v6.0.0 § 4.5.5:

TS 25.212 v6.0.0 § 4.5.6, Figure 18:

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TS 25.212 v6.0.0 §4.2.11:

…

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17

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[d] a rate matcher for rate matching the
de-interleaved systematic bits and parity
bits; and

Apple’s 3G Products include a rate matcher for rate matching the de-interleaved systematic bits
and parity bits. See, e.g.,

TS 25.212 v6.0.0. § 4.5.4 and Figure 17:

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[e] a decoder for decoding the rate
matched systematic bits and parity bits,

Apple’s 3G Products include a decoder for decoding the rate matched systematic bits and parity
bits. TS 25.212 v6.0.0 discloses a turbo encoder for coding data bits to generate systematic bits
and parity bits. See, e.g.,
3GPP Technical Specification 25.212 v6.0.0 (“TS 25.212 v6.0.0”) §4.5:

03498.51845/4323110.2

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TS 25.212 v6.0.0. § 4.5.3:

TS 25.212 v6.0.0 § 4.5.7 and Figure 17:

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TS 25.212 v6.0.0 § 4.2.3:

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TS 25.212 v6.0.0 § 4.2.3.2, Figure 4:

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[f] wherein a size of the first deinterleaver
is equal to a size of the second
deinterleaver.

Apple’s 3G Products include a first deinterleaver equal in size to the second deinterleaver. See,
e.g.,

TS 25.212 v6.0.0 §4.5.6, Figure 18:

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12. The apparatus of claim 11,

See claim 11.

wherein if a number of the systematic bits
is less than a number of the parity bits,
part of the parity bits is written next to
systematic bits in the first deinterleaver.

Apple’s 3G Products include part of the parity bits written next to the systematic bits in the first
deinterleaver if a number of the systematic bits is less than a number of the parity bits. See, e.g.,

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TS 25.212 v6.0.0 § 4.5.4.4:

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TS 25.212 v6.0.0 § 4.5.5:

TS 25.212 v6.0.0 § 4.5.6, Figure 18:

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13. The apparatus of claim 11,

See claim 11.

wherein if a number of the systematic bits
is greater than a number of the parity bits,
part of the systematic bits is written prior
to the parity bits in the second
deinterleaver.

Apple’s 3G Products include part of the systematic bits written prior to the parity bits in the second
deinterleaver if a number of the systematic bits is greater than a number of the parity bits. See,
e.g.,

03498.51845/4323110.2

TS 25.212 v6.0.0 § 4.5.4.4:

29

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30

TS 25.212 v6.0.0 § 4.5.5:

TS 25.212 v6.0.0 § 4.5.6, Figure 18:

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14. A method for receiving data in a
communication system, comprising:

See claim 11. Apple infringes this claim because it has performed each and every step of this
claim, including but not limited to through testing and use by its employees. Apple also infringes
this claim by selling Apple's 3G Products to customers and encouraging those customers to use the
products in a manner that meets each and every step of this claim.

demodulating a received symbol into a
plurality of systematic bits and parity bits;

See claim 11[a].

writing the plurality of systematic bits on
See claim 11[b] and 11[c].
a column by column basis in a first
deinterleaver and performing inter-column
permutation, and writing the plurality of
parity bits on a column by column basis in
a second deinterleaver and performing

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inter-column permutation;

rate marching the de-interleaved
systematic bits and parity bits; and

See claim 11[d].

decoding the rate matched systematic bits
and parity bits,

See claim 11[e].

wherein a size of the first deinterleaver is
equal to a size of the second deinterleaver.

See claim 11[f].

15. The method of claim 14,

See claim 14.

wherein if a number of the systematic bits
is less than a number of the parity bits,
part of the parity bits is written next to the
systematic bits in the first deinterleaver.

See claim 12.

16. The method of claim 14,

See claim 14.

wherein if a number of the systematic bits
is greater than a number of the parity bits,
part of the systematic bits is written prior
to the parity bits in the second
deinterleaver.

See claim 13.

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