Netlist, Inc. v. Google Inc.

Filing 49

BRIEF: CLAIM CONSTRUCTION STATEMENT filed by Google Inc.. (Attachments: # 1 Affidavit, # 2 Exhibit A, # 3 Exhibit B, # 4 Exhibit C, # 5 Exhibit D)(Ezgar, Geoffrey) (Filed on 8/4/2010) Modified on 8/5/2010 (jlm, COURT STAFF).

Netlist, Inc. v. Google Inc.

Doc. 49 Att. 2

Dockets.Justia.com

CONFIDENTIAL ATTORNEYS' EYES ONLY
Page 1
IN THE UNITED STATES DISTRICT COURT NORTHERN DISTRICT OF CALIFORNIA OAKLAND DIVISION ----------------------------X GOOGLE, INC., Plaintiff, vs. NETLIST, INC., Defendant. * * * * * Case No. C-08-04144 SBA

----------------------------X

**CONFIDENTIAL - ATTORNEYS' EYES ONLY**

Videotaped Deposition of RICHARD TURLEY, Ph.D. Washington, DC Thursday, May 13, 2010 8:35 a.m.

Reported by: Dianna C. Kilgalen, RPR

VERITEXT REPORTING COMPANY [phone] www.veritext.com [phone]

1b98fc2e-292c-45cb-aacc-044588479083

CONFIDENTIAL ATTORNEYS' EYES ONLY
Page 2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

Videotaped deposition of RICHARD TURLEY, Ph.D., held at the offices of:

King & Spalding, LLP 1700 Pennsylvania Avenue, NW Suite 200 Washington, DC 20006 [phone]

Pursuant to notice, before Dianna C. Kilgalen, Registered Professional Reporter and Notary Public for the District of Columbia.

VERITEXT REPORTING COMPANY [phone] www.veritext.com [phone]

1b98fc2e-292c-45cb-aacc-044588479083

CONFIDENTIAL ATTORNEYS' EYES ONLY
Page 3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

APPEARANCES ON BEHALF OF THE PLAINTIFF: ROBERT F. PERRY, ESQUIRE SCOTT T. WEINGAERTNER, ESQUIRE King & Spalding, LLP 1185 Avenue of the Americas New York, New York 10036 [phone] ON BEHALF OF THE DEFENDANT: STEVEN R. HANSEN, ESQUIRE Lee Tran & Liang, APLC 601 S. Figueroa Street Suite 4025 Los Angeles, California 90017 [phone] ALSO PRESENT: DANA CAMPBELL, Videographer

VERITEXT REPORTING COMPANY [phone] www.veritext.com [phone]

1b98fc2e-292c-45cb-aacc-044588479083

CONFIDENTIAL ATTORNEYS' EYES ONLY
Page 311
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

Q.

What is your -- what are your issues with

Ludwig versus the 386 patent? A. The Ludwig patent doesn't talk about memory

modules in the way that they are defined in the 386 patent. The Ludwig patent talks about replacing So it

individual devices with a collection of devices.

would be akin to row placing an individual DRAM device within the memory module with a Ludwig-style device. So they are talking about two very, very different things, if you will. That is my first issue with it. So it,

Let's see what else I have. therefore, doesn't discuss ranks.

It's talking about

individual chips and replacing one chip with a stack of chips. Therefore, there can be no concept of a

collection of memory devices in the sense of a rank. MR. PERRY: Okay. Let's -- I don't want to

spend a lot of time on that one. THE WITNESS: Okay.

(Whereupon, Turley Deposition Exhibit 14 was marked for identification and attached to the transcript.) BY MR. PERRY:

VERITEXT REPORTING COMPANY [phone] www.veritext.com [phone]

1b98fc2e-292c-45cb-aacc-044588479083

CONFIDENTIAL ATTORNEYS' EYES ONLY
Page 312
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

Q.

Let me show you what I have just marked as

Exhibit 14, which is a copy of the United States patent 6,961,281 to Wong, et al, entitled Single Rank Memory Module for Use in a Two Rank Memory Module System, bearing production numbers GNET 001298 through -109. Have you seen a copy of this before? A. Q. Yes, I have. What are your issues with the Wong 281 patent

versus the 386 patent? A. Wong's disclosure -- this particular Wong

disclosure talks about using fewer ranks in place of a greater number of ranks. So it's essentially the

opposite situation from what we have been describing in the 386 patent. So it's going in the wrong direction,

if you will, or it's teaching away from the particular teachings of the 386 patent. Let's see what else I have here. I think Hold

like the Dell 74 patent, this is -- I'm sorry. on. I'm on the wrong section.

The logic element, to

the extent that there is a logic element in this, does not generate commands. Q. What are you referring to as the logic

VERITEXT REPORTING COMPANY [phone] www.veritext.com [phone]

1b98fc2e-292c-45cb-aacc-044588479083

CONFIDENTIAL ATTORNEYS' EYES ONLY
Page 313
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

element in the 281 patent, Exhibit 14? A. Let's see. So what I understand it to be is

the element labeled a control circuit, which in Figure 3 would be number 330. elsewhere. Let's see if it is

So it is generating chip select and Again, not

address 12 signals based upon its inputs. generating command signals. Q.

One of ordinary skill in the art seeing

Figure 3 and the accompanying disclosure going from two inputs to one output, doesn't that allow the person of ordinary skill to go from one to two fairly easily? A. Q. A. I don't think so. Why not? Providing fewer address signals is much

easier than providing additional address signals than would otherwise be required. Q. But you have command signals coming out of

the buffer 320 -A. Q. correct? A. Correct. Correct. -- going to each of the memory elements,

VERITEXT REPORTING COMPANY [phone] www.veritext.com [phone]

1b98fc2e-292c-45cb-aacc-044588479083

CONFIDENTIAL ATTORNEYS' EYES ONLY
Page 314
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

Q. signals? A.

Would you characterize those as command

Yes.

In particular, referring to the RAS and

the write enable signals and the CAS signal. Q. And out of the control circuit 330, you have

the chip select signal, correct? A. Q. Correct. And that goes to the entirety of the output

of devices -- of the memory devices, I should say? A. I need to look in detail and see exactly how

that's connected, if I may. MR. PERRY: A. Figure 3. Sure. It appears it is applied to all

the memory elements and banks, the element that is called -- labeled bank 0. Q. So you have command signals going to all of

them, and you have the chip selects going to all of them, correct? A. Q. A. Correct. What does AD12 refer to? I'm presuming it refers to an address bit,

bit number 12.

VERITEXT REPORTING COMPANY [phone] www.veritext.com [phone]

1b98fc2e-292c-45cb-aacc-044588479083

CONFIDENTIAL ATTORNEYS' EYES ONLY
Page 315
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

Q.

Do you know if that is the highest order

address bit? A. Q. A. No, it is not. Do you know how AD12 is being used? I need to check. So on the top of Column 7,

the patent states:

Further since address signals AD12

and AD13 are used as memory device internal bank select signals BS0 and BS1, an AD12 signal must be generated on memory module 100B. So that would imply to me that address signal AD12 is used as memory device signal BS0. Q. So out of the control circuit 330 in

Figure 3, you have got a chip select and effectively a bank select coming out as AD12, correct? A. Q. Correct, bank select 0. That allows you to, then, not only select

what specific memory device but also the bank within the memory device? A. Well, I believe, if I'm reading this diagram

correctly, their bank relates not to the internal bank definition that we have been using earlier of DRAM devices, but rather to a collection of DRAM devices.

VERITEXT REPORTING COMPANY [phone] www.veritext.com [phone]

1b98fc2e-292c-45cb-aacc-044588479083

CONFIDENTIAL ATTORNEYS' EYES ONLY
Page 316
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

Q.

So bank would more likely be associated with

our use of rank? A. Q. With our use of rank, correct. So you have got a chip select signal and rank

select signal coming out, effectively? MR. HANSEN: testimony. A. Well, the chip select signal is selecting The chip Objection. Mischaracterizes

bank 0, or as we are calling it rank 0.

select enables each of those memory devices 310. BY MR. PERRY: Q. A. And the AD12 signal is then doing what? That is a good question. I need to read Well, I think

further to find out how BS0 is used.

that AD12 would also be selecting or deselecting bank 0, based upon this definition, that AD12 is equated to the bank select 0 bit. BY MR. PERRY: Q. This patent also describes, and actually

illustrates, a serial presence device, correct? A. Q. Yes, it does. And that serial presence device is connected

VERITEXT REPORTING COMPANY [phone] www.veritext.com [phone]

1b98fc2e-292c-45cb-aacc-044588479083

CONFIDENTIAL ATTORNEYS' EYES ONLY
Page 332
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

then different kinds -- many different kinds of DRAM. Q. And so we know we are on the same page here,

what is your understanding of the definition of a bank as used in the context of memory in the 386 patent? MR. HANSEN: evidence. A. I don't think the 386 patent directly It addresses it Objection. Assumes facts not in

addresses ranks as a discussion topic.

from the perspective of providing bank address information. BY MR. PERRY: Q. When you say it doesn't address rank, you

meant bank? A. Did I say rank? MR. PERRY: A. Yes. I'm sorry. I don't think

Oh, my goodness.

it addresses -- discusses banks, per se, other than to the extent that it defines the number of bank address bits that are used to access a device -- a memory device. Q. Outside of the 386, what do you understand a

bank to be in memory?

VERITEXT REPORTING COMPANY [phone] www.veritext.com [phone]

1b98fc2e-292c-45cb-aacc-044588479083

CONFIDENTIAL ATTORNEYS' EYES ONLY
Page 333
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

A.

I understand a bank to be a subunit or a So a given

subaddressable unit of a memory device.

memory device is organized into a set of banks. Q. Could a bank actually consist of portions of

more than one memory device? A. Not that I'm aware of. MR. PERRY: A. Okay. That's based upon

Let me just qualify that.

my general knowledge and understanding of DRAM devices, not in the context of the 386 patent, because I don't think it mentions that at all. Q. And can the memory devices that are -- or -Your position is that you can't

well, strike that.

have a bank that consists of more than one memory device, correct? A. A bank is internal to a memory device. So,

therefore, a bank by definition, could not -- again, in the context of my general knowledge of DRAM devices. So a bank cannot span multiple memory devices. Q. When you say can't span multiple DRAM When you say it can't span

devices -- strike that.

multiple devices, are you talking about devices being

VERITEXT REPORTING COMPANY [phone] www.veritext.com [phone]

1b98fc2e-292c-45cb-aacc-044588479083

CONFIDENTIAL ATTORNEYS' EYES ONLY
Page 334
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

DRAMs or RAM? A. So I'm specifically talking about DRAM

devices, and just in general, DRAM devices in general, not in the context of any patent or technology that we've talked about. The definition, as I understand a

bank, is that it is a subelement of a memory device and, therefore, would be -- would not be capable of spanning multiple memory devices. Q. If I were to take off the limitation -- if

there was a limitation -- to DRAM devices, is there anything that you understand a bank to be within a normal memory device? A. Banks are, as a construct -- I'm only So

familiar with them in the context of a DRAM device. the RAM devices that I have looked at, for example, were not organized into banks. Q.

Now, we talked a little bit before about this

word generating -A. Q. Yes. -- in the claim. As soon as I find my Oh, boy. Here we

patent, I will get back to that. go.

Do you understand the word generating here to have

VERITEXT REPORTING COMPANY [phone] www.veritext.com [phone]

1b98fc2e-292c-45cb-aacc-044588479083