Goodard v. Google, Inc.
Filing
73
<![CDATA[
Goodard v. Google, Inc.
Doc. 73 Att. 6
EXHIBIT F
Dockets.Justia.com
Cheng Cheng
U.S. Patent No. U.S. 5,559,990 5,559,990
Statement of the Invention
The invention is a memory with dedicated circuitry for each of its subarrays that maximizes the performance of memory by providing for continuous burst mode reads and selective deactivation of sense amplifiers.
Cheng: '990 Patent
Prior Art: Shared Circuitry for Subarrays
SUBARRAY 314.L
Cheng: '990 Patent Cheng:
A4 CLK
SUBARRAY 314.R
GROUP Ø LOGICAL COLUMN NO:
GROUP 1
GROUP 2
GROUP 3
GROUP 4 X-REG
GROUP 5
GROUP 6
GROUP 7
Ø
M-Ø
8
M-8
1
M-1
9
M-9
2
M-2
10
M-1Ø
3
M-3
11
M-11
4
M-4 M-12
12
M-5
5
M-13
13
M-6
6
M-14
14
M-7
7
M-15
15
A3
CLK
Y-REG
M-16
M-24
M-17
M-25
M-18
M-26
M-19
M-27
X D E C
M-20
M-28
M-21
M-29
M-22
M-30
M-23
M-31
Y-DECODER
Y-SELECT
SA
REGISTER
Only one X-register, X- decoderr, Y-register, Y-decoder and Only one X-register, X- decode , Y-register, Y-decoder and sense amplifier for both subarrays. sense amplifier for both subarrays.
AØ-2 CLK CONTROL- MUX OUTPUT BUFFER DOUT
Dedicated Circuitry for Each Subarray
SUBARRAY 314.L
Cheng: '990 Patent Cheng:
A4 CLK A4 CLK
GROUP 4 X-REG
SUBARRAY 314.R
GROUP Ø LOGICAL COLUMN NO:
GROUP 1
GROUP 2
GROUP 3
GROUP 5
GROUP 6
GROUP 7
Ø
M-Ø
8
M-8
1
M-1
9
M-9
2
M-2
10
M-1Ø
3
M-3
11 X-REG
M-11
4
M-12
12
M-5
5
M-13
13
M-6
6
M-14
14
M-7
7
M-15
15
A3
A3
M-4
CLK
Y-REG
M-16
M-24
M-17
M-25
M-18
M-26
M-19
X D M-27 E C
X D E M-20 M-28 C
M-21
M-29
M-22
M-30
M-23
M-31
RIGHT Y-REG
CLK
Y-DECODER
LEFT Y-SELECT 320.L
RIGHT Y-SELECT 320.R
RIGHT Y-DECODER
SA
SA
SA
SA
SA
SA
SA
SA
AØ-2 CLK
CONTROL- MUX 334
OUTPUT BUFFER
Fig. 3A
DOUT
Fig. 3B
Fig. 3A
Fig. 3B
Memory Access: Burst Mode Access
DELAY
DMATyA em or
Requ r Processoest DAT A DAT A
Request DATA Request DATA DATA DATA DATA DATA DATA DATA
Continuous Burst Mode Continuous
DMATyA em or
Requ r Processoest DAT A DAT A
Request DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA DATA
Continuous Burst Mode
SUBARRAY 314.L
Cheng: '990 Patent Cheng:
A4 CLK A4 CLK
GROUP 4 X-REG
SUBARRAY 314.R
GROUP Ø LOGICAL COLUMN NO:
GROUP 1
GROUP 2
GROUP 3
GROUP 5
GROUP 6
GROUP 7
Ø
M-Ø
8
M-8
1
M-1
9
M-9
2
M-2
10
M-1Ø
3
M-3
11 X-REG
M-11
4
M-12
12
M-5
5
M-13
13
M-6
6
M-14
14
M-7
7
M-15
15
A3
A3
M-4
CLK
Y-REG
M-16
M-24
M-17
M-25
M-18
M-26
M-19
X D M-27 E C
X D E M-20 M-28 C
M-21
M-29
M-22
M-30
M-23
M-31
RIGHT Y-REG
CLK
Y-DECODER Y-DECODER
LEFT Y-SELECT 320.L
RIGHT Y-SELECT 320.R
RIGHT Y-DECODER
SA
SA
SA
SA
SA
SA
SA
SA
AØ-2 CLK
CONTROL- MUX 334
OUTPUT BUFFER
Stteadystream of data. ig. 3A Seady stream of data. F
DOUT
Fig. 3B
Fig. 3A
Fig. 3B
Sense Amplifier Deactivation
SUBARRAY 314.L
Cheng: '990 Patent Cheng:
A4 A4
SUBARRAY 314.R
Ø
A3 M-Ø
8
M-8
1
M-1
9
M-9
2
M-2
10
M-1Ø
3
M-3
11 X-REG
M-11
X-REG
4
M-12
12
M-5
5
M-13
13
M-6
6
M-14
14
M-7
7
M-15
15
A3
M-4
Y-REG
M-16
M-24
M-17
M-25
M-18
M-26
M-19
X D M-27 E C
X D E M-20 M-28 C
M-21
M-29
M-22
M-30
M-23
M-31
RIGHT Y-REG
Y-DECODER
LEFT Y-SELECT 320.L
RIGHT Y-SELECT 320.R
RIGHT Y-DECODER
SA
SA
SA
SA
SA
SA
SA
SA
AØ-2 CLK
CONTROL- MUX 334
OUTPUT BUFFER
Enabled Disabled
Fig. 3A
DOUT
Fig. 3B
Fig. 3A
Fig. 3B
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