Synopsys, Inc. v. Atoptech, Inc

Filing 929

PERMANENT INJUNCTION AND DISPOSITION ORDER. Signed by Judge Maxine M. Chesney on 12/19/16. (Attachments: # 1 Appendix Part One, # 2 Appendix Part Two, # 3 Appendix Part Three, # 4 Appendix Part Four, # 5 Appendix Part Five) (mmclc2, COURT STAFF) (Filed on 12/19/2016)

APPENDIX

Part Two
Trial Exhibit 1440, pages 1-115

add_to_ collection

add_to_collection

Adds objects to a collection, resulting in a new collection . The base collection
remains unchanged.

Given a collection base_collection and one or more objects , returns a new
collection with all objects of the base collection and all the listed objects . In addition,
you can choose to filter out all duplicate objects from the new collection . The base
collection is not modified.

SYNTAX

Syntax

collection add_ to_ collection
base_collection
object_ spec
(- un ique]
collection b a se_ collection
list
object_spec

a dd_t o_collection base_ c o ll e ction objects
[ - un i qu e ]

ARGUMENTS
base_collection
Specifies the base collection to which objects are to be added. This
collection is copied to the result collection, and objects matching
object_spec are added to the result collection. base_collection can be the
empty collection (empty string), subject to some constraints, explained in
the DESCRIPTION.
object_spec
Specifies a list of named objects or collections to add.
If the base collection is heterogeneous, only collections can be added to it.
If the base collection is homogeneous, the object class of each element in
this list must be the same as in the base colleccion. If it is not the same
class, it is ignored. From heterogeneous collections in the object_spec, only
objects of the same class of the base collection are added. If the name
matches an existing collection, the collection is used. Otherwise, the
objects are searched for in the database using the object class of the base
collection.
The object_spec has some special rules when the base collection is empty, as
explained in the DESCRIPTION.

where the arguments have the following meaning :

base_collection

The collection to which you want to add an object.

objec t s

The list of objects you want to add

unique

Removes duplicate objects from the resulting
collection .

-unique
Indicates that duplicate objects are to be removed from the resulting
collection. By default, duplicate objects are not removed.

Case No. 3: 13-cv-02965-MMC
PLNTF Exhibit No.
1440
Date Entered
FEB 2 9 2016
Signature
1

all_fanin

all_fanins

Creates a co l l ection of pins / ports or cel l s i n the fa n i n of spec if i ed sinks .

SYNTAX
co l l ection all_ fanin - to sink_ li s t
[ - fl at ] [ - on l y_cells]
[ - s tartpoints_only ]
[ - l e v e l s lev e l _ c ount]
[ -pin_ l e v els pin_ count]
( - step_into_ h i e r a r chy ]
list
i nt

Retrieves either all pins and ports or cells that belong to the fan-in cone of one or more
specified pins. Pins that are referenced in timing constraints , for example , in
case-analysis, are also considered part of the fan-in cone.

Syntax
all fanins -to c o llection \
[-on ly_cel l s] \
[-flat] \
[-startpoints_ only]

s ink_ lis t
lev el_ count

ARGUMENTS
- to sink_ list
Specifies a list of sink pin s, ports, or n ets i n the design . Each object is
a named pin, port, or net, or a collection of pin s, por t s, o r n e ts . The t i ming
f ani n of each sin k i n sink_ list becomes part of the res u lting col l ection . If

a net is specified, t h e effect is the same a s l ist i ng all driver pin s on t h e
net. Thi s argument i s required .
-startpoi n ts_ only
When t h is option is specified, only the timing startpoin ts will be i ncluded
in t h e resul t .
- only_ cells
The res u lt will i ncl ude on ly cells i n the timi ng fan i n of the sink_ list a nd
not pin s or ports .
- flat

where the arguments have the following meaning :
-t o collection

Set of pins and ports whose fan-in cone is retrieved.

[- o n l y _ cell s]

Return the cells of the fanin cone instead of the pins
and ports.

[ -fl a t ]

Hierarchical pins, that is, pins that do not exist in a
flattened netlist must not be returned .

[ - star t poin t s _ onl y ]

Only return pins and ports at the start of the fan-in
cones.

Ther e are two major modes i n wh ich all_ fani n functio n s : h ierarchical {the
default) a n d flat . When in hierarchical mode, on ly objects wi t hi n t he same
hier archica l level as the c urren t s ink are i n clu ded i n the res u lt . I n f l at
mode, t he only non-lea f objects in the resul t will be h ierarchical sink pin s .
-level s cell_ count
The trave r sal will s t op when reachin g a depth of sear ch of cell _ count hops,
where the counting is performed over the l ayers of cells o f same distan ce
f rom the sink .
-pin_ l e vels pin_ coun t
The traversal wi l l stop when reaching a d epth of search of pin_ co unt hops,
where the counting is per formed over the layers o f pins of same distance fr om
the sin k .
-step_ i nto_ hierarchy
Th is option may only b e used i n hier a rc hical mode a n d on l y h a s effect wi t h
eith er -levels or -pin_ levels. Wi t hou t t h e swi t ch, a hierarc h ical b l ock at
t h e s a me l ev e l o f hiera rch y a s the c ur r ent sin k i s c onside r ed to be a cel l;

2

2

all_fanout

all_fanouts

Creates a collection of pins / ports or cells in the fanout of the specified sources.

Syntax

SYNTAX
collection all_ fanout - from source_ list
-clock_ tree [- flat]
( -only_ cells] (- endpoints_ only]
( -leve l s level_ count ]
( -pin_ l evels pin_ count]
( -step_into_hierarchy]
list
int

Retrieves either all pins and ports or cells that belong to the fan-out cone of one or
more specified pins. Pins that are referenced in timing constraints, such as the effect
of disable timing or case-ana lysis , are also considered part of the fan-out cone .

all fa n out s -from c o ll e c t ion \
-only_c ells \
- f lat \
-endpoints_only

source_ list

level_ count

ARGUMENTS

where the arguments have the following meaning:

-from source_ list
Specifies a list of source pins, ports, or ne ts in the design. Each object
is a named pin, port, or net, or a collection of pins, ports, or nets. The
timing fanout of each source in source_ list becomes part of the resu lti ng
collection . If a net is specified , the effect is the same as listi n g all load
pins on the net. This option is exclusive with t he -clock_ tree option.

-from c o lle c ti on

Set of pins and ports whose fan-out cone is retrieved.

-only_cell s

Return the cells instead of the pins and ports in the
fan-out cone.

- clock_ tree
Indicates t h at all clock source pins and / or ports in the design are to be
used as the l i st of sources . Clock sources are specified using create_ clock .
If there are no clocks, or if the clocks have no sources, the result is the
empty collection. This option is exclusive with the -from option .

-flat

Hierarchical pins, that is, pins that do not exist in a
flattened netlist, must not be returned.

-endpoints_ only

Only return pins and ports, or cells, at the end of the
fan-out cones.

-endpoints_ only
When this option is specified, on l y the timing endpoints will be inc l uded in
the result .
-only_ cells
The result will include only cells in t he timing fanout of the source_list
and not pins or ports .
- flat
There are two major modes in which all_ fanout functions : h ierarchical (the
default) and f l at. When in hi erarchica l mode , only objects within the same
hierarchical level as the current source are included in the result. In flat
mode, the only non - leaf objects in the result will be hierarchical source
pins.
-levels cell_ count
The traversal will stop when reaching a depth of search of cell_ count hops,
where the counting is performed over the layers of cells of same distance
from t he source.

3

3

-pin_ levels pi n_ count
The traversal will stop when reaching a depth of search of pin_ count hops,
whe re the counting is performed over the layers of pins of same distance from
the source.
-step_ into_hierarchy
This option may only be used in hierarchical mode and only has effect with
e ither -levels or -pin_ levels . Without the switch, a hierarchical block at
the same level of hierarchy as the cu rrent sink is consider ed to be a cell;
the o utput pin s are considered a single level away from the related input
p i ns, regardless of what is inside the block. With the swi t ch enabled, t h e
counting is performed as though the design were flat, and although pins inside
the hierarchy are not returned, they determine the depth of the related inpu t
p in s .

4

4

append_to_collection

append_to_collection
Appends the specified collection obj e c t _c oll e ct ion to the collection held by the
collection variable base_ collection . If this variable does not exist, this command
creates it. You can choose to remove the duplicate objects from the resulting
collection .

Add ob j ect(s ) t o a col lection . Modifies v ar i abl e .

SYNTAX
co l lec tion add_ to_ collection
v a r _ name
obje c t _ spe c
[-unique]
co l lec tion var_ n ame
l is t
obj e ct_ spe c

Syntax
append _to_collection base_collection object_ collection \
[-un i q ue]

ARGUMENTS

where the arguments have the following meaning :

var_ n ame

b a se_ coll ecti on

The variable that holds the original collection. Is
created if needed.

object_coll ec t ion

A collection of objects to add to the original
collection.

uni que

Removes duplicate objects from the resulting
collection stored in the variable base_collection.

Specifies a v a r i able n a me . The objects match ing object_spec are added into
the c ol lect i on re f e r enc e d by t hi s variabl e .
obj e ct_ spe c
Specifi e s a l i st of n a med objects o r collection s to add .
- unique
Indi cates that dupl i cate obj e cts are to be r emoved from the res u lti n g
collect i on . By defa u lt , d up l icate ob j ects a r e n ot removed .

5

5

characterize_co ntext

characterize_ context
Captures the timing contex t of a list of i nstances .

SYNTAX
string characterize_ context [ -timing ]
[ -desi gn_ r u les]
[ - constan t _i npu ts ]
[-no_ boundary_ annotation s ]

Generates timing constraints for a set of cell instances. Typically, this command is
used in a top-down hierarchical design flow to derive submodule timing constraints
from the top-level constraints . These timing constraints include operating conditions ,
clock port delays, input port arrival times , output delay constraints, path exceptions,
design rule constraints, and case analysis settings. The constraints are written in SOC
format to a file named module_name. derive_sdc in the work directory orin a specified
directory. Th ese timing constrai nts can then be used to design the submodule in a
separate project.

Syntax
[ - environmen t ]

characterize_ c ontext mod ule_ inst_ list
[- output_ dir path_ and_ file_ name]

c e ll_ li st
l is t

c e ll _ list

ARGUMENTS
- tim i ng
Characterizes timing i n formation; for example, clocks, input and output
delays, and timing exceptions .
-environment
Characterizes environment-related information; for example, operating
conditions (process, temperature, and voltage), wire load model, capacitive
loads on input and output pins, and driving cell information o n input pins .
- design_ rules
Characterizes design rules; for example, rnax_ capacitance , max_ transition,

and max_Eanout .

where the arguments have the following meaning :

module_ inst_list

List of module instances for which to generate timing
constraints.

[- ou t pu t _di r path_ and_ f i le_ n ame ]
Path name to the output file. If this value is a file
name or a relative path, then the location is relative
to the work directory. By default, a file named
module_name. derive_sdc is generated in the
current work directory.

-con stant_ inputs

Character izes logic constants propagated to input pins of t he instance being
characteri zed by the case analysis capability of PrimeTime .
-no_ boundary_ annotation s
Disables c ha racter ization of annotated capacitance on boundary nets as
annotated capacitance in the c h aracte r ized instance. Instead, the port wi re

capacitance is adjusted to accoun t for any difference between the es t ima t ed
and annotated values . By default , PrimeTime characterizes annotated
c a pacitan ce on boundary net s as annotated capacitan ce in t h e cha racterized
instance .

cell_ list
Specifies a list of instances to characterize .

6

check_timing

check_timing
Reports timing problems in the design. The following timing violations are reported :

Shows possible timing p r oblems f o r design.

no_clock-No clock reaches a sequential cell 's clock pin.

•

no_driving_ceii-A port does not have a driving cell constraint.

•

no_input_delay-An input port does not have an input delay constraint.

•

string check_ timing [ - v erbose )
[ - sign i fica n t _ digi t s di g i ts]
[ - rns _rnin_ sep arati on delta )
[ - override_ defaults check_li s t )
[- i nclude check_ l i st)
[- exclude check_ li s t]

latch_fanout-A latch fans out to itself or to another latch connected to the same
clock.

•

SYNTAX

•

unconstrained_endpoints- An endpoint of a timing path, such as an output port or
data pin of a sequential cell , does not have a timing constraint set.

Syntax
check_timing [-verbose] \
[-extra] \
[-scenar io name]

f l oa t delta
int
digits
li s t
check_ li s t
ARGUMENTS

where the arguments have the following meaning:

-verbose
Shows detail e d information about pot e ntial probl e ms .
-significant_ digits digits
Specifies the n umber of digits of precision to be displayed by warn i ngs that
show floating point n umbe r s . Al l owed values are 0-13; the defau l t is
determined by the report_ default_ significant_ digits variable, whose defa u lt
val u e is 2 . Use t his option if you want to override t he default .

[-v e r bose ]

In the report , include the names of the pins and ports
with timing constraint problems.

[- extra )

In addition to the regular timing checks, also check
the completeness of the timing arcs in the Liberty
files.

[- scenar i o name ]

Specifies the scenario file to use. The scenario file
contains the conditions under which to analyze the
design such as Process-Voltage-Temperature
corners . If you do not provide a scenario name , the
timing checks are based on the SOC and Liberty file
set for the current design.

-ms _min_ separation delta
Minimwn separation value between maste r and slave clocks . The default minimum

separation i s 0.0 .
- override_ defaults check_list

Overrides the ch ecks in timing_ check_ defaults u sin g check_ list. See the ma n
page of timdng_ check_ defaults for its default value .
- inc l ude check_ list
Adds the checks l isted in check_ list to the checks i n t±ming_ check_ defaults .
-ex clude check_ list
Subtracts the checks listed in check_ list from the c h ecks in
timing_ check_ de faults .
check_ list
Gives the l i st of checks to be performed . Each elemen t i n this list is one
of th e following strings : clock_ cross ing, data_ check_multiple_ clock,
data_check_ no_ clock, generated_clocks, gen eric, latch_ fanout,
la t e ncy_ override , loops, ms_ separation , rnu ltiple_clock, no_clock,
no_ input_de l ay, retain, signal_ l evel, uncon strained_ endpoints .

7

compare_collections

compare_collections

Compares the contents of two collections . If the same objects are in both
collections, the resu lt is "0 " (like st r ing compare) . If they are different , the
result is nonzero. The order of the objects can optionally be considered .

SYNTAX

Compares collections. If both collections contain the same objects, the command
returns 0; otherwise, it returns -1. You can control whether the order of objects should
be taken into account.

Syntax

int compare_ collections [ - orde r _ dependent ] collectionl col l ect ion2
c o l l ec tion collectionl
collection collection2

compare_collections collectionl collection2 \
[-order_dependent]

ARGUMENTS

where the arguments have the following meaning:

-order_dependent
Ind icates that the order of the objects is to be considered ; that is, the
col l ections are considered to be differen t if t he objects are ordered
differ ently .

coll ectionl and colle ct i on2
Collections to compare.

collectionl
Specifies the base collection for the comparison . The empty string (the empty
col l ection) is a legal val ue for the collection] argument .

[ - order_ dependen t]

Indicates that collections are only considered
identical if the order of the objects in the collections is
the same.

collection2
Specifies the collection with which to compare to collectionl . The empty
string (the empty collection ) is a legal value for the collection2 argument.

8

8

connect net

connect
Connects port and pins to a net. If the port and pins are already connected to other
nets, you must explicitly specify that you want to reconnect them; otherwise , you get
an error. If you want to connect a port to a net that is already connected a port, you
must have marked these ports and the net as a feedthrough upon creation, and you
must mark this connection as a feedthrough as well.

Conne c t s a net t o s pe c ifi ed p ins or ports .

By default, the connect Tel command honors the dont_touch attribute set on a net and
issues the ChgDontTouch error when you try to connect to such a net. You can
however force a connection .

SYNTAX

Syntax

int connect_ net net object_ spec
str ingnet
l is t
object_ spec

connect -net net_name \
pins_and_ports \
[-reconnect]\
[-feedthru] \
[-force]

ARGUMENTS

where the arguments have the following meaning :

ne t
Specifies t h e n ame of the net to which the p i ns a n d por t s a r e to be conn ected .
object_ spec
Specifies a l i st of p in s or ports to conn ect to net.

- net net_ name

Name of the net to which you want to connect the
pins and ports.

p in s_and_port s

Names of the pins and ports to connect to the net. By
default, only pins and ports that are not yet
connected to a net are allowed to be connected . Use
the -reconnect argument to allow all pins and ports to
be connected to this net.

[-reconnect]

Allows you to specify pins and ports that are already
connected to nets. Those pins and ports are
disconnected from their original net and reconnected
to the specified net.

[ -f eedthru ]

Connection is part of a feedthrough.

[ - force ]

Ignore the dont_touch attribute of a net, and ,
therefore, do not report the ChgDontTouch error
when a net changes.

9

9

copy_collection
Duplicates the conten t s of a collec ti on , res u lt i ng in a new collec t ion . The base
collection remains unchanged .

copy_collection
Returns a new collection that contains the same objects as a specified collection. Note
that the objects are not copied , only the collection of those objects.

SYNTAX

Syntax

col le c tion copy_collection collectionl
collection collectionl

copy_collection collection

ARGUMENTS

where collection are the objects you want to copy.

collectionl
Specifies the col lect i on to be copied. If t he empty st r ing is used f or t he
collection] argument , the command returns t he empty string (a copy of the
empty col lec ti on i s the empty collection) .

10

10

create_operating_conditions

Command: create_operating_conditions
standard SDC command

Creates a new se t of ope r ating con di ti ons i n a l i b rary.

SYNTAX
i n t create_ operating_ conditions
-na me name - librar y library_ name
-process process_value -temperature temper ature_value
-vo ltage voltage_ v a lue [ - tre e_type t r ee_ type]
[ - calc_mode calc_mode ]
[ - r a i l_vo l tages rail_ val ue_pairs ]
st ring name
s t ri ng library_ name
float pro cess_value
floa t t empera t ur e_ va lu e
float voltage_value
s t ri ng tree_type
str i n g c a lc_ mode
Tel lis t rail_value_pairs

option:
-name string
-library string
-process do uble(O.OOO)
-temperature double(O.OOO)
-voltage double(O.OOO)
-tree_type tree_type(balanced_tree)

-calc_mode *
-rai l_voltage *
--get_option arg <l >
--set_option ...
--get_default arg <l >
--set default ...
--l i st_opt i ons
--load_options
--l i cense
--help

name of operating condition (require)
name of library (require)
process scaling factor (require)
temperature value (require)
voltage value (require)
tree type
tree_type = balanced_tree
best_case_tree I worst_case_tree
not supported yet
not supported yet
get option value
set option value
get default value
set default value
list current option values
load current option values
list required licenses
display command help

11

11

ARGUMENTS
-name name

Speci fi es the name of the new set of operating conditions.

description:
This command is the same as standard SOC command.

-library library_name
Specifies the name of the library for the new operating conditions.
-process process_ value
Specif i es the process scaling factor for the operating conditions. Allowed
va l ues are 0.0 t h r ough 10 0.0.
- temperature temperature_value
Specifies the tempera ture value,

in degrees Celsius , fo r the operating

conditions. Allowed values are - 300.0 through +500.0 .
-vo ltage voltage_value

Spec i f ies the voltage value, i n volts, f or the operating condi t ions. Al lowed
values are 0 . 0 through 1000 . 0 .
-tree_ type tree_ type
Specifies the tree type for the operating conditions. Allowed values are
best_case_tree, balanced_ tree (the default), or worst_ case tree. The tree
type is used to estimate interconnect delays by providing a model o f the RC
tree .
-calc_mode calc_mode

For use only with DPCM l i braries. Specifies the DPCM delay calculator mode
for the operating conditions; analogous to t he process used in Synopsys
l ibraries. Allowed values are unknown (the defau lt ), bes t_case, nominal, or
worst_case . The default behavior (unknown) is to use worst case values during

analysis simi l arly to worst_case. If -rail_voltages are specified, the
command sets all (worst_case, nominal , and best_case) vol t age values .
- rail_voltages rail_value_pairs
Specifies a lis t of name-va l ue pairs that defines the voltage for each
specified rail. The name is one of the rail names defined in the library; the
val ue is the voltage t o be a ssigned t o that rail . By de f aul t, rai l vo ltages
are as defined in t he library; use this option to override the default
voltages for specified rails .

12

12

define_proc_attributes #Add extensions to a procedure

define_proc_attributes
Describes the help text of a specified Tel procedure and describes the attributes of its
arguments. This Tel command allows you to use Aprisa 's parse_proc_arguments Tel
procedure in your procedure to parse its arguments. By using both the
define_proc_attributes and parse_proc_arguments Tel commands, you integrate your
procedure in the Aprisa environment. The meta arguments, such as --h, are enabled
and the info and help commands also work for your procedure.

[-info info_text]
[-define_args arg_defs]
[-command_group group_name]
[-permanent]
[-hide_body]
[-hidden]
[-dont_abbrev]
name

(Help string for the procedure)
(Procedure argument definitions for verbose help)
(Command group for procedure. Default: Procedures)
(Procedure cannot be overwritten)
(Body cannot be viewed with 'info body')
(Procedure does not show up in help or info)
(Procedure can never be abbreviated)
(Procedure name)

Syntax
define_pr o c_attributes p roc edureName \
-inf o string \
-define_args * \

where the arguments have the following meaning :

procedureName

Name of the procedure.

- i n fo s tri n g

One-line help string for the procedure .

- define_ args *

Arguments and options of the procedure. This is a
collection of argument definitions. Each argument
definition has the following format:

{arg_name option_help value_help data_type attributes)
where :
arg_name

Nam e of the argument. If the name starts with a '-', it indicates
a named argument. Otherwise , it is a positional argument.

option_help

Help string describing the argument

value_help

Help string describing the acceptable values for the argument

data_type

Type of value expected for this argument, such as float, string,
boolean, one_of_string

attributes

Additional attributes, such as required, optional, and for types
one_of_string, th e list of values .

13

13

define user_attribute

define_user attribute

Defines a user attribute. You must define an attribute before using it. User attributes ,
similar to Aprisa attributes, have a name, a type , and can only be attached to objects
of the specified type . You can create, modify, and delete user attributes. Attribute
names must be unique within the class for which the attribute is defined , and the value
of the attribute can only be of one data type .

Define s a new user -de fi ned attribute.

Syntax

SYNTAX
string define_ user_ attribute -type data_ type - c lasses class_ list
[ -range_min min] [ -rang e_max max]
[ -on e_of values] [ -import]
[ -quiet ] attr_name
stri ng data_ type
li st
class_ list
d o ub le min
d o ub le max
list
values
string attr_ name

define_us e r attribute a tt r _name \
-type int I float
-class class

string

ARGUMENTS

attr_name

-classes class_ list

-type int

point \

where the arguments have the following meaning :

- type data_type
Specifies the data type of the attribute. The s upported data types are string,
int, float, double, and boolean.

I

Defines the attribute for one or more of the classes . The valid object classes
are design , port, cel l , pin, net,

li b,

l ib_ cell or l i b_pin .

-range_min min
Specifies min value f or numeric ra nges. This is only val id when the data_ type
is i nt or double . Specifying a mi n imum constraint without a max i mum

-class class

Attribute name.
floa t

s t ring I poin t
Data type of its value .

Class name of object for which it is defined .

constraint creates an attribute which accepts a value = min.
-range_max max
Specifies max value f or numeric ranges. This is only valid when the data_ type
is int or double . Specifying a ma x imum constraint without a mi n imum

constraint creates an attribute which accepts a va lue

= max .

-one_o:E values
Provi des a list of allowable strings . This is only valid when the data type
is s t ring .
-import
Import this attribute :Erom a design o r library database .
- quie t

Does no t report any messages.
attr_name
Spec i fies the name of the attribute.

14

14

derive_clocks
Create s clocks on source pins i n design.

SYNTAX
stri ng derive_ clocks -pe riod period_ val ue [-waveform edge_ list]
f lo at period_value
l i st edge_list

derive_clocks
Creates clock definitions for all missing clocks so that design registers are
constrained . These generated clocks are specified by a clock period and a set of
ti mes when clock edges occur, similar to regular clocks . The main difference is that
the missing clocks are generated by Aprisa as opposed to being defined as part of the
SOC constraints.

Syntax
derive_clocks -period period \
-wavefo rm times

ARGUMENTS

where the arguments have the following meaning:

- period period_value
Specifies the c loc k per iod of the automatically derived c locks. The clock
period has a value g reater than or equal to zero (valu e = 0).

- period period

Clock period for all missing clocks.

- wave f orm times

Clock waveform, specified as a collection of times at
which clock edges occur, starting with a rising edge.

- waveform edge_list
Speci f ies the rise and fall edge times of the clock, in libra ry time units,
over an e n tire clock period. It de fi nes the c lock edge spec ifi cation. The
first time that is listed is a rising transition; typically the fi rst rising
t ransi tion after time zero. There must be an even number of increasing times
and alternating rise and fal l t imes. I f you do not specify an edge_ list value,
the command assumes a default waveform that has a r i se edge of 0.0 a nd a fall
edge of period_value/ 2 .

15

15

filter
The filter command, a synonym f or the filter_ collec tion command, is a DC Emu l ation
command prov i ded for compatibi l ity with Design Comp i l er .

filter
This command is aliased to frlter_col lection .

16

16

fi Iter_collection

filter_collection

Filters a n existing co l l ec ti o n , resulting in a new collection . The bas e collection
remains unchanged .

Retains from a given collection of objects only those objects that meet the specified
criteria . Criteria are formulated as logic and pattern-matching expressions of attributes
and values.
The following operators are supported :
!=

!<
<=
>
>=

&&

II

equal
not equal
match pa tt ern
not match pa t tern
less than
l ess o r equa l
greater than
greater or equal
Logic AND
Log ic OR

The pattern matching syntax can be the Tel regular expression or the Tel globbing
(also known as wildcha r) syntax .

SYNTAX

Syntax

co lle c t ion filter_collection
base_collection expression
[ -regexp ]
[ - nocase ]

filter collection collection expression \
[ -regexp] \
[ -nocase]

collectionbase_collection
express~ on
string

17

17

ARGUMENTS
base_collection
Speci f ies t he base co l lec t ion to be fi l tered. Thi s col l ec t ion is copied to
the result collection. Objects are removed from the result collection if they
are eval uated as false by the condi t ional expression value. Substitut e the
co l lection you want for base_ collection .

where the arguments have the following meaning:
Collection on which the filter criteria is applied. Only
objects that meet these criteria are returned by the
filter.

expression

Expression using constants , object attributes , and
the operators listed above .

[ - regexp ]

expression

collection

Use Tel regular expression syntax for the pattern .
The default is Tel globbing syntax .

[ -nocase]

Expression is case insensitive.

Spec ifies an expression with which to filter base_collection . Subs ti tute the
str i ng you wan t f or expression .

-regexp
Spec ifi es that the=- and ! - fil ter operators wil l use rea l regu l ar
expressions . By default, the=- and !-fil t er operators use simple wildcard
pa t tern matching with the * and ? wildcards .
-nocase
Makes the pattern match case - insensitive. When you specify this option, you
must also specify the -regexp op t ion.

18

18

foreach- in- collection

foreach_in_collection
Executes a set of Tel commands on each object from a given Aprisa collection . This
command is equivalent to the fore ach Tel command but has the advantage that it
operates directly on an Aprisa coll ection, which is much more efficient than a Tel list.

Iterates over the e l emen ts o f a c ol l ect i on.

SYNTAX

Syntax

s tr ing foreach_ in_ collection itr_var collections body
string i tr_ v a r
list coll ec t ions
string body

fo r each_i n_co ll ec ti on objec t collection { body }

ARGUMENTS

where the arguments have the followi ng meaning :

object

itr_ var

Tel variable containing the object on which the body
of Tel commands is operated .

collection

Collection of objects on which the body of Tel
commands is operated. This can also be a Tel
expression ret urning a collection.

{ body }

Set of Tel commands that is executed on each object
in collection , one at a time.

Speci f ies t he name of t he i te r a t o r va r i abl e.
c o llection s
Spec ifi es a l i st of col l ections over which to iterate.
body
Specifies a scr i pt to execu te per iter ation .

19

19

get_ attribute

get_attri bute
Returns the value of the specified attribute of an object.

Retr i eves the value of a n a ttri b u te on a n obj ec t.

SYNTAX

Syntax

string get_ attribute [-class class_ name]
stri ngclass_name
stringobject_ spec or
collection object_spec
stringa t tr_ name

[-quiet ] object_ spec attr_ name

ARGUMENTS
- class class_ name
Specifies the class name of object_spec, if object_spec is a name. Valid
values for object_spec are design, port, cell, pin, net, lib, lib_cell,
lib_pin, clock, timing_path, and timing_point. You must use this option if
object_spec is a n ame .

get_ attribu te object_ or_ collection attr_ name \
[-c l ass cel l I n e t I p ort I p i n
l i b_c e l l I l i b_p i n ]

\

where the arguments have the following meaning :

object_ or_ collection

Object or collection of objects whose attribute value you
want to retrieve.

attr_ name

Name of the attribute to retrieve .

-quie t
Indica t es that any error and warning messages are not to be reported.
object_spec
Specifies a single object fro m which to get the attribute value. object_ spec
must be is either a collec ti on of exa c tly one object, or a name whi ch is
combined with the class_name to find the object. I f object_spec i s a n ame ,
you must also u se t he - class option.

[- class cell

I net

port I pin I lib_cell I lib__pin ]]
Only examine objects of the specified type .

attr name
Specifies the name of the attribute whose value is to be retrieved .

20

20

get_generated_clocks

get_generated_clocks
Returns a collection of generated clock objects. The returned set of generated clocks
may be selected by name , by the Aprisa attribute-based object filter, or by a
combination of these.

Creates a collec t ion o f gener ated clocks.

Syntax

SYNTAX
col l ection get_ generated_ clocks [ - quiet]
pa tt e r ns
st ringexpression
list patterns

[ - regexp]

[- nocase]

( - fi l ter expression ]

ARGUMENTS
-quiet
Suppresses warning and error messages if no objects match . Syntax error
messages are not suppressed .
-regexp
Views the patterns argument as real regular expressions rather than simple
wildcard patterns. Also, modifies the behavior of the =- and !- filter
operators to compare with real regular expressions rather t han simple
wildcard patterns.
-noca se
When combined with -regexp , makes matches case- insensitive. You can use nocase onl y when you also use -regexp.

- f ilter expression
Filters the collection wi t h expression. For any generated clocks that match
patterns, the expression is evaluated based on the generated cloc k 's
attributes. If the expression evalua t es to tru e , the g enerated clock i s
included in the result.
patterns

get_ generated_ clocks clockpattern\
[-fi l t er attribute_ constraint ] \
[ -r egexp ] \
[-nocase ]

where the arguments have the following meaning :
clockpattern

Only return clocks whose names match the pattern.
By default, Tel globbing syntax is assumed.

[-fi l t er attribut e_cons traint]
Only return generated clocks whose attributes meet
the constraints defined in
attri bu te_constraint. For more information on
the syntax of the attribute constraints, see the
filter_collection Tel command .
[ - regexp]

Treat the name patterns in
attribute_constraint as a regular expression.
By default, Tel globbing syntax is assumed.

[ - nocase ]

Ignore case when performing name matches in
at tri bu te_cons traint.

Matches generated c l ock names agains t patte rns. Patterns can include t he
wildcard characters • *" and M? ...
•

21

21

get_object_name

get_object_name
Returns the name of the specified object, or returns a collection of names of a
specified collection of objects .

Gets the n a me of the object in a col l ection of exact l y on e object .

SYNTAX

Syntax

s tring get_ object_ name collection
stringcollection

get_object_name object

ARGUMENTS

where the arguments have the following meaning:

co l lection
Specifies the collection. This must be a co l lection of exact l y one object.

I

-multiple objects

object

Object whose name you want to retrieve.

- multiple

Controls whether the command expects a single
object or a collection of objects .

objects

Collection of objects whose name you want to
retrieve.

22

22

get_path_groups

get_path_groups
Creates a collec tion of path groups fr om the current design . You can assign t he se
path groups to a variable or pass them into another command .

SYNTAX

Returns the list of names of all path groups given a glob-style pattern or a regular
expression .

Syntax

collection qet_path_qroups [-quiet]

[ - regexp ]

[ -nocas e ]

[-fi lter expressi on]

patterns

get_pa t h_groups cl ock_names \
[- q uiet] \
[-r egexp ] \
[-noc ase]

stringexpression
l ist patterns

ARGUMENTS

where the values have the following meaning :

-quiet

clock_names

Name or regular expression . All path groups with a
launching clock or a capturing clock that have a
name matching the regular expression are returned.

[- quiet ]

Do not report errors or warnings.

[- regexp ]

Suppresses warning a nd e r ror messages i f no objec t s match. Syntax error
messages are not suppressed.

Treat clock_ names as a regular expression .

[ -nocase ]

Do not consider case when matching clock names to
the regular expression clock_names.

- regexp
Views the patterns argument as real regular expressions rather than simple
wildcard patterns . Also, modifies the behavior of the =-and !- fi lter
operators to compare with real regular expressions rather than simple
wildcard patterns .
- n ocase

When combined with -regexp , makes matches case-insensitive . You can use nocase on l y when you also use -regexp .

- filter expression
Fil t ers the collection with expression. For any path groups that match
patterns, the expression is evaluated based on the path group's attributes.
If the expression evaluates to true, the path group is included in the result .

NOTE : This command returns a list of strings and not a collection of objects as most
other get* Tel commands do. For this reason , no -filter argument is supported .

patterns
Matches path group name s against patterns. Pattern s can i nclude the wildcard
characters

"*"

and " ?".

23

23

index_collection

index_collection

Creates a single e lemen t col l ection . I . e . Given a co l lection and an i ndex in t o it,
if the index is in range, extracts the object at that index and creates a new
col l ection conta i ning only t ha t objec t . The base collection remains unchanged.

Retrieves an object at a specified position from a collection.

SYNTAX

Syntax

collection index_collection collectionl index
co ll ect i on col l ectionl
int index

inde x_ co ll ec t ion collec t ion index

ARGUMENTS

where the arguments have the following meaning :

collectionl
Specifies t he col lec tion to be searched.

collection

Collection from which to retrieve the object.

index

index

An integer indicating the position in the collection.
The first object is at index 0.

Speci f ies the i ndex into the collection . Al lowed val ues are integers from 0
to s i zeof _collection - 1.

24

24

inser t _ b uffer
Inserts a buf f er a t one or more plns

SYNTAX
stri n g insert_ buffer [-libraries lib_spec] [ -inver ter_pair ] [-new_n et_names
new_net_names] [- new_cell_n ames new_cell_names] pin_or_port_list lib_cell
list new_net_names
list new_cell_n ames
list pin_or_port_list
st ring lib_ cell

ARGUMENTS
- l ibraries lib_ spec

If this opt i on is specified, then PrimeTime resolve s lib_cellP from the
libraries contained in the lib_spec only. Libraries are searched i n the order

Command: insert_buffer --interactive
internal development utility

option:
-net collection
-buffer cell collection
-candidate location point
-skip_legalize
-no_worse_timing
-inverter_pair
-connected fanout collection
-module collection
-new_net_name string
-new_buf_name string

the net to be buffered (require)
specify buffer library cell
buffer/ inverters candidate location (require)
skip incremental placement legalization
do not commit if timing does not improve
use inverter pair in stead of buffer
fanouts connected with added buffer.
buffer/ inverters module
specify the name of new net
specify the name of new buffer

description:
This command is for AtopTech internal use only.

in which they appear in lib_spec. lib_spec can be a list of library names .
or collections of librar ies l oaded into PrimeTirne; the latter can be obtained
using the get_ libs command . You can not specify this option if a full library
cell name has been speci fi ed .

-inver ter _pair
Indicates that a pair of inverting librar y cel l s i s to be inserted instead
of a single non-inverting library cell.
- new_net_names new_net_names
Specifies the net name to be given to t he new net that PrirneTime inserts.
This option can only be used if only one buffer or an inverter pair is being
i ns erted . If one bu ffer is being inserted, you have to pass only one net name .
If an inverter pa i r is being inserted, you have to pass two net names . These
names can be any val i d net names, but must be the leaf names i.e . not the
hierarchica l names. The new names must not contai n embedded hierarchical
separators . The new names must be unique in the current cont ext (as specified
by current_instance). If you use this option, you have to also use the new_ cell_ names option .
- new_c ell_ name s new_ce ll names
Specifies the cell name to be given to the new cel l that PrimeTime inserts.
This option can only be used if only one b u ffer or a n inverter pair is being
inserted . I f one b u f fer is being inserted, you have to pass only one cell
name. If an inverter pair is being inserted, you have to pass two cell names .
These names can be any valid cel l names, but must be the l eaf names i.e . not
the hierarchica l names. The new names must not contain embedded hierarchical
separators . The new names must be un ique i n the current context (as specified
by current_ins t ance). If you use this option, you have to also u se the new_ net _ names option.
pin_or_port_l ist
Specifies a list of pin s or ports to buffer .

25

25

link_design
Resolves r e fe rence s in a de sign.

link_design
Builds the complete design by resolving references from instances to cells_ This
command performs the following functions:
•

The different LEF, GDS, and Liberty libraries are combined to build an internal
project library with cells that have all views needed by Aprisa (timing view, layout
view, abstract view, and so on).

•

The references in the imported design are replaced by references to cells from this
project library.

•

In a hierarchical design, this step also resolves the references from blocks in the
design to cells representing hard blocks.

To build the design , the link_ design Tel command uses the following information :
•

Veri log netlist (loaded with the read_ verilog Tel command)

•

Logicftiming library (loaded with the read_liberty Tel command)

•

Physical library (loaded with the read_lef, read_milkyway_fram , /oad_libraryTcl
commands)

•

PR_LIB or GDS abstract libraries stored with the project, when available. These
need not be loaded explicitely. They allow you to examine the abstract in the
context of the complete design.

For references to Liberty models that are not yet loaded, Aprisa uses the search path
as set by set_link_path Tel command and the content of the liberty_search_path
variable to find missing timing information . Only Liberty libraries can be loaded on
demand. All physical libraries must be loaded explicitly for the link_ design Tel
command to add them to the project library.
Re-executing the link_ design Tel command on a design causes Aprisa to rebuild the
internal project library using the current settings of the search path and library
variables , and re-establishes the binding of instances in the design to cells in the
project library.
When saving a design , you have the option to save a local copy of the physical cells of
the internal project library with the design . The gdslib library contains the full layout in
GDS format as loaded from GDS or OASIS . The prlib library contains the routing
abstract in PR_LIB format , as loaded from LEF, Milkyway FRAM, or PR_LIB libraries.
Bot the prlib and gdslib libraries are stored with the project. Once these project
libraries exist. thev are alwavs loaded when the desian is loaded . Bv default. the
link_ design Tel command links these libraries after external libraries that were loaded
using read_lef, read_gds, read_oasis or load_library Tel commands with the -link_firsf
argument, that is, cells of these external libraries will overrule cells saved in the
project libraries. Using the db parameter, use_own_lib_before_link_first, the prlib and
gdslib project libraries are linked first, that is , only cells that do not yet exist in the
project libraries are picked up from external libraries , even if the -/ink_first argument
was used . When the use_own_lib_before_link_first parameter is set, the link_ first
argument only affects the order of libraries linked after the project libraries.

26

26

You can control how Aprisa deals with missing information . Either a dummy cell , that
is, an empty module in Veri log and an empty Liberty (.lib) cell with the proper size and
correct pins is created , or an error is issued. A dummy cell representing a missing
module in Veri log is called a proto-module. A dummy cell representing a missing
library cell is called a proto-lib_cell. These proto-objects allow for better support oftop
down design .
Note that, even though they contain the same information, Aprisa makes a distinction
between empty modules and missing modules . An empty module has an (empty)
Veri log definition ; A missing module is a module who was not found and whose
Veri log definition was inferred. You control whether empty modules should be
considered errors. Missing modules are always considered errors.
After linking the design the proto-module or proto-lib_cell can be converted again to
the macro or the module using the converl_macro_to_module and
converl_module_to_macro Tel commands .

Syntax

SYNTAX
string link_ design [-verbose]
[des ign_name]
stringdesign_name

[ -remove_ sub_ design s]

( - keep_ sub_ designs]

ARGUMENTS

l i nk_ des i gn [ - p r o t o ] \
[-rep l ace_own_pr_l ib_with { stri ng [s tring ] ... }] \
[- replace_own_gds_lib_ with { string [string] . . . } ] \
[-r eload_l g_l ib_ with _ d i ff_pa t h ] \
[-no_pro t o_li b_ce l l ] \
[- strict ] \
[-max_re f _coun t_f or_pr oto_ module integer] \
[-min_pi n _cou n t _ f o r _pro t o_module i nteger ] \
[ - allow_defined_empty_ mod u les ] \
[ -b i nd_ l i b _ cel l_onl y _ to_ e mp t y _ modul e ] \

where the arguments have the following meaning :

- verbose

[- pro t o ]

Indicates that the linker is t o display verbose messages.
- remove_sub_designs
Indicates that subdesigns are to be removed after linking. By default,
subdes i gns are removed. Use this option to fr ee up memory and improve
performanc e . For more in f orma t ion, see the section en titled " Performance
Considerat ions ."
-keep_ s ub_ design s
Indicates that subde signs are to be kept af t er linking. By defau lt,
subdesigns are removed. Use this option to keep the s ub- designs around so
that current_ design can be changed to other designs later .
design_name
Spe cifies the n ame of the design to be linked; the defau l t
design .

Create prototype modules and library cells for all
cells referenced in the netlist for which physical
models are missing.

[- replace_ own_pr_ l i b _ wi t h { stri ng [s t ring] . . . }]

In the project library, replace all cells whose names
are in the specified list with cells that have the same
name from one of the loaded libraries. The project
library can be saved on disk when the project is
saved , and contains a copy of all cells with an Aprisa
layout view that are used in the design .

is the current

27

27

[- replace_own_gds_l ib_ with { string [string) . . . ) )
Replace all cells in the projects's own gdslib whose
name is in the specified list of cell names with cells
that have the same name from one of the loaded
libraries. The project's own gdslib is created when
the project is saved and contains a copy of all cells
with a GDS layout view that are used in the design.
(- r e load_l g_ lib_ wi t h _ diff _path ]
Reload Liberty files from different Linux paths based
on the current search_path or link_path settings. By
default, a Liberty file is not loaded if another Liberty
file with that same tile name and same internal library
name is already loaded , even if the path name is
different.

Use this argument if you want to replace the Liberty
file with a new version that is in a different path but
has the same file name and internal library name.
After using this argument, the old version of the
Liberty tile can be removed from memory using the
remove_ library -aiL unused Tel command.
[- no_proto_l ib_ cel ll

[- s t r i c t )

Do not create a dummy library cell if no valid cell is
found .
Do not link unless all logical and physical library cells
are present. This is the default behavior. If the -proto
argument is used, this argument is not applicable. If
for a module no abstract is found , the abstract is
generated automatically, and the warning LnkNoAbs
is issued.

[-max_ref_count_for_proto_modu le maxinst ]
Maximum number of references allowed for
proto-modules. If more than maxinst instances of the
missing cell exist , no proto-module is created . The
default value is 10.
[ - min_pin_ count_ for_p r oto_ modu le minpin ]
Minimum number of pins required for proto-module.
If a missing cell has less than minpin pins , no
proto-module is created . The default value is 50.
[- al l ow_ defined _ emp t y _modules )
Do not treat empty modules as errors.
[- bi nd_ l i b _ cel l_onl y _t o_ e mp t y _modul e )
Only bind a module to a corresponding library cell if
that module is empty.

28

28

list_attributes

list_attri butes
Lists the attributes of an object type if the -class argument is specified. Otherwise , it
lists attributes of all available object types .

Lists cu rr ently d e fi ned attr ibu t e s .

For a list of supported object types , see Apri sa Classes.

SYNTAX
st r i n g list_ attributes [- a p plica t ion ]
[-c l as s class_ name]
st r ingcl ass_name

Syntax
lis t a t tr i b u tes [- c l ass class ]

ARGUMENTS
- app lication
Lists appl i ca tion attributes as well as user-defined a ttri butes .
- class class_name
Limit the l isting t o at t ri but es of a single class. Valid classes a r e design,
port, cell, net , and so on.

ARGUMENTS

where [-class c lass] is the class name of the object.

- app lication
Lis ts application attributes as wel l as user-defined a ttri bu t es.
- class class_ name
Limit the listing to at t ribu tes of a single class. Va li d c la sses a re des i gn ,
port , cell , net, and so on .

29

29

list_libraries

list_libraries
Lists all libraries that are loaded into an Aprisa session. The command returns the full
paths to libraries , or, if the project was saved with the -a/1_/ibs , -prlib, or -gds/ib
arguments, the paths are shown as own_pr_lib, lg_lib,or gds_pr_lib.

Lists al l l i bra ri e s that ar e read into PrimeTime .

SYNTAX

Syntax

string list_ libraries [ -only_ used ]

list libraries [li b _names ] \
[- only_used] \
[- detail ] \
[-lib_c el l cells]

ARGUMENTS

where the arguments have the following meaning:

-only_used
Indicates only the l ist librari es in us e . A library i s in us e if a link ed
design links to libra ry cells from the library .

[ 1 ib_names ]

Only report on the specified libraries .

[-only_used]

Only list the libraries if they contain cells that are
used in the current project.

[-detail]

List for each library all the cells that are used in the
current project.

[-li b _ ce ll cells ]

Only report on cells from the specified list. If this
argument is used with the - only_u sed argument,
only used cells from the list are reported.

30

30

parse_proc_arguments # Parse arguments to a procedure

Command: parse_proc_arguments <string:result>
parse procedural arguments

-args arg_list
result_array

option:
-args { <string> ... }
--get_option arg<l>
--set_option ...
--get_default arg<l >
--set default . . .
--list_options
--load_options
--license
--help

(Argument list to be parsed)
(Name of array to use to store parse results)

procedure arguments (require)
get option value
set option value
get default value
set default value
list current opt ion values
load current option values
list requ i red licenses
display command help

description:
This command parses prcedural arguments with their
attributes defined by define_proc_attributes command.
It must be used inside a procedure, and usually it is the
first command to call. The usage is meaningful only if
the procedure is defined with variable arguments 'args'.
If the input arguments/options have no type error, the
values will be assigned to the variable array indexed by
the argument/option name.

31

31

read_aocvm
Reads an advanced on-chip variation (OCV) derating model from a text file . T his is the
recommend method to build such a model. The set_aocvm_componentTcl command
will be phased out eventually.

Syntax
read_aocvm file

where file is the name of the advanced OCV model file to read.
The syntax of the file is as follows :
version version_number
object_type design I lib_cell I cell
rf_type ris e I fall I rise fall
delay_ typ ce ll I net I cell net
derate_type early I late
object_spec string
dep t h set_of_M_floats
d is tance set_ of_N_ floats
table N_rows_M
_co lums

where the lines have the following meaning :

I

ob j ec t_type design

rf_type r ise

I

de lay_typ cell

fall

I

derate_type early

lib_ce l l I cell
Derating model holds for standard cell , a specific
block, or for a complete design.

I

rise fal l
Derating factor holds for a rising event , a falling
event, or both . By default, the setting holds for both .

net

I

I

late

cell net
Derating factor applies to cells, nets, or both .

Setting holds for an early path (signal path for hold
analysis , or clock path for setup analysis) or for a late
path (signal path for setup analysis, clock path for
hold analysis).

32

32

ob j ec t _spec string

This line is ignored for now. Will be implemented in
future release .

dep t h set_ of_ M floats
_
Different values of logic depth for which a column of
derating factors is provided . Note that N can be zero ,
indicating that this is a one-dimensional model that
has derating factors that are only a function of the
distance .
dis t ance se t _o f _N_ f loats
Different values of distance for which a row of
derating factors is provided . Note that N can be zero ,
indicating that this is a one-dimensional model that
has derating factors that are only a function of the
depth .
table N_rows_M_columns
N rows, with in each row M values . Each row
corresponds to a distance . Each column corresponds
to a depth .

33

33

read_milkyway_fram

read_milkyway

Reads physical library data from a Milkyway FRAM library. The FRAM library contains
the cell frame views, that is, for each cell the location of its pins and the blockages for
the router on the various layers. In addition the route abstracts, also the no_pg and
no_signal route guides are read. The reader fully supports the Milkyway 2008
standard.

Reads in one l inked design fro m milkyway database.

SYNTAX
int read_ milkyway [-version version]
scenario scenario_ name ] CEL_ name
string CEL_name
string scenario_name
string design_ library

[-net l ist_only ]

[-library design_library]

[-

ARGUMENTS

Syntax
read_milkyway_fram mw_library_path

where mw_ library_path is the path name of the Milkyway database to read .

- version version
Specifies the version of the design to be read. For examp l e, there are design
files unde r the CEL v i ew in the mi lkyway design l ibr a r y design_lib:
'design_ lib/CEL/designl_pre_routel: l ', 'design_ lib / CEL /
designl_pos t _route:2' etc . The 1 or 2 after the ': ' is the vers i on number of
the design. The default is to read the most current version.
-netlist_only
I ndicates that only the ne t list i s to be read; constraints are not read. The
default is to read both netlist and constraints .
-library design_library
Specifies the absolute or relat i ve pa t h t o the MW de sign library . This option
can be l eft out if the variable mw_design_ library specifies the path to the
MW design library .

-scenario scenario_name
MW databas e is capable of storing multipl e constraint s that can correspond
to various scenarios of running the design . This option specifies the name
of the scenario for reading in constraints from~~ database. The default is
to not use a scenario.
CEL_name
Specifies the design filename to be read . For example, there are design files
under the CEL view i n the mi l kyway design library design_lib: 'design_lib/
CEL/designl_pr e_route l :l', 'design_ li b / CEL / designl_pos t _rou t e : 2' etc . The
designl_pre_route or designl _post_route are the CEL_name argument. Do not
include vers i on number in this argumen t .

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34

read_milkyway_tech

read_milkyway

Imports the technology information from a Milkyway database .

Reads in one l inked design fro m milkyway databa s e.

SYNTAX

Syntax

int read_ milkyway [-version version]
scenario scenario_name] CEL_name
string CEL_name

[ -netlist_onl y ]

[-library design_library]

[-

string scenario_ name
string design_ library

ARGUMENTS
- version version
Specifies the version of the design to be read. For example, there are design
files unde r the CEL view in the rnilkyway design library design_lib :
'design_ lib/CEL /des ign1_pre_route1 :1', 'design_ lib/CEL/
designl_post_route:2' etc . The 1 or 2 a ft er the ': ' is the version number of
the des ign. The default is to read the most current version.
-netlist_only
Indicates that only the netlist is to be read ; constraints are not read . The
default is to read both net list and constraints.
-library design_library
Specifies the absolute or re l at i ve pa t h to the MW design library . This option
can be l eft out if t he variable mw_ design_ library specifies the path to the
MVJ design library .

- scenario scenario_ name
MW da tabase is capabl e of sto r i ng multiple c o ns trai nt s that can correspond
to various scenarios of running the design . This option specifies the name
of the scenario for reading in constraints from MW database. Th e default is
t o not use a scenario.

read_ mi lkywa y _t e ch filename \
[-rl c_model rlc_ model] \
[- r l c_corner MI N I NOM I MAX ] \
[-r ou ti ng_ dir hv I vh ]
where the arguments have the following meaning:

fil ename

Name of the Milkyway file to read.

[ - r l c_mode l r l c_ model l

Name of the RLC model that is created as part of the
technology import. The default value is MW

[- r l c_ cor ner MI N

I

NOM

[ - rou ting_ dir hv

I

vh ]

I

MAX ]
Read the RLC data of the specified corner. The
default value is MAX.
Routing direction for all layers. For the hv routing
direction, wh ich is the default value , meta11 is routed
horizontally ; metal2 is routed vertically; metal3 is
routed horizontally, and so on .
For the vh routing direction , metal1 is routed
vertically; metal2 is routed horizontally; metal3 is
routed verticallv. and so on.

CEL_ narne
Specifies the design f i lename to be read. Fo r examp l e, there are design files
under the CEL view in the milkyway design library desig n_lib: 'design_ lib/
CEL/design1_pre_route1:1', 'design_l ib/C EL / design1_pos t_rou t e : 2' etc. The
designl_pre_route or des ign l _post_route are the CEL_name argument. Do not
include v ersion number i n this argument .

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35

read_parasitics

read_parasitics

Reads ne t parasitics information from a n SPEF, DSPF, RSPF, or binary parasitics file
and uses it to annota t e the current l y linked design .

SYNTAX
Boolean read_parasitics
[-format file_ fmt ]
[ - complete_ with completion_ type]
[ -lumped_ cap_ only ]
[ -pin_ cap_ inc l uded] ( -incremen t ]
[ - path prefix ]
[ -keep_ capacitive_ coupling]
[ -coupling_ reduction_ fact or factor)
[ -triplet_ type ttype)
[ -quiet ] [-syntax_ only]
[ -eco ]
[ -origi n al_ fi l e_ name file_ name]
[ -ilrn_ context ]
[ -keep_ variations ]
[ - create_ defaul t _ variation s ]
file_ names
st ring
string
string
string
st r ing
float

Loads parasitic information extracted from a third-party tool onto the current design.
By default, this command reads parasitic data in SPEF format.

Syntax
read_parasitics file names \
[- format DSPF I SPEF ] \
[-l umped_ cap_only ] \
[- pin_ cap_ inc l uded ] \
[- inc r ement ] \
[ - q u iet ] \
[ -syntax_ only ] \
[ -path path ] \
[- strip_path prefix ] \
[ - merge_ same_ net_ coupling ] \
[- cond i t i on { condition [condition ]

}l

file_ fmt
completion_ type
path_ name
file_ names
ofname
factor

ARGUMENTS

where the arguments have the following meaning :

-format tile_ fmt
Specifies the format of the parasit ics file . Al lowed values are SPEF, DSPF,

filename

Name of files with parasitic information to load .

RSPF and SBPF (Synopsys Binary Pa rasi tics Format) . If -format is not

specified, the application can determine whether the file is SPEF, DSPF,
RSPF, or a compressed version of those three ascii formats. However, to read

[- format DSPF

I SPEF ]

-cornpl ete_with completion_ type
This option does not apply to the RSPF format . Indicates that a net with
partially annotated parasitics is to be complet ed by inserting capacitances
and resistances according to completion_type. Allowed values are zero, which
compl etes the net by inserting zero capacitances and resistances; and wlm,
which compl etes the net by inserting capacitances and resistances der i ved
from wire l oad models. This option is equivalen t to reading the parasitics
file and then using the command complete_net~ ara s itics -complete_with .
Note: complete _ net_parasitics and read_parasitics -camplete_with complete a
net only if all missing segments are between two pins and t he nets are
partially annotated (ne ts are not affected if t h ey are fully annotated or
have no annotation at all). Also, the net must be hierarchical. so that if
the paras itics for the block-level parts of a net are mi ssing, those

Format of the parasitic data. The default file format is

SPEF

a file in SBPF, you must specify -format SBPF .

[ - lumped_cap_o n ly )

Only annotate the total capacitance of the nets .

[- pin_cap_ inc l uded )

RC networks already include the pin capacitances .

[- i n crement]

Add these parasitics to previously annotated
parasitics instead of replacing them .

[- q u i et ]

Do not report the annotated parasitics in the log file.

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36

parasitics could exist in the top - level net . . If any of these conditions are

[- syntax_onl y]

not met, you must correct the SPEF or DSPF file manually.
-lumped_cap_only
This option does not apply to t he SBPF format. Indicates that only the total
capacitance of nets is to be annotated as a lumped capacitance on the
annotated nets . The RC networks specified in the parasitics file are
discarded. The annotated lumped capacitance is the capacitance specified when
the net is declared in the parasitics file .
-keep_capacitive_coupl ing

Indicates t hat the cross capacitors are to be kept in the RC networks data
structure. This facilitates the capacitive crosstalk analysis, but does n ot
turn it on. Thi s option disabl es the -coupling_ reduction_ factor option; the
command will fail if both options are specified. All coupling capacitors are
split to ground with a factor of 1 . 0 if crosstalk analysis is not activated.
This option applies to both the SPEF and the SBPF format . This option requires

Do not load the parasitics but check if the SPEF
svntax is valid . Note that this is onlv a svntax check.
It does not check whether the parasitic file matches
the netlist.

[- path path ]

Relative path from the current design to the
hierarchical design name for which the parasitic file
has been created .

[- strip_path prefix]

Prefix of all SPEF or DSPF objects that needs to be
stripped .

[ -merge_ same_ net_ cou p l ing ]
Merge coupled capacitances between same nets.

a PrimeTirne SI license.

-pin_cap_included
Indicates t hat the RC networks are to inc l ude the p in capacitances. By
default, the RC network d oes not inc l ude pin capacitances. This option does
not apply to t he RSPF format. The RC pi model in RSPF format has to always

[- condition { condition [condition ) . . . } )
List of SPEF parasitic conditions to load.

include effect of pin capacitances .
-increment
Indicates t hat previously annotated parasitics on the nets listed in the

parasitics fi l e are not to be overwritten. Additionally, any incomplete
annotations in t he parasitics file are not to be rejected. By default, the
RC annotation specified i n the parasitics file overwrites the previous
parasitics annotations of the nets listed in the parasitics file. Use this
option for annotating hierarchical parasitics files.

-path prefix
Specifies a relative path from the current design to the hierarchical design
name for which the parasitics file has been created. By default, absolute
pathnames are used. Use this option if the parasitics file refers to an object
(for exampl e, net) in a hierarchy (for example, hier) . Do n ot use this option
if the parasitics file refers to an absolute path (for example, hier/ net) .

-coupling_ reduction_ fact or factor
This option applies only to the SPEF format and the SBPF format. A positive
floating point number that specifies the factor to apply when reducing
coupling capacitances to grounded capacitances . The default val ue is 1.0.
This option is disabled if the -keep_capacitive_ coupling option is specified .
The command will fail if both options are specified.
-triplet_ type ttype
This option applies only to the SPEF and PARA f ormats . Several values i n SPEF
and PARA, such as capacitor and resistor values, can be specified as triplets
- min : typ :rnax . By default, PrirneTime takes the max value. Using this option,
the user can select the min or typ value . Allowed values are max (the
default) , typ, and min.

-quiet
Indicates that the report_ annotated_parasitics report is not to be generated
when the parasitics file has been read. By default, after reading the
parasitics file , the report_ annotated_parasitics -check command is executed.
This command reports the number of annotated nets , verifies the completeness
of annotated RC networks on nets, and checks that no RC elements dangle . It
is recommended that you use the -quiet option when reading multiple
parasitics files in incremental mode.

37

37

-syntax_ only
Indicates that read_parasitics is to parse the file for syntax errors without
performing any parasi t ic annotation. Use this option to troubleshoot your
parasitics file and avoid generating error messages during the actual
annotation . No design is required to use -syntax_ only .

-ilm_ context
Indicates that the annotation is being performed in the presence of Inteface
Logic Mode l s (ILMs). An original design parasitics can be used to annotate a
design with ILMs using this option. This option does not issue error messages
for missing nets, ce l ls and pins.
-eco
Indicates that the files being currently ann otated are ECO parasitics from
Star-RCXT . PTSI can read ECO parasitics that are written out by Star-RCXT
only. The ECO parasitics can be annotated only when there are some existing

parasitics that are already annotated . ECO parasitic files contain reextracted paras i tics for just the ECO nets and their immediate coupling

neighbours only and do not contain all the nets of the design. I ncremental
analysis can be performed after reading ECO parasitics.
-original_ file_ narne orig_ tile_ name

This option can only be used when -eco option is being used. If the original
annotation is performed via multiple parasitic files into PTSI, then the ECO
par asitic file corresponds to one of the o r igina l fi l es (because it
corresponds to one extracted database in Star-RCXT) . PTSI will try to
determine the corresponding original file but it is not always possible. You
can use this option to specify which original parasitic file does the ECO
fi l e correspond to .
file_ names

When the forma t is one of SPEF, DSPF, RSPF and SBPF, i t specifies a list of
files from which parasi t ics information is t o be read.
-keep_variations
Indicates that the statistical parasi t ic information are to be kept in the
RC networks data structure . This facilitates the variation aware timing

analysis, but does not turn i t on . This option applies only to SBPF format
for now. Also, currently,

this option does not work with either - eco option

or -increment option. This option requires a PrirneTime VA license.
-create_ default_variations
Specifies that default parasitic variations should be created for all the
variation parameters. The default variations created are all assumed to be
of normal distribution. The mean and sigma values are already present in the

parasitic file .

38

38

read_sdf

read sdf

Reads lea f cell and net t iming informa t ion from a fil e in Standard Delay Format
(SDF) and uses that information to annotate the current design .

Reads timing data from a Standard Delay Format (SDF) file and back-annotates the
design.
NOTE : The listed unsupported options will be supported in a future release.

Syntax

SYNTAX
string read_ sdf [- load_delay n et I cell]
[-analysis_type s ingle I bc_wc I on _chip_variation]
[ -mi n_ f ile min_fname]
[ -max_ f ile max_ fname]
[ - path path_name]
[- type sdf_rnin I sdf_typ I sdf_rnax]
[-min_ type sdf_rnin I sdf_ typ I sdf_ rnax]
[-max_type sdf_rnin I sdf_typ I sdf_rnax ]
[-cond_ use min I max I rnin_ max ] [ - syntax_ only]
[-strip_path strip_path_name]
[-quiet ] [ -worst ]
file_name
string
string
string
string
string

path_ name
sd f_file_name
min_sdf_file_name
max_sdf_file_name
strip_path_ name

ARGUMENTS
-load_ delay net

where the arguments have the following meaning:
I

cell

Indicates whether load delays are included in net de l ays or in cell delays
in the timing file being read. The defaul t is cell. The l oad delay is the

portion of cel l de l ay arising from the capacitive load of the net dr i ven by
the cell.
-an alysis_type single I bc_wc I on_chip_varia ti on
Use this option only if you have not already set an analysis type with
set_operating_ conditions -analysys_ type . If you are in min_max mode , the
def ault is bc_ wc . single indicates that only one operating condition is to
be used . Specifying either bc_ wc or on_chip_variation switches to min_max
mode a nd causes both minimum and maximum del ays to be read fr om the SDF file .
Delays in SDF are rep resen ted in the f orm of triplets
(sdf_min : sdf_typ : sdf_max). By default, the -analysis_ type bc_wc I
on_ chip_variation opt ion reads the sdt_ min and sdf_ maxdelays, respectively .
To change this , use the -min_type and -max_ type options .
-min_file m,n_sdt_tile_name
Use this opt ion only iE the minimum and maximum de lays a re in t wo separa te
SDF files . Specifies the file Erorn which mi ni mum delay timing i nformation is

to be read . The t i ming fil e must be in SDF fo rmat vers i on vl . O, v2 . 0, v2.1
or v3.0.
-max flle

read_ sdf file \
[-load_delay load_ delay ] \
[- ana l ys i s_typ e analysis_ type ] \
[ -min_ fil e min_ file ] \
[- max_file max_file]
[- path path] \
[-min_ t ype sdf_min I sdf_type I sdf _max ] \
[- max_type sd f_min I sdf_type I sdf _ max )
[-t ype sdf_ min I sdf_ t ype I s df _ max ] \
[- cond_u s e cond_use ] \
[- s t r ip_pa th strip_pa t h ]
[- syntax_ only] \
[- quiet]

file

Name of the SDF file to read.

[-load_delay load_ delay ]

Not supported yet.
[-anal ys is_type analysis_type]

Not supported yet.
[-min_fil e min_file]

Not supported yet.

[-max _ fi le max_ f ile]

Not supported yet.

[- path path]

Not supported yet.

max_sdt_t~le_name

Use this option only if the minimum and maximum delays are in two separate

39

39

SDF files . Specifies the file from wh ich maximum delay timi ng information is
to be read . The timing file must be in SDF format version vl . O, v2.0, v2.1
or v3.0.
-path path_name
Specifies the path from the current design to t he subdesign fo r which t he
timing file has been created.
-type sdf mi n I sdf_typ I sdf_max
Indicates which of the SDF triplet delay values are to be read fr om the SDF
file. De l ays i n SDF are represented in the form of triple t s
(sdf_min : sdf_typ : sdf_max) . By default, read_ sdf reads the maximum delays

[-min_type sdf_mi n

sdf_typ I sdf_max]
Not supported yet

[-max_type sdf_min

sdf_typ I s df_max]
Not supported yet

[-type sdf_min

sdf_ max .
Note: If you use -type while in min/max mode (for example, if you use operating_conditions bc_bw I on_chip_variation ), a single value is annotated
onto both min and max val u es of an arc.
-m in_type sdf mi n I sdf_typ I sdf_max
Specifies which of the SDF triple t de l ay values a r e to be read from t h e SDF
fi l e fo r minimum delay . Delays in SDF are represented in the form of triplets
(sdf_min : sdf_typ : sdf_max) . By defau lt, read_ sdf reads the minimum delay s
sdf_min . Use this option onl y with option -analysis_ type bc_ wc I
on_ chip_ variation.
- max_typ e sdf_mi n I sdf_t yp I sdf_max
Specifies which of the SDF triplet de lay values are to be read from t he SDF
fi l e for maximum delay . De l ays in SDF are represented in the f orm of triplets
(sdf_min:sdf_typ : sdf_max) . By default , read_ sdf reads t he maximum delays
sdt_max . Use this option only with option -analysis_ type bc_ wc I
on_ chip_ variation.

sdf_type I sdf_max ]
Not supported yet

[-cond_use cond_use]

Not supported yet

[-st r ip_path s t r ip_pa t h ]

Not supported yet
[ -s y ntax _only ]

Not supported yet

[-quiet]

Not supported yet

- cond use min I max I min max
Use this option only if the SDF f ile includes some conditional de l ays usi n g
the SDF construct COND, and if the Synopsys libr ary in use does not specify
conditional delays . min indicates that the minimum o f a ll conditional delays
is to be used to a nnotate the corresponding timi ng arc. max indicates to u se
the maximum; min_max indicates min_rnax operating conditions; the minimum of
all conditional delays is to be used for t he minimum operating condition, and
t he ma x imum of all conditional delays is to be used for the maximum operating
con dition, You cannot use min_max with a single operating condition ; you mus t
be in min_max mode.
- syntax_ only
Indicates that no tim ing annota t ion is to be performed; syntax only is to be
processed . Use this option to ve r ify that you r SDF syntax is cor r ect and will
not issue any error messages.
- strip_path strip_path_name
Speci fies a prefix path that is to be stripped from all SDF objects. Such a
prefix path i s usual l y a result of generating an SDF file f o r a subdesign,
and using th is subdes ign as the current design .
- quie t
Use this option to skip execut ion of report_ annotated_ delay and
report_ annotated_ check after reading SDF.
- worst
Indicates that read_ adf is to annotate the current design only wi th delays
worse than the current annotated delays; appli es to annota ted net and cell
delays and ann otated tim i ng checks. The worst delay i s defined as the most
pessimistic delay . Th i s means prirnetirne annota t es the min of minima, and max
of maxima values.
sdf_file_ name
Speci f ies the file from which tim i ng i n formation is to be read. The t iming
f i l e must be in SDF fo rmat version vl.O, v2.0, v2 . 1 or v3.0.

40

40

read_veri log

read_ veri log
Reads the hierarchy and connectivity information of a design from a set of Veri log file~
and builds a netlist ready for linking , that is , binding instances to modules and library
cells using the link_ design Tel command. The actual design database is only created
during the link_ design step.

Reads i n one or mo re Ver i log files .

SYNTAX

Syntax

st ring read_ verilog [-hdl _ comp il er] file_ n ames
l is t f i le_n ames

read_verilog files \
[ -no_ check]

ARGUMENTS
-hdl _ compiler
Indicates that the Verilog files are to be read using the PrimeTime e .x ternal
reader (p txr) that u ses HDL Compiler. Reading files in this way requi re s a n
HDL Comp iler license while the read i s in progress . HDL Compiler support s the
comp le t e Verilog language, but uses more CPU and me mory than doe s the n ative
PrimeTime Verilog r eader .
fi le_names
Spec if ies names of one or more f iles to be read.

\

where the arguments have the following meaning:
files

Names of the Verilog files to read .

[-no_ check ]

Do not perform additional syntax and semantic
checking. This expedites the reading , but may cause
fatal errors down the road . Use this argument only if
you read in Verilog files that have been previously
checked .

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41

redirect

# Redirect output of a command to a file

redirect
Redirects the output of any Tel command to a user-specified file or to a Tel variable .
The redire ct command allows you to send the output to more than on e destination ,
su ch as to the screen and a fil e using the -tee argument.
If you do not want to tee th e output, you can redirect the output via the standard Tel
method as follows:
command > f i le

Syntax
[-append]
[-tee]
[-file]
[-variable]

(Append output to the file)
(Tee output to the current output stream)
(Output to a file (default))
(Output to a variable)

r ed i rec t

target command \
[- appe nd ] \
[- tee ] \
[- v a r iab l e]

Or, to pass arguments to command:
r ed i rect target {command command_ opt i ons}\
[-append ] \
[- tee ]
[- v a r i ab l e]

Target
command_string

(Name of file/variable target for redirect)
(Command to redirect.
Should be in braces {}.)

where the arguments have the following meaning :

target

Name of the file to which to write the output, or, if the
-variable argument is used, name of the Tel variable
in which to store the output.

command

Name of the Tel command whose output you want to
redirect.

command_ options

Command options to command.

[ - append ]

Append output to the file instead of overwriting the
file.

[- tee ]

Copy the output to the screen .

[- variable ]

Redirect output to a Tel variable instead of to a file .
42

42

remove_annotated_delay

remove_annotated_delay
Removes the delay information on selected nets, ports , or pins that was loaded from
an external timing tool. You may want to use this command to ensure only
Aprisa-calculated delay information is used and no delays slipped in from an external
source.

Removes annotated d elays f rom t he design, either on specif i c cells or nets, between
spec ific pins, or all a nnotated delays i n the design.

SYNTAX
stri ng remove_annotated_delay
[-all ]

[ - fr om from_list]
[ - to to_list]

Syntax
remove _ anno t ated_ delay objects \
[-f rom pin_ or_port ] \
[ -to pin_or_port] \
[- a l l ]

[object_spec ]

list
list
l ist

from_ list
to_ list
object_ spec

ARGUMENTS
- all

Indicates tha t all annotated delays in the design are to be removed. This
option is exclusive of the -from , -to , and object_ spec options.
-from from_list

Specifies a l ist of pins or ports that a r e the startpoints of the timing arcs
f or wh i ch anno tated delays are t o be removed . You canno t comb i ne t his op ti on
with object_ spec.
-to to_ list
Specifies a list of pins or po rts that are the e ndpoints of the timing arcs
for which annotated delays are to be removed. You cannot combine this option
v1ith objec t _spec.

where the arguments have the following meaning :
objects

Names of objects for which to remove the delay.

[-from pin_ or_por t]

Remove delay from the specified pin or port.

[-t o p in_or_port]

Remove delay to the specified pin or port.

[-all]

Remove all annotated delay.

object_ spec
Specif ies a list of leaf cells or nets for which all annotated delays are to
be removed. You cannot combine this option with -from and -to .

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43

remove_annotated_transition

remove_annotated_transition
Removes the transition time information from the specified pins that was loaded from
an external timing tool. You may want to do this to ensure only Aprisa-calculated
transition time information is used and no transition tim es slipped in from an external
source.

Remove s previou s l y-annotated transi t ion times from p i ns or ports i n the current
design .

SYNTAX
i n t remove_ annotated_ transition
-a ll I pin_list
list

Syntax
remove_anno tated_trans iti on pin_list \
[ - a ll]

pin_lis t

ARGUMENTS

where the arguments have the following meaning :

- all

pin_list

pin_ list

Names of the pins for which to remove the annotated
transition .

[ -all ]

Indicates that all a nnotated tran sition times i n the design a r e to be removed .
-all a n d pin_list are mutually exclusive; you must u se o ne of these, bu t no t
both.

Remove all annotated pin transitions.

Specifies a lis t of pins or por t s from which annotated tran sition times are
to be r emoved . -all and pin_ list are mutually e x c lusive; you mu st u se one of
these, but n ot both.

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44

remove_capacitance

remove_capacitance
Removes user-specified capacitances from ports and nets that were set using the
set_ load Tel command. The real extracted capacitances will be used instead.

Removes cap ac itanc e on nets o r po rt s .

SYNTAX

Syntax

s tr i n g remove_ capacitance net_ or_port_ lis
list net_ or_port_ list

remove_capaci tance net_or_port_list

ARGUMENTS
net_ or_port_ list
Spe cifies a list of po r ts a n d ne ts in the curren t d e sign , whose capacitanc e s

where net_or__port_ list is the names of the nets or ports for which to remove
capacitances.

are removed .

45

45

remove_case_analysis

remove_case_analysis
Removes case analysis that was set using the set_case_ana/ysis Tel command . Case
analysis allows you to specify constant values for selected nets that are propagated
through the design.

Removes the case analysis va lue on i npu t .

SYNTAX

Syntax

st r i ng remove_ case_ analysis port_or_pin_list
li st port_ or_pin_ list

remove_case_analysis objects

ARGUMENTS

where objects is the list of objects for which to remove case analysis .

port_or_pin_list
Lists ports or pins for which the case analysis entry is to be removed.

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46

remove_ clock

remove_clock
Removes all or a selected set of clocks in the design .

Removes one or more clocks from the c u rrent des i gn.

Syntax

SYNTAX
string remove_ clock - all
l i st clock_ list

I

clock_ list

ARGUMENTS

remove clock [clock_list ] \
[- a l l ]

were the arguments have the following meaning:

-a ll

Specifies to remove a l l clocks in the current des i gn.
cl ock_ list
Specifies a list of collections containing cloc ks or patterns matching the
clock names .

[clock_ list ]

List of clocks to remove .

[ - all ]

Remove all clocks .

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47

remove_ clock_grou ps
Remo ves s peci f ic e x clusive or asyn ch ronou s c l ock gro ups f r om t he cur re n t d e s ign.

SYNTAX
Boo lean remove_ clock_ groups
- physica l ly_ excl usive I - exc l u siv e
-name name_list I -al l
li st

- asynchronou s

name_l ist

ARGUMENTS
-physi ca l ly_ exc l us i ve
Specifies that groups set for physically exclusive clocks are to be removed.
The -physically_ exclusive , -logically_ exclusive and -asynchronous opt ions
a r e mutually exclusive; you must choose only one .

Command: remove_clock_groups
remove clock groups

option:
-all
-name *
-physically_exclusive
-logically_exclusive
-asynchronous
--get_option arg <l >
--set_option ...
--get_default arg <l >
--set default ...
--l i st_opt i ons
--load_options
--license
--help

remove all clock groups
clok group l i st
physically exclusive
logically exclus ive
asynchronous
get option value
set option value
get default value
set default value
list current opt i on values
load current opt ion values
list required licenses
display command help

description:
%remove_clock_groups -asynchronous -all

- logically_ exclusive
Specifies t hat groups se t fo r logically exclusive cloc k s are to b e removed.
The - physically_ exclusive , - logically_ exclusive and -asynchronous options
a r e mu t ually e xclusive; you mus t choose o nly one.
- asynchronous
Sp e c if i e s t ha t g roup s se t f o r asynchron ous clocks are t o be removed . The physically_ exclusive , -logically_ exclusive and -asynchronous options are
mutually exclusive; you must choose onl y one.
- name name_list
Speci f ies a list of c l ock groups t o be removed, which matches t h e gr oups in
the given names. You should use t he set_ clock_groups command to predefine
thes e na me s . Subs tit u t e t h e l i s t you want f o r name_ list . Th e -name and -all
options are mutua lly exc l usive .
-a l l
Specif i es to remove a l l groups set for exclusive or asynchronous clocks in
th e cur rent design. The -name and -all options are mu tual l y exc l usiv e.

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48

remove_ clock_ latency

Command: remove_clock_latency [db:object_list]
standard SDC command

Removes clock latency i n f o rmati on f rom specified obj ec ts.

SYNTAX
string remove_ clock_ latency [ -sou rc e ]
[- clock clock_li s t]
objec t _list

list
list

clock_ list
ob j e c t_ lis t

ARGUMENTS
- source
Specifies that c l ock source latency should be removed .

option :
-source
-all
-offset
-non leaf
-ocv
--get_option arg <l >
--set_option
--get_default arg <l >
--set default ...
--l i st_opt i ons
--load_opt i ons
--l i cense
--help

remove source latency
remove all latency offsets
remove latency offset
apply to non-leaf offset
remove ocv latency
get option value
set option value
get default value
set default value
list current opt i on values
load current opt i on values
list required lice nses
display command help

description:
This command is the same as standard SDC command.

-clock clock_list
Re moves a ny network latency defined on the pi n /po rt obj ec ts i n obj ec t_list
which refe r s the clocks in c l ock_ list from the design . If the -clock option
is supplied when object_l ist r efers to clock objects, a warni ng i s issued
that t he option is n ot relevant in this case and e xec u tion of the command
proceeds as if -clock was not give n . This opt i on does not remove a more
general l atency setting withou t any specific clock .
objec t _list
Provides a list of clocks , ports, or pins .

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49

remove_clock_ sense

Command: remove_clock_sense <db:object_list>
standard SDC command

Removes unat en e s s infor ma t i on de fi ned on p i ns .

SYNTAX
st ring remove_clock_sense
[ - all)

[ -clocks c lock_l i s t ]
ob ject_list

l i st
l i st

clock_ list
ob jec t_list

ARGUMENTS
-clocks clock_list
Optional l y s p ec i fi e s a l ist of c l ock obj e cts to be associated with the given
pin objects in object_list . If the -clock s opt i on is specifed, only t he
unat en ess s pecif i ed fo r that particul ar c l ock domain wi l l be remove d .
Otherwis e , una tene ss i n formatio n for al l c lo cks pass ing t hro ugh the given pin
objects wi l l be removed . The -clo cks option can o nly remove c l ock sen se
p red e fined by set _ clock_ sense -clock. It does n ot remove the d e fa ult c lock
sense setting for this given p i n .

option:
-all
-cl ocks collecti on
--get_option arg <l >
--set_option ...
--get_default a rg <l >
--set default ...
--l i st_opt i ons
--l oad_opt i ons
--l i cense
--help

remove all clock unateness from current design
constraint ap plied to specified clocks onl y
get option value
set option value
get default value
set default value
list current opt ion values
load current opt i on values
list required licenses
display command help

description:
This command is the same as standard SDC command.

- all

Remove a l l u naten ess i n fo r mat i o n i n cur ren t design .
obje c t _ list
Lists of pi ns wi th p red e fined u n atenes s to remove .

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50

remove_clock_ uncertainty
Removes clock u ncerta in t y information prev ious ly set by the set_clock_uncertainty
command.

SYNTAX
str ing remove_ clock_ uncertainty
[object_ list I
- from from_clock
I -r ise_ from rise_ from_ clock
I - fall_from fall_from_clock
-to to_clock
I - rise_ to rise_ to_ clock
I -fall_to fall_to_clock]
[-rise ]
[ - fall ]
[-setup]
[ - hold ]
[ object_ list ]
list
list
list
list
list
lis t
list

Command: remove_clock_uncertainty [db:object_list]
Remove clock uncertainty constraints.

option :
-all
-append
-end
--get_option arg <l >
--set_option
--get_default arg <l >
--set default .. .
--l i st_opt i ons
--load_opt i ons
--l i cense
--help

remove all uncertainty
remove append uncertainty
remove end uncertainty
get option value
set option value
get default value
set default value
list current opt i on values
load current opt i on values
list required licenses
display command help

fr om_cl ock
r ise_ from_ clock
fall_from_ clock
rise_ to_ clock
fall - to_ clock
to_clock
object_ l ist

ARGUMENTS
-fr om from_clock - to to_clock
These two opt ions specify the sou rce and d estinat i on c locks for interclock
uncertainty. You must specify either the pair of -from/-rise_fram/-fall_fram
and -to/-ri se_ to/-fall_ to , or object_list; you cannot specify both.

description:
Remove clock uncertainty constraints from design.

- rise_from rise_from_clock
Same as the -from option, but i n dicates that uncertainty a pplies only to
rising edge of the source clock. You can use only one of the -from , rise_ from , o r -fall_ from options. Use -rise_ from i nstead of t he obsolete
option -from_ edge rise .
-fall from fall _ from_ clock
Same as the -from option, but indicates that uncertainty applies only to
fa ll ing edge of the source clock. You can use only one of the -from , rise_ from , or -fall_ from options. Use - fall from i nstead of the obsolete
option -fram_ edge fall .
-rise to rise_to_clock
Same as the -to option, but indicates that uncertainty applies only to r is ing
edge of the destination clock . You can use onl y one of the -to , -rise_ to , or
-fall_ to options . Use -rise_ to ins te ad of the obsolete option -to_ edge rise .

51

- fall to tall to_clock
Same as the -to option, but indicates that uncertainty applies only to falling
edge of the destination clock. You can use only one of the -to , -rise_ to , or
- fall _ to opt i ons . Use - fall _ to instead of the obsolete option - to_ edge fall.
object_list
Speci fie s a list of clocks, ports, pins, or ce l ls f r om wh i ch uncertainty
information is to be removed . You ca n use either the pai r of -from/-rise_ from/
-fall_ from and -to/-rise_ to/-fall_ to options or the object_ list option, but
you cannot specify both ; they are mutually exclusive.
-rise

Specifies that uncertainty is to be removed fo r only the rising clock edge.
By d efault, uncertainty is removed f or both rising and f all i ng clock edges .
This option is valid only for interclock uncertainty, and is now obsolete.
Unless you need this option for backward-compatibility, use -rise_to ins t ead.
- fall
Specifies that uncertainty is to be removed for only the falli ng c l ock edge.
By defau lt, uncertainty is removed fo r both rising and fal l i ng clock edges.
This op t ion is valid only for interclock uncer t ainty, and is now obsolete.
Unless you need th is option for backward- compatibility, use -fall_ to instead.
-setup
Specifies that only se t up check uncertainty is to be removed. By default,
both setup and hold check uncerta int ies are removed.
-hold
Specifies that only hold check uncertainty is to be removed. By default, both
s etup and hold check uncer tainties are removed.

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52

remove_ driving_cell

remove_driving_cell
Removes driving cell constraints that were set using the set_ driving_ cell Tel
command . Currently, this command removes all driving cell constraints on the
specified pins or ports.

Removes port d riv i ng cel l i n f ormation.

SYNTAX
string remove_ driving_ cell [ - rise )
[ -fall )
[ -min )
[ -max)
[ -clock clock_ name]
[ - clock_fall)
port_li st

stringclock_ name
list port_list

Syntax
r emove_dr i v i ng_cel l port_li st \
[- rise ] \
[- fall ] \
[-mi n] \
[-max ] \
[- c l ock_f all ] \
[- c l ock clocks ]

ARGUMENTS

where the arguments have the following meaning:

- ri se

port_list

Names of the ports for which to remove the driving
cell constraints.

Removes fall driving cell informati o n .

[- rise ]

Not supported yet.

Removes min driving cell information.

[ -fall ]

Not supported yet.

[ - min ]

Not supported yet.

[-max ]

Not supported yet.

[ - clock_fall )

Not supported yet.

[- clock clocks ]

Not supported yet.

Removes rise driving cell information.
- fall

-mi n

-max
Removes max driving cell information.
- clock clock_name
Remove s t he d riving c ell set relative to t he specified c l ock .
-clock_ f all
Removes the d riv i ng cell re l ative to the falling edge of the clock . The
default i s the rising edge.
port_l ist
Provides a lis t of input or output port s .

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53

remove_from_collection
Re move s o bj e c ts from a co ll ection,
collection remains unchanged.

remove_from_collection
result i ng in a n e w col lection. The ba se

SYNTAX
collec t ion remove_from_collection
base_collection
xlcollectionbase_co11ection
list
object_ spec

ARGUMENTS
base_ col lection
Specifies the base collection to be cop i ed to the resu l t co l lection. Objects
matching object_ spec are removed f rom the result col l ection.
o b j ect_spec
Spe cifi es a list of named objects or collections to remove. The object class
of each element in th is l ist mu st be the same as in the base collection. If
the name matches an existing collection, the c o llect ion is used. Othe rw ise,
t h e objec t s are searched for in the database using the ob j ect class of the
ba se collection .

Creates a new collection, starting from a base collection and removing objects that are
part of a subtraction set. Neither the base collection not the subtraction set are
modified .

Syntax
remove_from_collection base_collection subtract_ collection

where the arguments have the following meaning:

base_collect i on

All objects from the base collection that are not in the
subtract collection are returned.

subtract_collection

Objects that are not returned.

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54

remove_input_delay

remove_input_delay
Removes input delay on the ports or the pins that was set using the set_ input_ delay
Tel command. Currently, this command removes all input delay information from the
specified pins or ports.

Removes i npu t delay informa tion fr om ports or p i n s.

SYNTAX

Syntax

string remove_ input_delay [- clo ck clock_ name ] [-c l ock_ fall ] [- level_ sensitive] [rise] [-f a ll] [-max] [-min] port_pin_ list
list clock_name
l i st port_pin_list

remove_input_delay port_pin_ list \
[-ri se ) \
[- fall )

\

[-min) \
[-max ] \
[ - clock_fall l \
[- c l ock clocks ] \

[-l evel_sensi t ive ]

ARGUMENTS

where the arguments have the following meaning :

-clock clock_name
Relative clock ; '' fo r no clock . Use this option to remove onl y input delay
re lative to one clock.

port_pin_li st

Names of the ports and pins for which to remove the
input delays.

- clock_ fall
De l ay is relative to f al l ing edge of c l ock.

[-ris e ]

Not supported yet.

- l evel_ sensitive
Delay is from level-sensitive latch .

[-fall]

Not supported yet.

[-min ]

Not supported yet.

[-max ]

Not supported yet.

[ - clock_ fall ]

Not supported yet.

Removes maximum i nput delay.

[- clock clocks ]

Not supported yet.

Removes minimum i nput delay .

[-l evel_sensit i ve ]

Not supported yet.

-rise
Removes rising input delay.
- f all
Removes falli ng input delay.
- max

-min

port_pi n_ list
Specifies a l ist of ports a nd pins.

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55

remove_output_delay

remove_output_delay
Removes output delay on ports or pins that wa s set using the set_ output_ delay Tel
command . Currently, this command removes all output delay information from the
specified pins or ports .

Removes output d elay from outpu t por ts o r pin s .

SYNTAX

Syntax

str i n g remove_ output_ delay
(-clock clock_ name]
[-clock_ fall]
[ - lev el _ sensitive ]
[-rise]

remove_output_delay port_pin_list \
[- r ise ] \
[ - fall ] \
[- mi n ] \

( -fall ]

[- max ]

[-max]

[- clock_ fall ] \
[- c l ock clocks] \
[-l eve l _sens i tive ]

( - mi n ]
port_pin_ list

\

str ingclock_name
li st port_pin_ list

ARGUMENTS

where the arguments have the following meaning :

-clock clock_nam e
Relative clock; {""} for input de l ay relati ve to no clock .

port_pin_ list

Names of the ports and pins on which to remove the
output delays.

[ - rise ]

Not supported yet.

- level_sensitive
Removes l evel-sens itive output delay .

[ -fall ]

Not supported yet.

- r ise

[-mi n ]

Not supported yet.

[ - max ]

Not supported yet.

[ -clock _fall l

Not supported yet.

[ - clock clocks]

Not supported yet.

[ - level_ sens it ive ]

Not supported yet.

- clock_fall

Removes the delay rela tive t o fa lling edge o f clock. If you spec ify clock_name
without -clock_ fa l l , the delay relat i ve to rising edge of the clock is
removed.

Removes r isi ng output de l ay.
-fall

Removes fa lling output de l ay.
-max

Removes maxi mum out put delay .
- min

Removes minimum output delay.
po rt__pin_ list
Specifies a list of ports and p ins . Each element in the list is ei t her a
co l lec ti on o f ports or pins, or a pattern wh i ch matches ports or pins on the
current des ign .

56

56

remove_propagated_clock
Removes a p r opagated clock specifi cat i on .

SYNTAX
string remove_propagated_ clock object_ list
l ist object_ list

remove_propagated_clock
Removes from objects the propagated clock attribute that was set using the
set_propagated_clock Tel command . The objects can be a combination of clocks ,
pins, and ports .

Syntax
remove_propagated_clock object_list

ARGUMENTS
object_ l is t
Lis ts clocks, ports, or p ins.

where object_list is a collection of clocks, pins , or ports .

57

57

remove scenario

remove_scenario
Removes scenario(s) that were created using the create_ scenario Tel command . A
scenario is a set of external and process conditions under which the design needs to
be analyzed.

Removes a scenario in mult i scenario ana l ysis .

SYNTAX

Syntax

remove_scenario scenario list

remove scenario { scenario_name [scenario_name ] ...

ARGUMENTS
scenario list
A l ist of unique st rings u sed to i dentify each scena rlo.

where scenario_ name is the name of the scenario you want to remove .

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58

remove user attribute

remove_user_attribute
Removes one or more user-defined attributes that were previously assigned to the
object using the set_user_attribute Tel command .

Remov es a user a t tri bute f rom an object .

Syntax

SYNTAX
string remove_ user_ attribute [ -quiet)
stringclass_name
list object_ spec
stringattr_ name

[ -c l ass class_name)

obj ect_spec attr_name

ARGUMENTS
- qui et

r emove_user_attribute objects attribute_ name \
[- class class_name ] \
[- quiet ]

where the arguments have the following meaning:

-class c la ss_name
If object_spec i s a name, this i s its c lass . Allowab le va l ues a r e design,
port, cel l , p in , n et, lib , li b _ cell, o r lib_p i n.
objec t _ spec
Shows objects from which to remove the attribute. Each element in the list
is either a collection or a pa t tern which combi nes with the c lass_name t o
f ind the o bjec t s.
attr_n ame

objects

Objects from which to remove a user-defined
attribute .

attribute_name

Name of attribute to remove .

[- class class_name ]

Only remove the attribute on an object if that object is
of the specified class . For a list of all classes, see
Aprisa Classes.

[ - q u i et ]

Does not report any messages .

Not supported yet.

Provi d es the name of the attribute.

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59

report_attri bute

report_attribute

Reports attributes and their values on a specified set of objects .

Reports the attribute s on one o r mo r e ob j ects .

The objects in the provided set may be from different classes . You can further narrow
your selection in the set by specifying the class of objects on which you want to report.
The report includes both user defined attributes and Aprisa built-in attributes such as
wire length and capacitance of a net .

SYNTAX
string report_ attribute [ - class class_name]
str ing c l ass_ name
l ist
object_ spec

[- nosplit)

[- appl i cation) object_spec

Syntax
repor t_a tt r i b u te objects \
[- c l ass cl a ss_name ] \
[- applicatio n]

ARGUMENTS

where the arguments have the following meaning:

-class class_name
If objec t _spec is a name, this i s i t s c l ass. Allowa b l e v a l ues ar e design,
port, cell, pin, net, lib, lib_cell, or lib_pin .

obj ects

Objects for which to report its attributes.

- nospl i t

[ - cla ss cl a ss_ n ame ]

Class name of the objects for which you want the
attributes.

[- a p p l ica t ion]

Report the application attributes as well as the
user-defined attributes.

Does not split l i n es i f column overflows.
-application

Li s t s appl ication attr ibutes as wel l as user-defined attr i butes.
object_spec
Lis t of objects to report . Each element in t he lis t i s either a collect i on
or a pattern whi ch combines with the class_ name to f i nd the objects.

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60

report_clock

report_ clock
Reports clock information , such as the clock period , its waveform , clock latency and
uncertainty, on all , or the specified set of clocks.

Repor ts clock-related information.

SYNTAX

Syntax

string report_ cloc
[ -a ttr ibu t e s]
[ -skew]
[ -groups ]
[ -nosplit]

repor t_clock [clock_list]
[ -attribut es ] \
[-skew] \
[-no split] \
[-significant_digits number]

[ cl ock_names ]

l ist

clock_names

where the arguments have the following meaning :

ARGUMENTS
- attributes
Shows clock at t ribu t es and provides a l ist o f al l t he c l ocks in t he c u rren t

d es i g n. The i n fo r ma tion for each c l ock i nc l udes s ource c.ype , signal r i se and
fa ll ti mes , and a t tr i b u t e s . Th i s repor t i s shown by defa u l t.

clock_list

Clocks on which to report. By default, all clocks are
included .

[-attri bu t es ]

Include the values of the clock attributes in the
report . This argument is only applicable when the
-skew argument is used.

[- skew ]

Include the clock latency and uncertainty in the
report.

[ -nosp li t I

Do not split lines if the rows do not fit on a letter-sized
page. This setting results in a less readable table, but
is easier to process by other tools and scripts.

- skew

Repo rts c l o ck l ate ncy (s o urce and ne t wor k la t ency) and unce rta in t y
i nf o rmat i on set on the design by t he set _c lock_lt~-tenc:y a nd
s e t _ clock_uncertainty corronands, r e sp ec tive l y.
Clock ne twork. latency informa t i o n in cl udes rise latency and f al l latency .
Cl o c k so ur ce la t ency in f orma c ion inc l u des r i se la t ency a n d fa ll l a t ency for
ear l y and l a t e arrivals . Cl ock uncer t a i n t y informa t ion includes i ntra.c lock
setup or ho ld u nce rtainty and i nterclock se tup or hold uncertainty. Th is
opt i on al s o reports a n y f ixed clock t rans i tion set by u sing the
set_ clock_ transition command. Th i s opt i o n only reports active clocks.
- groups
Shows t he cur r ent se t ti n g of c l ock grou ps , i n c luding t he l ist o f ac t ive c l ocks

in the current analysi s scope and groupinq of excl us i ve clocks and
asynchronou s c l ocks set by u s i ng the set_ clock_ groups comma nd .

-nospl it
Spe c ifi es no t

t o s p l i t l ines if a c ol umn over fl ows . f1 o s t. of t he des i gn

i n form i on i s listed i n f i xed- wi dth col umns . If the i n forma t i on for a. given
at
fie l d exceeds the column width , the next fieJ d begins on a n ew 1 ine, starti ng
in the correct col umn. Th i s option p r events line-sp l itting and fa c i lit a tes
wr iti n g software to extract. informa tion from the report outp u t .

clock_narnes

[ - s i gnificant_dig it s number ]
Set the precision by providing the number of digits to
report after the decimal. The default value is 2.

Lists the clocks t hat mus t be reported . Subst itu t e the l is t you want Eor
clock_ names,

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61

report_constraint

report_constraint
Reports the status of the design with respect to the specified design constraints. This
report includes details of the design constraints that are violated and where they are
violated. You can specify the types of constraints for which you want a report.

Di splays constrain t - related in f ormation about a des i gn.

For MCMM designs, by providing a prefix for the output file names, you can create
reports for all scenarios at once.

SYNTAX

Syntax

int report_ constraint [ - al l _v iolators ) [-verbose]
(-path_type format ) (-rnax_ delay] ( - rnin_ delay )
[-rnax_ capacitance] [ -rnin_ capacitance ]
[-rnax_ transition ] [-rnin_ transition ]
[ - rnax_ fanout ] [ - min_ fanout ]
[-rnin_pulse_ widt h] [ -rnin_period]
[ -recovery] [ - removal] [-rnax_ skew ]
[-clock _ gating_ setup ] [-c l ock_ gating_ ho ld]
[-cloc k _ separation )
( -connection_ c l ass )
[- i gnore_ register_ feedback feedback_ slack_ cutoff ]
[-significant_ digits digits ] [ -no spl it]

report_constraint [-all_vio lators] \
[-pins pin_list ] \
[-verbose] \
[-reason] \
[-path_type end I slack_ onl y ] \
[ -max_ delay] \
[ -min_ de l ay ] \
[-max _ capacitance ] \
[ -min_capacitance] \
[-max_t rans ition] \
[-min_transition] \
[-max_fanout] \
[ -min_ fanout] \
[-max_fanout_count] \
[-delay_noise ] \
[-min_pulse_width] \
[ -min_period ] \
[-recovery] \
[-remova l] \
[ -max_skew ] \
[-clock_ gating_ setup ] \
[-clock _ gating_ hold ] \
[-clock_separation] \
[-include_ clock_ net l \
[-remove_ clock_ reconvergence_pessimi sm
v alue]
[-ignore_ register_ feedback value] \
[-significant_digits number ] \
[ -nospli t 1 \
[ -html] \
[-summary] \
[ -noenvironrnent ] \
[ - no_h ierarchical_pins] \
[-no_buffer_inverter_on_clock] \
[-scenario scenario ] \
[ - prefix filename_prefix ]

string format
in t digits
float slack_ cutoff
f l oat feedback_ slack_ cutoff

62

62

ARGUMENTS

where the arguments have the following meaning:

-all_ violators
Indicates that a summary is to be displayed showing t he worst violation per
endpoint of each violated design rule constraint in t he current design . The
-verbos e option provides detailed information on each constraint violation.

[ - a l l _ viola t ors ]

Report all violations of the specified rules. By default,
only a summary of violations for each rule is
provided .

[ - p i ns pin_ l i st ]

Report only violations on the specified pins.

[ - verbose ]

Report in detail on the violations.

[ - reason ]

Report the reason why optimization was not able to
fix the violations.

[ - max_de l ay ]

Include violations of the maximum allowed delay and
setup constraints . By default, these violations are not
included.

[ - min_de lay ]

Include violations of the minimum required delay and
hold constraints . By default, these violations are not
included.

[ - max_capacitance ]

Include violations of the maximum capacitance
constraints .

[ - min_ capacitance ]

Include violations of the minimum capacitance
constraints .

[ - max_transi t ion ]

Include violations of the maximum transition
constraints .
Include violations ofthe minimum transition
constraints .

M
ultiple v iolations for a given constraint are listed from the greatest to
the least violator.

-verbose
Indicates that more detail is to be shown about constraint calculations .
-path _ type format
Specif ies the format for the path repor t . Allowed values are slack_ only (the
default), and end. This option has an effect only if the -verbose option is
not used. If slack_ only is specified, the report displays only endpoint
slacks . If end i s specified, the report has a colwnn forma t that shows one
l ine for each path, with only the endpoint path total, required~time, and
slack .
- max_ delay
Indicates that only max_ delay and setup information is to be displ ayed. The
default constraint report displays all timi ng and design rule constraints.
~min_delay

Indicates that on ly min_delay and hold information is to be displayed. The
default constraint report displays all timing and design rule cons t raints.
-max_ capacitance
Indicates t hat only rnax_ capacitance constraint information is to be
displayed . -max_ c apacitance is a design rule used to limit total capacitance
on a net. The -max_ capacitance option displays the max_capacitance cost (the
sum of all max_ capacitance violat i ons) . To see details about the worst
violator, use the -verbose option in addition to the -max_ capac itance option.
To see details about a l l rnax_capacitance violation s, use the -all_ violators
and - verbo se options in addition to t he - max_ c apacitance option . The default
constraint report displays all timing and design rule constraints.
-min_ capacitance
Indicates that only rnin_ capacitance constraint information is to be
displayed . The -min_ capac itance option is a design rule used t o limit total
capacitance on a net. The default constraint report displays all t iming and
des i gn rule constrain ts .
- max_ transition
Indicates that only max_ transition constraint information
-rnax_ transition is a design rule used to limit transition
pins . The de fa ult constr aint report displays all timi ng
constraints. If the library uses the cmos2 delay model.
information is shown instead.

is to be displayed.
time on a ports and
and design rule
max_ edge_ rate

-min_transit ion
Ind i cates that only min_transition constraint information is to be d i splayed .
-min_ transition is a design rule used to set a minimum transition time on a
ports and pins. The default constrai nt report displays all timing and des ign
rule constraints. If the library uses the cmos2 delay model, rnax_ edge_ rate
information is shown instead.
-max_ fanout
Indicates t hat only max_ fanout constraint information is to be displayed . max_ fanout is a design rule used to limit fanout_ load on a net. The default
constraint report displays all timing and design rule constraints.
-mi n_ fanout
Indicates that only rnin_fanout constraint i nformat ion is to be displayed. min_ fanout is a design rule used to set a minimum fanout _ load on a ne t . The
default constraint report displays all timing and design rul e constraints.
-mi n_pulse_ width
Indicates that only rnin_pulse_width constrain t information i s to be
displayed . - m.in__pul s e _ width is a design rule used to set a minimum pulse width
high or low at a clock pin or at pins in t he clock network. The default
constraint r e port d isplays all timi ng and design rule constrai n t s
- mi n_period
Indicates that only min_period constraint information is to be displayed. mi.n_period is a design rule used to set a minimum per iod on a clock signal.
The defaul t constra in t report displays a ll timing and design rul e
constraints.

[ - min_ t ransi t ion ]

[ - max_fanout ]

Include violations of the maximum fanout load
constraints .

[ - min_ fanout 1

Include violations ofthe minimum fanout load
constraints .

[ - max_ fanout _co un t]

Include violations of the maximum fanout count
constraints .

[ - delay_noise ]

Include delay noise violations.

[ - mi n _pu l se_wid t h ]

Include violations of minimum pulse width
constraints .

[ - min_per i od ]

Not supported yet.

[ - recovery ]

Not supported yet.

[ - remova l]

Not supported yet.
63

63

between the con trol pin tran sition to the i nactive s ta te , a nd the active edge
of t h e synchron o u s clock signal . Thi s t.ime is from t he c o n trol signal go ing
inactive t.o t he clock edge t.ha t l a tch es data in. Th e a synchronous con trol
signal mu st r emain constan t. dur i n g t.h i s time, or an incorrect va lue may appear
at t he o u tput s . The default const ra in t report d isplays al l timing and des i gn
ru l e constraints .
-removal
Indicates that only remova l constraint in fo r ma ti on is t o be di spl a yed. removal is a timing con strai n t used to describe the minimum allowa ble t ime
between t he clock pin inactive edg e , while t h e asynchronous p in is active ,
to t h e inactive edge of the same a synchrono u s control pin . The defau lt
constraint repo rt disp lays all timing and design rule c onstraints.
-max_ skew
Indicates that only ma x_ skew constraint in forma tion is to be disp l ayed . -

[ -max_s kew]

Not supported yet.

[clock_gating_setup]

Not supported yet.

[clock_gating_hold]

Not supported yet.

clock_ separation]

Not supported yet.

[-include_clock_net]

Include violations on clock nets.

max_ skew i s a timin g constraint that checks the maximum separation time
allowed be tween t wo clock s igna ls . The de f aul t constrain t repo rt displays al l
timi n g a n d desi gn rule constraint .
-c l ock_ga ting_ setup
Indicates that only clock_ gat i ng_ setup constraint information is to be
d isplayed . -clock_ gating_ setup is a timin g constraint used to set a minimum
set up time between a c l ock and a s i gna l control l ing the gat ing of tha t clock.
The d efault constraint repor t disp l ays a ll timin g and des i gn r ule
constra in ts,
-c l ock_ ga ting_ ho ld
Indi cate s that only clock_ gat ing _ hold constraint i n formation
d isplayed . -c lock_ gating_ hold is a timing c ons t rai n t u sed to
h old tim e between a clock and a si gnal con c rolling t h e ga t ing
The d efault cons tra in t repo rt disp l ays a l l timing and design
constra ints .

i s to be
set a minimum
o f that. cl ock .
r ule

-c l ock_separa t ion
Indicates tha t only clock_sep a ra ti on cons tra.int in f orma tion is to be
di splayed . -c lock_ separation is a timing constraint t hat checks the min imum
sep arati on t i me a l lowed between two cl o ck s i gna l s. The d efault con st raint
repor t disp l ays all timing a n d design rule constraint.
-conn ec t ion_cl ass
Indicates to display o n ly connection_ class constraint information . The
connec ti on_class constra in t is displ a yed only if t here is a connec tion_class
violation.

(-remove_clock_reconvergence_pessimism value ]
Only check for common path pessimism when the
slack is less than the specified value.

[-ignore_register_feedback value]
Ignore paths starting and ending at the same clocked
element if the total path delay exceeds the specified
value.
[-significant_digits number]
Controls the precision by number of digits to use after
the decimal point.
[ -nospl it J

Do not split rows over more than one line if they do
not tit a letter-sized page.

[-html]

Generate a report in HTML format. By default, an
ASCII report is generated.

[ - surrunary ]

Include a timing summary.

[-noenvironment]

Do not report values of environment variables .

- i gno re_ regis ter_ feedback f eeciback_ sla ck_ cuto f f
Indi cates to ign ore any timing path that starts and ends at the same register
and h olds a val ue. This op ti on appl ies to mi n de l ay as wel l as max de l ay
reports . On ly paths with slack less t han t he s pec i fied f eedback_ slack_ cutoff
are ignored. This option is app lied as a fi lter to t h e path s a f t er t hey a re
generated . Therefore , t he number of paths gen erated may be less than the
n umber spec ifie d with t he - nworst and - max_paths options.
- s i gnificant _ d ig i t s digi ts2
Specifies the nwnber of reported digits t o t h e r igh t of the d ecimal point.

[-no_hierarchica l_pins ]
Do not report on hierarchical pins.

Allowed val ue s are 0- 13 ; the defau l t i s determined by t he

report_ defe:ult_ sigoificaot_ digits variable, whose def aul t val ue is 2 . Use
this option if you want to override the de f ault .
-nospl i t
Most of t h e design information is l isted in fixed - widt h columns. If the
information for a given fie ld exceeds the width of t he column, t h e next field
begins o n a new l ine, start ing i n the correct column . The -nosplit option
prevents l ine splitting and faci l itates writing software to extract
information from t he repor t o u tpu t .

[-no_buffer_inverter_on_c lock]
Do not report on buffers and inverters in the clock
path.
[-scenario scenario]

Report timing results and design constraint violations
for the specified scenario in a MCMM design.

64

64

[-prefix filename_prefix ]

If no scenario is set, on ly one report is created and is
named filename_prefix.
If a working scenario is specified with the
set_working_scenario Tel command , only one report
is created . Its name starts with f ilename_prefix,
followed by a dot and the name of that scenario .
If you are in MCMM mode and have several
scenarios set with the current_ session Tel command ,
a report is generated for each of the scenarios in the
session. The names of the reports start with
filename_prefix, followed by a dot, and the
name of that scenario.
Note that the -prefix argument redirects the report to
a fi le. Hence, it has precedence over the >
redirection operator.

65

65

report_delay_calculation

report_delay_calculation
Reports the results ofthe delay calculation for a set of timing arcs.You specify the arcs
by providing the ports or pins where the timing arcs start, the pins or ports where the
arc ends , or both . You can specify the transition time of the signal at the start of the
timing arc.

Displays the actua l ca l cul at i on o f a c el l or n e t t imi ng arc de l ay val ue .

NOTE : Currently, not all the arguments have been fully implemented.

SYNTAX

Syntax

i nt report_ delay_ calculation [ -min I - max]
[ -from_ rise_ tr ansiti o n v al ue ]
[ -from_fal l _t rans i tion value]
- from from_pin - to to_pin I - of_ objects objects
[ -nospl it]
[- thresho l ds]
[ - crossta l k]

report _ de l ay_ ca l cu l ation [ - mi n ] \
[-ma x ] \
[ - nosplit ] \
[-threshold ] \
[- from_rise_transition rise ] \
[ -from_fa ll_ t ransit i on fall ] \
[- cross t alk ] \
[- from start_ timing_ arc ] \
[- to end_ timing_ arc ] \
[- o f _ objects timing_ arcs ]

from_pin
s tr ing
string
to_pin
float
value
co l l ec ti onobj ects

ARGUMENTS
- min
Indicates tha t min imum delay calcu lat ion is to be shown . The des ign must be
i n min /max mode .

where the arguments have the following meaning :
[-min ]

Report on the minimum delay calculation .
NOTE : Currently, this argument must be used with
the -threshold argument because the command is
not yet fully implemented .

[-max ]

Report on the maximum delay calculation.
NOTE: Currently, this argument must be used with
the -threshold argument because the command is
not yet fully implemented.

[-nosplit ]

Do not split lines in the report if the columns do not fit
the width of the page. Using this argument, an ASCII
file is created which is harder to read , but easier to
process using script languages.

- max
Indica tes that maximum de l ay cal cu lati on is to be s ho•m. This is the default
if ne it h e r -min nor -max is specified .
- from_ rise transition value
Specifies a value to be used by the delay calcula tion for the from rise
transition.

- from_ fall transi tion value
Spe cifies a val ue to be used by the de lay calculation for the from fa l l
transi t ion .
- f rom fr om_pin -to to_pin

Specifi es the start a nd end points o f a t i ming arc within a design. For a
cell timing arc, t he p i ns mu st represent the input and outpu t p i ns of a common
leaf cell, which have a timing arc specified between them i n the librar y. For
a n et t iming arc, t he pins mus t be a driver and a load on a common net . Por t
names are allowed i n place of pin names for net arcs . You mus t use e ither the
-fram/-to combination or the -of_objects argument, but not bo t h.

66

66

-of_ objects objects
Specifies a co llec t ion o f ti ming arcs (created with t he get_ timdng_ arcs
command) on which to report. Arcs in the l ist are reported in o rder of from

[ - thresholds J

Report the voltage treshold levels that are used to
ca lculate rise and fall delays and slews.

a nd to pins. You must u s e e ither the -from/-to combination or the - of_ objects

argument, but not both.
-no split
Prevents line- spl itti ng and facilitates writing so ftware t o extract

information from t he report output . Most of the design information is listed
in fixed-wid t h columns . If the in f ormat ion i n a g iven fi eld exceeds t he column
width,

the nex t f ie l d begins on a new line, s t ar t ing i n the correc t column.

-thresholds
Reports the characteriza t ion thresholds that are used for delay calculation.

- crosstal k
Reports t he crosstalk information f or a net arc. The arc is specified by from_pi n and -to_pin . It is not permitted wi th -of~objects and user choosen
t r a n sition time -from~ri se_transition and -from_ fall _ tranait i on . The
crosst alk information is reported from the last update_ timing .

[ - from_ r i se_ transition rise ]
Value to use for the rise transition time of the signal
at the start of the arc. The default value is 0. 0.
[ - from_fall _ transition f all ]
Value to use for the fall transition time of the signal at
the start of the arc. The default value is 0. 0.
[ - crosstalk )

Report on the impact of crosstalk on the arc delay.
NOTE: Currently, this argument is not yet
implemented .

[ - f r om start_ timing_ arc ]

Start point of the timing arcs on which to report .
[ -t o end_ timing_ arc ]

Specifies the end point of the timing arcs on which to
report .

[ - of_ob j ec t s timing_ arcs ]
Specifies the objects , typically cells , whose arcs on
which to report .

67

67

report_disable_timing
Repor t s disabled t iming arc s in t h e current design.

report_disable_timing
Reports on all disabled timing arcs in the current design. Timing arcs can be disabled
because they are logically impossible , that is, they require a signal to be both true and
false , or because they are not possible given the current constant signals like in a
case analysis, or the user specifies to ignore a path, or it is a path that the timer
breaks to resolve a circular dependency (loop breaking path) .
For every arc, the report lists the reason why the arc is disabled. The reasons can be
one of the following :
•

Case analysis (c): Arc does not apply for the current case analysis.

•

Conditional arc (C) : Conditional arc which condition is not met.

•

Default conditional arc (d): Arc to be used when no other conditional arcs are
active.

•

Loop breaking (1): Arc was disabled by the timer to break a timing loop.

•

False net-arc (I); Arc can logically never be active.

•

SYNTAX
s t ring report_ disable_ timing
[ -nospli t ]
[ c e ll s_ or __port s]
collection c ells_or__ports

ARGUMENTS

User-defined (u) ; Arc disabled by the user.

•

Propagation of constant values (p) : Arc disabled based on propagated constant
values.

Syntax
report_disable_timing [-nosplit]

where [ -nosplit] prevents line splitting if the rows do not fit on a single page .

- nosp l it
Prevents line splitting and facilitates wri t ing software to extract
info r mation from the report outpu t. If you do not use t his option, most of

the design information is listed in fixed-width col umns . I f the informat i on
for a given fie l d exceeds the column width, the next field begins on a new
line s tarting in t he correct co l umn.
cells_or_ports
Limits disabled arc reporting to the specified list of cells or ports . Provide
the list or colleccion of cells or ports as an argume n t to the command.

68

68

report_min_pulse_width
Displays minimum pulse width check informat i on about specified pins or ports.

SYNTAX
i nt

report _min_pu~se_width

[ - all _viol a tors)
[-significant_digi ts digits]
[-nosp l it )
[- pa th_ type format]
[- i nput_p ins)
[ port_pin_list]

list

port_pin_ l ist

ARGUMENTS
-all_vio l ators
Indicates t hat only viola t ing minimum pul se wid t h checks are to be reported .
-sign ificant_digits digits
Specifies t he number of reported digits to t he right of t he dec i mal point.

Command: report_min_pulse_width [db:port_pin_list]
Report minimum pulse width check information in
current design.
option:
-verbose
-all violators
-significant_digits integer(3)
-nosplit
--get_option arg <l >
--set_opti on
--get_default arg <l >
--set_default ...
--l i st_opt i ons
--load_opt i ons
--l i cense
--help

show more details
not supported yet
number of digits after decimal point
not supported yet
get option value
set option value
get default value
set default value
list current option values
load current option values
list requ i red licenses
display command help

description:
Report minimum pulse width check information in current
design.

Allowed values are 0- 1 3; the defau lt is determined by the
report_ default_ significant_ digits var i able, whose default val ue is 2. Use
th i s option i f you vJant to overr i de the default .

-nospl it
Most o f t he design in f ormation is l isted in fixed - width columns . I f t h e

information for a give n fie l d e xc eeds the width of the column , the n ext f ie ld
begins on a new line, start i n g in the cor r ect co l umn . -nosplit prevents l i ne
splitting and faci l i tates wri t ing software t o extract i n fo rma t ion from the

report output.
- path_ type format

Specifies the format of the path report and how t he cl ock path is displayed.
Al lowed values are : summary (the default), which generates a repor t with a
column format that shows one l ine for each path and s hows on l y t he req uired

pulse width , actual puls e width and slack; short, which displays only star t
and end po ints in the clock path ; full _ clock, which displays full clock paths ;
and full _ clock_ expanded, which displays full c l ock paths i ncluding a ll mas t er
clocks o f a gener ated clock _
-inpu t _pins

Indicates t hat input pi ns are to be s hown i n the path repor t . The default
isto s h ow only output pins.
port_pin_li st
Specifies a lis t of p i ns or por t s to report. By default . the report contains
a l l pins and ports i n the c urrent design .

69

69

report_noise

report_noise
Reports on the functional noise analysis. The report contains information on the size
and width of noise bumps on victim nets, caused by crosstalk, and it reports on the
noise slack, that is, the difference between the calculated noise bump and a bump
that would cause a fu nctional failure . The latter is derived from the noise sensitivity of
the input pin driven by the victim nets.

Re por t s noi se ana lys is informa tion.

The noise analysis considers four cases. The victim net can be either low or high and
the noise bump can be positive or negative .

Syntax

SYNTAX
int report_ noise
[ -above ]
[-be low ]
[- l ow]
[-high ]
[ - mvor s t_pins pin_ count]
[-signi fi cant_digits digits]
[ - s l ack_type slack_type ]
[ -slac k_le s ser _ t h a n slack_limit ]
[-a ll_ v iolat o r s]
[ -data_pin s]
[-c lo ck_pins]
[ - a sync_pins]
[-verbose)
[-nosp l i t )
[obj ect_list]
list

r eport_ no i se [ - thr es h old v al]] \
[-t hresho l d _l ow va l] \
[-threshold_h igh va l] \
[- ne t s nets ] \
[ - victim_only ] \

object_list

ARGUMENTS
-above

Performs the repor t ing on ly above the rai l s . If this option is combined with
- low , it r eports for the noise bumps above t he l ow rail. If it is combi ned
with -high , it r eports t he noise bumps above the high rail . Otherwise , it

where the arguments have the following meaning:

[ -t hresho l d val ]

Do not report on any positive noise peak smaller than
the specified value when the victim signal is low or
any negative noise peak smaller than the specified
value when the victim signal is high . The default
value of this threshold is 0. 0 mV.

[ -t h r esh o l d_low val l

Do not report on any positive noise peak smaller than
the specified value when the victim signal is low The
default value of this threshold is 0.0 mV.

[ -t h r esho l d_h i gh val ]

Do not report on any negative noise peak smaller
than the specified value when the victim signal is
high.The default value of this threshold is 0.0 mV.

reports the noise bumps above the high rail and above the low rai l .

- below
Pe rforms the r eport i ng only b e low the rails . If this option is combined wi t h
- low , it reports for the n oise b umps b el ow the l ow rai l . I f it is combined
with -high , it reports the noise bumps bel ow the high rail. Otherwise, it
repo rt s the noise bumps b elow the hi g h ra i l and below the low rai l .

- low
Perfo rms the reporting only for the l ow r ail . I f this option i s combi ned with
-above , it reports t he noise bumps above the low ra il. If it is combi ned with
- below , it reports the n oise bumps be low the low rail. Otherwise, it repo r ts
the noise bumps for both below and above the low rail.

70

70

-high
Performs the reporti ng only f or t he high ra il . If t h is option is combined
with -above , it reports t he noise bwnps above the high rail. If it is combined
with -below , it reports the no i se bumps b e low t he high ra i l . Otherwise, it
repor ts t he noise bumps f or both bel0\.'1 and above the h igh rai l .

[ - nets nets ]

Only report noise information for the specified nets.

[ - v i c tirn_on l y ]

Report only victim peak value.

-nworst_pins pin_ count

Specifies the number of load pins to be reported. Any number greater than 1
is accepted; the default va lue is 1 .
- significant_digits digits
Specifies the number of digits after the decimal point t o be displayed for
t ime values in the generated report . Allowed values are 0-13; the default is
determined by t h e report_default_ significant_digits variable, whose default
value is 2. Use t his option i f you wan t to override t he default. This option
con t rols only the number of digits disp l ayed, not t h e precis i on used
internally for analys is . For analys is , Pr i meTime uses the ful l prec i sion of
the platform's fi xed-precis ion, f loating-poi n t arithmetic capability .
-slack_ type s l ack_ type

Specifies the type of slack to be used. Valid values are area, heigh t , and
area_percent. A slack_ t ype of area reports slack as the voltage margin
multiplied by t he noise bump wid t h. The vol tage m
argin is defined by the noise
bump height and noise immunity curves or DC noi se margin. This setting is t he
default . A slack_ type of height reports noi s e slack as the voltage m
argin . A
slack_type of area_percent reports noise slack as t he percen t age of the noise
cons t raint area . The noi se constraint area is computed by mu l t iplying the

noise height constraint by the noise bump width.
- slack_ lesser_ than slack_ limit
Ind i cates that only t hose p i ns with a slack less (more negat i ve)
slack_ l i mit are to be shown .

than

- all_vio lators
Indicates that only violating pins (negative slack) are to be shown. This
op t i on cannot be used with t h e -slack_leaaer_than opt i on. If thi s option i s

used with the -nworst_pins option, the number of violat ing pins will be
l imited by that value.
- data_pins
Indicates that the rep orting is done on l y on pins tha t are data pins of
sequential ce l ls. The effect is similar to preselect the data pins using
all_reg ister s -da t a_p i ns and pass t he result ing collec t ion to the
repor t_noise command.

-c lock_pins
Indicates that the reporting is done on l y on pins that are clock pins of
sequential cells. The effect is simi lar t o preselect the clock pins u sing
al l_registers - clock_pins and pass the resulting collection to t h e
report_noise command.

-async_pins
Indicates that the reporting is done on l y on the asynchron ous pins of
sequenti al cel ls. The effect is similar to preselect t he asynchronous pins
u s ing al l _ registers -async_pins and pass the re s ulting collection to the
report_ no i se command.
- verbose

Shows more detai ls abou t the ca lcula t ion of t otal noise on each load pi n,
includi ng the individual contributi on of each aggressor as well as no i se
bumps propagated from previous stages of the design.
- nosplit
I f t he i n f orma ti on in a giv e n f iel d exceeds the column width , t he nex t f ield
begi ns on a new li ne, s tarting in the correct c o lumn . Th e -nosplit opt i on
prevents l ine- split ting and facilita t es wri ti ng software to extract
i nformation from t he report output .
ob j ec t _list
Speci f i es t h e load pins for wh i ch the noise reporting is performed . If no pin

i s specified, repor t ing is performed on t he entire design.

71

tl

report_port

report_port
Reports electrical information of boundary ports su ch as maximum capacitan ce,
minimum capacitance , and reports timing information such as maximum transition
time and load information for th ese ports.

Di sp l ays port i n f ormation within the design .
SYNTAX

Syntax

string report_port [-verbose ]
[ -de si gn_ru le]
[ - dr i ve]
[ - input_ delay )
[ - output_delay]
[ - wire_ l oad ]
[ - no sp li t J

report_po r t

[port_ list ] \\
[ -de s i gn_ru le] \
[ -nosp l i t]

[ port_ names ]

l i st

port_names

where the arguments have the following meaning :

ARGUMENTS
- verbose
I ndicates t ha t the port r eport i ncl udes a l l po r t i nformat i on . By defa ult
only a summary sec tion is displayed that li sts al l ports and their direc tion.
1

-design_rule
Reports only port desi gn r ule information, including maxCap, manLoad, a nd

[ port_ list ]

List of ports for which to report on. By default , a
report is generated for all ports .

[ - design_ rule ]

Report maximum capacitance, maximum load, and
maximum fanout.

[ - nosplit ]

Do not split rows if they do not fit the width of a page.

maxFanout.

-d r ive

Reports only drive r esistance, i nput transition time , a nd driving cell
informa tion for only input and i nout p or ts .

- inp ut_delay
Reports onl y the port input delay in formation you set .
- output_de lay
Reports on ly the port output delay i nf orma tion you set .
-wire load
Reports on l y the port wire load i n formation.
- nosplit
Preven ts li ne sp li tt i ng if co l umn overf l ows. Most de sign i n fo rma ti on is
listed in fixed-width columns . I f the i nf ormat ion f or a given fiel d e xceeds
the column width, the next f ield begins on a new l ine, star ti ng i n t he correct
co l umn . Thi s option prevents line-sp li tting and facilitates writing software
to extract inf orma tion from the report output .
port_names
Di splays i nformat i on on these ports in the c urrent desig n . Each e lemen t in
this lis t i s ei ther a col lect ion o f ports or a pattern ma tching th e port
names .

72

72

report_timing

report_timing
Reports timing information on a selected set of paths. You can select timing paths by
providing a start or end pin , providing a port or a pin along the timing path , selecting
the worst timing paths, or providing the path type .

Reports timi ng paths.

If theta parameter si_enable_analysis is enabled, this command also reports
crosstalk delta delay information.
If theta parameter timing_aocvm_enab/e_ana/ysis is enabled, the analysis takes into
account advanced on-chip variations .
Delta delay is only reported on input pins. Add the -input_pins argument to see the
della delay values .
For MCMM designs , by providing a prefix for the output file names, you can create
reports for all scenarios at once.

SYNTAX

Syntax

string report_ timing
[ -from from_ list
I -rise_ from rise_ from_ list
I - fa l l _ from fall _ from_ list]
( -to to_ list
I - rise_ to rise_ to_ list
I -fall_ to fall _ to_ lis t]
[-excl u de exclude_ list
I - rise_ exclude rise_ exclude_ list
I -fall_exclude fall _ exclude_list]
( -through through_ list]
[ - r ise_ through rise_ through_ list]
( -fall_ throu gh fall _ through_ list]
[ -delay_type delay_type]
[- nworst paths_per_ endpoint ]
( -max_paths count]
( -path_ type format]
( -tr ue]
[ -true_threshold path_ delay]
[ -j u sti f y ]
( -false ]
(- i nput_pin s ]
[ -un ique_pin s )
[ - start_ e n d_pair )
( - nets )
( -slack_ greater_ than slack_ limit]
[ -slack_ less e r _ t han slack_ l i mit ]
( -ignore_ registe r _ feedback feedback_ slack_ c u toff]
[-report_ignored_register_feedbackj

repor t_timi n g [- f r om pins-an d - p or ts] \
[-ri se_fr om pins -and-ports] \
[-fa l l _ fr om pi n s-and-por ts] \
[- to pin s- an d - por t s] \
[-ris e _t o pins-an d -po rts] \
[-fa l l _ to pins-and-port s ] \
[-throu gh p ins - a nd-ports] \
[-ri se_thr ou g h pins-and-por ts ] \
[-fa l l _ thr ou g h pins-and-por ts] \
[- d e lay_type max I mi n I mi n_max I max_ ri se I
max_fall I min_ri s e I min_fal l ] \
[-nwo r s t n umbe r ] \
[-max_pa ths n umber ] \
[-path_type s hort I ful l I full_cl o ck I \
f ull _ cl ock_e x p a nded I slack_on l y I end I \
summa r y ] \
[-r e ason] \
[-true] \
[-true_ thresho ld thresh o ld] \
[-jus tify ] \
[-fa l s e ] \
[ - input_p i n s] \
[ - unique_pins J \
[- s tart_end_pairl \
[-arriv al _ time_ count c o unt] \

\

73

73

[ -group group_ name]
[ -significant_ digit s digits ]
[ -nosp l it ]
[ - t ransi t ion_ t i me]
[ -capaci tance ]
[ - crosstalk_ delta ]
[ -trace_ l atch_ borrow]
[ -derate]
[ -dont_ merge_ duplica t es ]
[ -pre_ commands pre_ command_ string]
[-post_ commands post_ command_ string ]
[- e x ceptions]
[ -aocvm ]
[ -reca l culate ]
[ c o llectionl]
l ist
from_ list
rise_ from_ list
l ist
fall _ from_ list
list
to_ list
list
rise_ to_ list
list
fall _ to_ list
list
exclude_ list
list
rise_ exclude_ list
list
fall_exclude_ l~st
list
through_ list
list
list
rise_ through_ list
list
fall _ through_ list
stringdelay_type
int
paths_per_ endpoint
i nt
paths_per_ startpoint
i nt
count
string format
float p ath_ delay
list group_ name
i nt
digits
string pre_command_ string
string post_ command_ string
collection collectionl

[-nets] \
[-slack_greater_than threshold] \
[-slack_lesser_than threshold] \
[-ignore_register_feedback value] \
[-report_ignored_register_feedback] \
[-group {name [name] . . . }] \
[-signifi cant_digit s digits ] \
[-nosplit] \
[ - transition_time] \
[-coordinate] \
[-capacitance] \
[-crosstal k_delta ] \
(-trace_latch_borrow ] \
[-derate] \
[ -html] \
[-noenvironment] \
[-scenario scenario] \
[-internal_path] \
[- no_h ierarchical_pins ] \
[-no_buffer_inverter_on_clock] \
[-summary] \
[-br ief_summary) \
[-histogram] \
[-unconstrained_path] \
[-prefix filename_prefix] \
[ -aocvm]

ARGUMENTS
-from from_list

Specifies that only paths f r om t he named pins, ports, n ets, cell instan ces
o r startpoints clocked by named clocks are to b e repor ted . If from_list is
n ot specified, the defau lt b e havior r e ports the longes t path to an outpu t
port i f t h e design ha s no timing cons t raints. Oth erwise , the default behavior
is to report the path wi t h the worst sl ack within each path group if the
des i gn has timing constraints.
-r i se_from r.1se_from_l.1st
Sa me a s the -from op t ion, except t ha t the pa t h must rise from the objec ts
spec ified . If a clock object is specified, this opt i on selects startpoints
c locked by t h e named clock , but only the paths l aunched by r i s in g edge of the
cl ock at the clock source, ta k ing in t o account a ny logical inversion s a long
the clock path .

-fall_from fall _from_ list
Same as the -from op t ion, e x cept t h at the pa t h rou.st fall frorn the objects
specified . If a clock object is spec ified, this option selec t s startpoints
clocked by the named clock, but o n ly the paths launched by fa l l ing edg e of
t he clock a t the clock sou rce, t ak ing i nto account any logical inve rsions
alonq the clock path .

where the arguments have the following meaning :

[-from pins-and-ports ]

Select all timing paths starting at one of the pins or
ports from the specified collection .

[-rise_from pins-and-ports ]
Select timing paths for a rising signal starting at one
of the pins or ports from the specified collection.
[-f al l_fr om pins-and-ports]
Select timing paths for a falling signal starting at one
of the pins or ports from the specified collection.

74

74

- to t o_ list
Specifies t hat only paths to th e named pins, ports, ne ts, cel l instanc e s or
endpoints c l ocked by named clocks are to be reported . If to_list i s not
specified, the defau lt behavior reports the lo ngest path to an output port
if the design has no timing constraints. Ot herwise, the defau lt behavior is
to report the path with t h e worst s l ack within each path group if t h e des i g n
has timing constraints .
-rise_to rise_ to_ list
Same as t h e - to option , bu t applies only to pa t hs risi n g at t he endpoint. If
a clock object is specified, t hi s opt i on se l ects e n dpoi n ts clocked by the
named cloc k , but only the pa t hs capture d by risi ng edge of t he cloc k at clock
source, tak i ng i n to acconnt any logical inversions along the clock path .
- fall _ to fall _ to_ list
Same as the -to option , but applies only to paths fa ll i ng at t he e ndpoi n t.
If a cloc k object is specified, t his op t i on selects endpoi nts clocked by t he
named clock, bu t only the paths launched by falli ng edge of t he clock at tbe
clock source, tak ing i n to account any l ogica l i nversion s a l o ng t he clock
path .
-exclude exclude_list
Specifies that o n ly paths not including the named pins, ports, ne t s, cell
instances in t h e data paths are to be reported . Reporti n g will exc l u de all
data paths from / t hrough/to t he named p i ns, ports, nets a nd cel l i nstances.
If a cel l i nstan ce is specified, all p i ns of t h e cell are e x cluded. -exclude
has h igher precedence than -from / -through/ -to . -exclude does n ot work with t r ue option . -exclude is exc l u s i ve with - rise_ exclude o r - fall _ exc lude .
exclude does not apply to borrowi ng pa t h from -trace_ latch_ borrow option or
clock path from - path fu11_ cloc k /full_ c1o ck_ expanded opt i o n s
-rise_ exclude rise_exclude_l ist
Same as the - exclude op tion, but appl i es onl y to paths rising at t he named
pins, ports, nets, cell instan ces.
-fall _ exclude fall _ exclude_l ist
Same as the -exclude optio n , bu t appl i es only to paths fall i ng at t h e named
pins, ports, ne ts , cell instances.
- through through_l ist
Specifies tha t o n ly pa t hs through the named p in s, ports, cell instances or
nets are to be reported . I f through_l ist is not specified, the defa u lt
behavior reports the longest path to an outpu t port if the design has no
timing con stra i nts. Otherwise, t h e defaul t behavior repor t s the path with the
worst slack wi thin each path group if the des i g n has timing constrai n ts .
If you specify -through only o n c e , Pr i meT ime reports o nly the paths that
t r avel throu gh o n e or more of the objects in t h e list . You can specify through more than once in one command invocation . For a discussion of t h e use
of mu ltip le - t hrough , ri s e _ through , a n d fa.ll _ thro ugh opt i o n s, s e e t h e
DESCRIPTION section.
-r i s e _ t hr o ugh through_ l i st
This op t ion is simi l a r to the - thro ugh option, but app l ies only to paths wi th
a risi n g transition at the specified objects . You can specify -rise_ thro ugh
more than onc e i n a s ingle comman d invocation . For a discussion of multipl e
-through , -rise_ tbrough , a nd -fall_ through option s, see the DESCRIPTION
section.
-fa ll_through througlL_list
This option is similar to t he -through option , b u t app l i es only to paths with
a falli ng transition at t he specified objects . You can specify -fall_ t hrough
more than once in a si ng l e command invocati on . For a disc u ssion o f mu ltiple
-through , ri se_ t hrough , and fall_ through options, see t he DESCRIPTION
section.

[-t o p i ns - and - ports ]

Select all timing paths ending at one of the pins or
ports from the specified collection .

[- r i se_ to pins - and-ports ]
Select timing paths for a rising signal ending at one
of the pins or ports from the specified collection .
[- fa l l _ to pins - and - ports ]
Select timing paths for a falling signal ending at one
of the pins or ports from the specified collection.
[- through pins - and - ports ]
Select all timing paths passing through one of the
pins or ports from the specified collection.
[- r i se_thr ough pins - and - por t s ]
Select all timing paths with a rising signal passing
through one of the pins or ports from the specified
collection .
[- fal l _ thr o u gh pins - and - ports ]
Select all timing paths with a falling signal passing
through one of the pins or ports from the specified
collection .
[- delay_type max

mi n

min_max I max_rise I \
max_ fall I mi n _ r i se I min_f al l)
Select paths based on the type of delay they have.
The following types of delay are supported :

max

Paths with a maximum delay

min
min_max

Paths with a minimum delay
Paths with a minimum or maximum delay

max_rise

Paths with a maximum delay for a rising signal

max_fa/1

Pat hs with a maximum delay for a falling signal

min_rise

Paths with a minimum delay for a rising signal

min_fa/1

Paths with a minimum delay for a falling signal

- delay_type delay_type
Specifies the type of path delay to be repor ted . Va lid values are m.a.x {the
default). min , min_max , max_ ri s e , max,_f a ll , min_ rise , or min_ f a ll. The " rise "
or "fa ll " i n the delay_ type refer s to a rising or falling transition at the
path endpoint .
- nworst paths_per_endpoint
Specifies the number of p aths to be reported per e ndpoi n t per path group.
Allowed values are 1 to 20000 0 0 ; the default i s 1 .

75

75

-ma x _paths co unt
Specifies the nwnber of paths to be reported per path group . Allowed val u es
are 1 to 2000000; the default value is equal to the -nworst setting.
-path_type forrnat
Specifies the format of the path report and how the timing path is displayed.
Allowed values are short , which displays only start and end points " in the
timi ng path ~ ; full (the default), which displays the full path; full _ clock ,
which displays f ul l clock paths in addition to the full timing path; end ,
which generates a report with a column format that shows one line for each
path and shows only the endpoint path total, required-time, slack and CRP
(clock reconvergence pessimism value) when the variable
timi ng_ remove_ clock_ reconvergence_pessimism is set to TRUE; and summary ,
which displays only the path without the accompanying required-time and slack
calculation; full _ clock_ expanded , which displays full clock paths between a
primary clock and a related generated clock in addition to the full _ clock
timi n g path .

[ -nwors t number ]

Number of paths reported per end point. The default
value is 1.

[ - max_paths number ]

Number of paths reported per path group. The
default value is 1.

[-path_type short

I

ful l

I full_clock I ful l_cl ock_expanded
end I summary ]
Controls how paths are reported. The following
options are supported:

short

Report the -nworst paths for each path group and
include the timing of the clock from the clock root to the
clock of the state element that launches the signal and
the clock to the state element that captures the signal.

full_ clock_ expanded

-true_ threshold pa th_ delay
Used with the -true option. Spec i fies a threshold path delay value, in library
time units, used by the -true option to speed up the searching . If this option
is specified , report_ timin!il -true ret u rns the first path it finds g r eater
than or equal to pat:.h_delay rather than continuing to search for a longer one .

Show all pins along the -nworst paths of each path
group from launch pin to capture pin . This is the default
report.

ful/_c/ock

Indicates that the longest (least-slack) true paths in the design are to be
reported . This option can require long run times for certain design s that have
many false paths . The variables true_ delay_prove_ true_ backtrack_ limit and
true_ delay_prove_ false _backtrac k_ lim:i.t are used to limit the amoun t of
backtracking during the operation of report _ tim.ing -true The command
set_ case_ analysis is used to specify a partial input vector to be considered
for -true analysis . The - true option ca nnot be combined with - max__l)aths (l),
-nworst ( 1), -delay_ type (path type other than max) , -unique , -rise/
fall _ through and -rise /fa ll_ from options .

Only show the launch pins and the capture pins and
skip all intermediate pins for the -nworst paths of each
path group.

full

-true

Same as full_ clock, but also include the clock path from
the original clock to the generated clock.

-justify
I n dicates to find and report a n in put vector that sensitizes the reported
paths, or to report the path as false if no input vector is found. The
set_ case_ analysis command is used to specify a partial input vector to be
considered for -justify analysis .

end
summary

-false
I ndicates that onlv false oaths are to be reoorted . These are the paths where
no sensitizing input vector is found . The set_ case_ analysis command is used
to spec ify a partial input vect or t o be considered for -false analysis.
-inpu t_pins
Indicates t hat inpu t pi n s are to b e shown in th e path report. Th e defau lt is
to show only output p ins .
-unique_pins
Indicates t h at only paths through a unique set o f pi n s are to be reported.
This option can require longer runtime s when used in c ombi nati on with the nworst option with a large number of paths ta rgeted for reporti ng.
-start_ end_pair
Indicates that paths are reported f or each pair of startpoint and endpoin t
based o n connectivity . This option can lead to long runtime and can lead to
generating a huge number of paths depending on t he desi gn. By default this
option will only search for pa t hs which a r e violating. This defau l t value can
be changed by having a n explicit -slack_ lesser_ than opt i on . The options that
do not work with t his option are -nworst , -max_paths , -uniqu.e_pins , -true , false , -justify , -slack_greater_ than , -ignore_ register_ feedback , report_ ignored_ register_ feedback . Unlike with oth er options of
report_ timing, t hi s option causes the paths reported to n o l onger be sorted
based on s l ack, i nst ead, paths are arranged based o n t h e endpoint with those
s har i ng t h e same e n dpoi n t appea r ing nex t to one ano t her. The maximum number
of p ath s reported i s l imited t o 2000000. In order to avoid t h e p o ten tial of
returning d uplicate paths, t his opt i on works as though the va riable
timi ng_report_always_u se_valid_start_end_poin ts was set to tr ue.

Only show the slack value at the capture pin of the

-nworst paths of each path group.

[-re ason ]

Report the slack at the capture pin of the worst path
across all path groups.

Report the reason why the optimizer could not optimize a
particular cell or net. Possible reasons are:

0

Do-not-touch cell

d

Do-not-touch net

s

Preserved cell

s

Preserved net

F

Fixed cell

m

Multi-driven net
Tristate net

M

Multi-mode clock net

- n ets
Indicates that n ets are to be shown in the path report. The de f ault is no t
to show nets.

76

76

-slack_qreater_than slack_l~m~ t
Indicates that only those paths with a slack greater (more positive) than
slack_limit are to be shown . This option is applied as a filter to the paths
after they are generated . Therefore, the number of paths generated may be
less than the number specified with the -nworst and -max_paths options. This
option can be combined with -slack_ leaser_ than to show only those paths
inside or outside a g i ven slack range .
-slack_l esser_ than slack_ limit
Indicates that only those paths with a slack less (more negative) than
slack_limit are to be shown . Th is option can be combined with s lack_ g rea ter_ tha.n to select only those paths inside or outside a given slack
range .
- ignore_ regis ter_ feedback feedback_ slack._cu toff
Indicates that non-inverti n g timing l oops should be ignored if they start and
end at the same r egister pin that holds a value. To be ignored, the data-tooutput arc and the output-to-data path must either both be inverting or both
be non-inverting. This option applies to min delay as well as max delay
reports . Paths a r e ignored on l y i f they have a slack less than the specifi ed
feedback_slack_cutoff . This option is applied as a filter to the paths after
they are generated . Therefore, the number of paths generated may be less than
the number specified with the -nworst and -max_paths option s.
-report_ ignored_ register_ feedback
Indica t es that paths are to be reported if they are ignored when the ignore_ register_ feedback option is specified .
- group group_ name
Specifies the path groups from which timing paths are selected for reporting
based on other specified options for reports.
-transi tion_ time
Indicates tha t transition t ime (slew) is to be shown in the pa t h report. The
default is not to show trans i tion time. For each driver pin or load pin the
transi t ion time is displayed in a column preceding incremental path delay.
-capacitance
Indicates that total (lump) capacitance is to be shown in the path report .
The default is not to show capacitance. For each driver pin the tota l
capacitance driven by the driver i s displayed in a column preceding both
incremental path delay and transition time (with -transition_ t ime ). When nets is specified, the capacitance is pri n ted on the lines with nets instead
of the lines with driver pins .
-crosstalk_ del ta
Indicates that annotated delta delay and de l ta transition time is reported.
The del t as a r e computed during crosstalk sign al integrity analysis, or they
can be annotated manually using s et_ anno t a t e d _ dela y - delt a _ onl y and
set_ anno tated_ transitio n - delta_ only . Note that the -c ross talk_ delta only
reports the calculated or annotated deltas, i t does not initiate crosstalk
analysis - Only delt.as on input pins are shown . Delta transition t i me is shown
only with - transitio n_ time . The - crosstalk_ delta automatically sets input_p ins .

[- t r u e 1

Not supported yet.

[-t rue_ thresho l d t h r eshol d ]
Not supported yet.
[-j u s t i f y ]

Not supported yet.

[-f a l se ]

Not supported yet.

[- i nput_p i ns l

Show input pins.

[ - unique_p i ns 1

Not supported yet.

[ - s t ar t _ end_pair 1

Not supported yet.

[- arrival_ time_ count count ]
Report the average arrival time counts found on a
pin . It is calculated by dividing the sum of all arrival
time counts across all pins by the total number of
pins. This number gives a good indication of the
complexity ofthe design with respect to timing. The
run time, typically, is proportional to the design size
and proportional to this average arrival time count.
Show the net names in the path report . By default,
onlv pins are shown.
[ - s lac k_ gr e ater_than threshold ]
Only report path whose slack is greater than the
specified threshold . The default value is -1e+20.

[- ne t s 1

[- slack_ l esser_ t h an t hresho l d ]
On ly report path whose slack is smaller than the
specified threshold . The default value is 1e+20.

- derate
Indica t es that derate f actors are to be shown in the timing report. The
default is to show no derate factors . Specifying this option automatically
sets both -input_pins and - path_ type full _ clock_ expanded . For each output pin
of a cel l i n the report tha t cells derate factor used i s d i splayed in a column
preceding the incremental path de l ay . For each input pin of a cell i n the
report its preceding nets derate factors is displaye d in a colUIIU1 preceding
the incremental path delay . In addition a summary report will follow the
timing report ind i cating what portion of the slack is a result of the
application of derate factors.

[ - i gnore_ register _ f eedb ack v alue ]
Not supported yet.

-signi ficant_digi ts digits
Specifies the number of digits after the decimal poi n t to be displayed for
time values i n the generated repor t . Allowed values are 0- 13; the default is
determined by the report_ default _ signific ant_ digits variable, whose default
value is 2. Use t his option if you want to override the default. This option
controls onl y the number of digits displayed, not the precision used
internally fo r analysis. For analysis, PrimeTime uses the f u ll precision of
the platform's fixed-precision, floating-point arithmetic capability.

77

77

-nosplit
Most of the design information is listed in fixed-width columns. If the
information in a given field exceeds the column width, the next field begins
on a new line, starting in the correct column. The - nosplit option prevents
l ine-splitting and facilitates writing software to extract information from
the report au tpu t.
- trace_ latch_ borrow
This option con trols the type of report generated for a path that starts at
a transpar ent latch. If the path startpo in t borrows from the previou s stage,
using this option causes the report to show the entire set of borrowing paths
that lead up to t he borrowing latch, starting with a nonborrowing path or a
noninverting sequential loop . By default, the report shows only the last pa t h
in the sequence of borrowing stages. Each stage is reported separately,
showing the time borrowed and lent and the endpoin t s of the stage . The
cumulative amount of borrowed time along a sequence of stages is not included
in the report . The options -input_l)ins, -nets, -transition_ times , capacitance , and -significant_ digits apply to every stage in the sequence of
borrowing paths, but the remaining options (for example, - from and -true )
apply only to the l.;;tst stage reported .
- d on t_merge_ dupl ica tes
This option is available only if the user invokes PrimeTime with the multi_ scenario option . It turns OFF a main capability in merged reporting
that is ON by default. The option affects t he manner in which paths from
multiple scenarios are merged . By defau l t, when the same path is reported
from more than one scenario, PrimeTime reports only the single most critical
instance of that path in the merged report a n d shows its associated scenario.
By using th i s option , PrimeTime will not merg e duplicate ins tances of t h e
same path into a sing l e instance, but instead shows all c ri tical i nstances
of the path from all scenarios. Since the number of paths reported is limited
by the -nworst, -max_paths and other options of this command, t h e resulting
merged report, when t hi s option is used, may not be evenly spread out across
the design, but instead may be focussed on the port i on of t he design that is
critical in each scenario .
-pre_ cornmands pre_command_string
This option is available o n ly if the u s e r invokes Prime Time with the multi_ scenario opt i on . This opt i on allows users to specify a string of
commands to be executed in the slave context before the execution of t h e
merged_ reporting command. Commands must be grouped using the
character,
The maximum size of a command is 1000 chars.
11

11

;

-pos t_commands pos t _ command_ s tring
This option is available o n ly if the user invokes PrimeTime with the mu l ti_scenario option. This option allows user-s to specify a string of
corrunands to be executed in the s l ave context after t h e execution of the
merged_ reporting c ommands . Comman ds are grouped us i ng t he
character . The
maximum size of a command is 1000 chars .
-exceptions
Pr i nt s user-entered timing exceptions, name l y false paths, multi -cyle paths,
and min / max delays, that are satisfied per timing pat h being reported . The exceptions option s requires one and only one of the follow i ng t hree values:
dominant, overridClen , and e.l.l . Please note th a t the additional analysis
required per path with - exceptions is non - trivi al Therefore, a
report_ timing with -exceptio n s is expected to e xecu te s l ower than t he exact
same command without the -exceptions option . -exceptions does not work with
-pa.th_ type short/end / swomacy option.
This option ind icates that the timing paths ar e to be adjusted using AOCVM
information. The orde r in whic h the pa t hs a r e printed matches the order in
which the paths would have been printed had this option not been specified .
This option automatically sets -derate and -path_ type full _clock_ expanded .
AOCVM derate factors are shown in the Derate column of the timing report .
-recalculate
Indicates that path recalculation shou ld be applied during the search . The
worst recalcu l ated paths meeti n g the path requirements are returned. This
option can re sult in long r untimes due to the path searching required, This
option does not work with -aocvm., -justify , -true , -slack_ greatar_ than and
other mu lti scenario options. including -pre_ commands , -post_ cormn.ands . dont_ merge_duplicates and -attributes .

[- report_ ignored_ register_ feedback ]
Not supported yet.
[-group { name [name] ..

Report on the specified groups.
[- significant_ digits digits ]
Display the numbers with the specified number of
digits after the decimal point.
[ -nospli t l

Do not split lines if they do not fit the width of a page.

[- tran s ition_time l

Report transition time.

[- coordinate l

Include the location for reported pins and cells .

[-capac itance ]

Report total capacitance .

[ - crossta lk_del tal

Not supported yet.

[- trace_latch_borrow]

Not supported yet.

[- dera t e l

Not supported yet.

[ -htmll

Report in HTML format.

[ -noenvironment 1

Do not report environment variables .

[- scenario scenario]

Name of work scenario for which to report timing
information.

[- internal_path]

Do no report on timing paths that start or end at 1/0
ports .

[-no_hierarchical_pins ]

Do not report hierarchical pins.
[-no_ buffer_ inverter_ on_ clock ]
Do not report buffer and inverter on clock paths.
[-surrunary]

Include timing summary information.

collection!
Specifies the collection of timing path s to report . Th is option is mu tually
exclusive of option s which con trol the selection of paths to report and is
only compatibl e wi t h options wh ich control the formatting of the repor t .

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78

[- b ri ef_ s u mmary )

Include a brief timing summary information.

[- histogram ]

Include an end pin slack histogram.

[- uncon s tra i ned_pa t h ]

Report unconstrained paths if no constrained path is
available.

[-pre f ix filename_prefix ]
If no scenario is set, only one report is created and is
named filename_prefi x.

If you have a working scenario specified with the
set_working_scenario Tel command , only one report
is created . Its name starts with filename_prefix,
followed by a dot and the name of that scenario .
If you are in MCMM mode , and have several
scenarios set with the current_ session Tel command,
a report is generated for each of the scenarios in the
session . The names of the reports start with
filename_prefix, followed by a dot , and the
name of that scenario.
Note that the -prefix argument redirects the report to
a file. Hence , it has precedence over the>
redirection operator.
[- aocvm)

For the reported timing paths, list the derating factors
applied to the various gate and net delays due to
advanced on-chip variation (OCV) modeling.

Advanced OCV models are specified using the
read_aocvm and the set_timing_derate
-aocvm_guardband Tel commands.

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79

reset_path

reset_path
Removes path exceptions that have been set using the set_fa/se_path and
set_multicyc/e_path Tel commands.

Rese t s spec ifi ed path s to s i ngle - cycle b ehavior .

SYNTAX
Boolean reset_path
[ -setup ) [-ho l d )
[ -r ise) [ - fa ll )
[ - from from_ list
I - r ise_ f rorn rise_ from_ list
I -fall_ frorn fall _ from_ list)
[ - through through_ list ]*
[ -r ise_ through rise_ through_ list] *
[ -fa l l _ t h rou gh fall _ through_ list) *
[-t o to_ list
I -rise_ to rise_ to_ list
I -fa l l _ to fall _ to_ l ist)
lis t
list
l i st
list
li st
l ist
list
list
list

Syntax
rese t _pa th [ - se tup] \
[ -hold ) \
[ - ris e) \
[- fa l l ] \
[- from pin - and - ports ] \
[- rise_from pin - and - ports ] \
[ - fal l_f r om pin - and-port s ] \
[ - to pin - and - ports ] \
[ - ris e _to pin - and - por ts ] \
[- fal l_t o pin - and - ports ] \
[- throu gh p i n - and - ports ] \
[- rise_ through pin - and - por t s ] \
[- fall_ t hrough pin-and - ports ]

from_ list
rise_ from_ list
fall _ from_ list
through_ list
rise_ through_ l i st
fall _ through_ list
to_ list
rise_ to_ lis t
fall _ to_ list

ARGUMENTS

where the arguments have the following meaning :

-s e tup

- hold
I ndicates that o n ly hold (mi n imum d e l ay) eva l uatio n i s to be reset to its
de fault , s ing le - c y cl e b eha vi o r. If n eith er -setup n o r -hold is specified,
both setup and hold checking a re rese t to s ing le-cycle .

- rise
I n dicates that o n ly risi n g path del ays are to b e r eset to si ngle-cycle
b e h a vi o r. I f neith er -rise n o r -fall i s s pecified , bo th r i s ing and f a l l ing
del a ys are reset to s i ngle-cycle .

( - se t up ]

Only remove path exceptions that were defined for
setup checks .

( -hold )

Only remove path exceptions that were defined for
hold checks.

[ -ri se ]

Indicates that o n ly se tup (maximum d e lay) eva l u ation is t o be rese t to its
default, sing le - c ycle beh avior . If n ei the r -setup nor -hold is specifi e d,
both setup a nd hold checking a re res e t to sin gle-cycle .

Only remove path exceptions that were defined for
rising signals.
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80

- fall

Indicates that only f alling path delays are to be reset to single-cycle
behavior . If nei ther -rise nor -fall is specified, both risi ng and falli ng
delays are reset to single-cycle.
-from from_list
Specifies a list of timing path startpoint objects . A valid timing startpoi n t
is a clock, a primary input or inout port. a sequential cell, a clock pin of
a sequential cell, a data pi n of a leve l-sen sitive latch, or a pin that has
i nput delay specified. If a clock is specified, all registers and primary
inpu t s related to that clock are used as path startpoints. If you specify a
cell, on e path sta r tpoint on t hat cell i s affected. You can use only one of
-from, -rise_ from , and -fall_ from .

-ris e_ from rise_ from_ list
Same as the -from option, except t hat t he path must r i se from the objects
specified. If a clock object is specified, th is option selects startpoints
clocked by t he named clock, but only the paths launched by rising edge of the
clock at the clock sou rce, taking into account any logica l i nversion s alon g
the clock path. You can use only one of -from , -rise_ from , and -fall_ fram .
-fall_ from fall _ from_ list
Same as t he -from option, except t hat t he path must fall from the objects
specified . If a clock object is spec i fied . this option selects star t points
clocked by the named clock, but only the paths launched by fall ing edge of
the clock at t h e clock source, tak ing into account any l ogical i nvers i ons
along the clock path . You can use only one of -from , -rise_ from , and fall _ from .
-through through_list
Specifies a list of pins, po r ts, and nets through which the paths must pass
that are to be reset. Nets are interpreted to imply the leaf - level driver
p ins . If you omit -through , all timi ng paths specified using the -from and
to options are affected. You can specify -through more than once in one
command invocation. For a discussion of t he use of multiple -through options,
see t he DESCRI PTION section .
-rise_through rise_through_list
This option is similar to the - through option, but applies o nly to paths with
a rising trans ition at the through points . You can specify -riae_ through more
than once in one comman d invocation . For a discussion of the use of multiple
-through options, see the DESCRIPTION section.
- fa ll_thr ough tall_through_list
This option is similar to the -through option , but applies only to paths with
a rising transition at the through points. Yo u can specify -fall_ through more
than once in one command invocation . For a d i scussion of the use of multiple
-through options, see the DESCRIPTION section .
-to to_ list
Specifies a list of timing path endpoint obj ects . A valid timi n g endpoint is
a clock, a primary output or inout port, a sequentia l cell , a data pin of a
sequential ce l l , or a pin that has outp u t delay specified. If a clock is
specified, all registers and primary outputs related to that clock are used
as path endpoints. If a cell is specified, one path endpoint on that cel l is
affec ted . You can use only one of -to , -rise_ to , and -fall_ to .
-rise_t o rise_ to_ list
Same as the -to option, but applies only to paths rising at the endpoint . If
a clock object is specified, this option selects endpoints clocked by the
named clock, but only t he paths captured by risi n g edge of the c lock at clock
source, taking i n to account any logical inversions a l ong the clock path . You
can use only one of - to , - rise_ to , and - fall _to .

[ - fall ]

Only remove path exceptions that were defined for
falling signals.

[ - from pin-and-ports]

Only remove path exceptions on paths that originate
at one of the specified pins or ports.

[-rise_ from pin - and- ports]
Only remove path exceptions on paths that originate
with a rising signal at one of the specified pins or
ports.
[-f all_from pin - and - ports]
Only remove path exceptions on paths that originate
with a falling signal at one of the specified pins or
ports.
[- to pin - and - ports ]

Only remove path exceptions on paths that end at
one of the specified pins or ports .

[- rise_t o pin - and - ports ]
Only remove path exceptions on paths that end with
a rising signal at one of the specified pins or ports.

[-f all_ to pin-and - ports ]
Only remove path exceptions on paths that end with
a falling signal at one of the specified pins or ports

[-t hrough pin-and - ports ]
Only remove path exceptions on paths that pass
through one of the specified pins or ports.

[-rise_thr ough pin - and - ports ]
Only remove path exceptions on paths that pass
through one of the specified pins or ports with a rising
signal.
[- fall _t hrough pin - and - ports ]
Only remove path exceptions on paths that pass
through one of the specified pins or ports with a
falling signal.

-fall_ to fall _ to_ list
Same as the - t o opti on,but applies only to paths falling at the e ndpoint . If
a clock object i s specified, th i s option selec t s endpoints clocked by the
named clock, bu t only t h e path s launched by falling edge of the clock at the
c l ock source, taking into account any logical inversions along t he clock
path . You can use only one of -to , - riae_ to , and - fall_ to.

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81

set_an notated_delay

set_ an notated_ delay

Specifies a delay between two pins. This delay can be a cell delay from an input pin of
a cell to an output pin of the same cell , or a net delay from an output pin of a cell to an
input pin of another cell.

Sets the ne t o r cel l delay val ue be tween t wo pins .

This delay replaces or is added to the delay calculated by the timing analyzer.
The delay may only be valid for either a min-timing or max-timing analysis and may be
only valid for rising or falling edges of a signal.
Annotated delays typically are read in from an SDF file generated by a third-party
timing analysis tool.

Syntax

SYNTAX
string set_ annotat.ed_ delay - cell
[ - ri se]
[ - fa l l]
[ - min ]
[ -max ]
[ - load _ delay l oad_ d elay_ type ]
( -from from_pins]
[ -to to_pins]
[ -cond sdf_ expression]
[ -increment ]
[ -de l t a_o n ly]
[-worst ]

- var i ation variation_object
de l ay _ va l u e

I

- net

set_anno tated _delay dela y \
- f r om coll e ct i on \
-t o c o llection \
[-net] \
[- c e l l] \
[-ri s e] \
[-fall] \
[-min ] \
[-max ] \
[ -c ond stri ng ] \
[-l oad_ d elay s tring ] \
[-i n cr e me nt] \
[ - d elta_on l y] \
[-wors t]

stringl oad_ del a y _ type
l is t
fr om_pins
li s t
to_pins
s t r i ngsdf_ expression

f l oa t d el ay _ v alu e

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82

ARGUMENTS

where the arguments have the following meaning:

- cel l

delay

Delay in pica seconds.

- from startpins

Set delay only on arcs that start from a pin in the set.

-t o endpins

Set delay only on arcs that end in a pin in the set

Specifies t ha t the d elay a nnotated is a cel l de l ay . The -cell and -net
argument s are mut ual l y ex c lusive; you mus t spec i fy one, but no t bo t h .

-net
Specifies that the delay annota t ed is a net delay . The -net and -cell
argu men ts a re mutua l ly e x c lusive; yo u mu st spec i f y one, but not both .

[-ne t]

Delay only models the net delay.

[-c ell]

Delay only models the gate delay.

[- rise]

Only use this delay for a rising signal at the input pin .

[- fall ]

Only use this delay for a falling signal at the input pin .

[-min ]

Only use this delay for min-timing , that is, hold
analysis.

[-max ]

Only use this delay for max-timing , that is, setup
analysis.

[- increment]

Add this delay to whatever the timing analyzer
calculates based on cell timing models and net
parasitics.

[- delta_ only ]

Indicates that this is a delta delay, i.e. a change in
delay, that can be positive or negative.

-r ise

I ndicates that the de l ay is for the da ta r ise tra ns it i on. If y ou do not
speci f y e ith e r -rise o r -fall , both va l ue s a re set .

-fall
I ndicates t hat the timing check is for the da t a fa l l transit i on. I f you do
no t spec i f y either - rise or -fall , both val ues are set .

- min
Use this op tion on ly if the design is in min_max mode (mi n and ma x operating
conditions) . Specif i es the minimum delay for both data rise and da t a fal l
t ransitions.
- load_de lay load_ delay_type
Specifies whether l oad delay is to be inc l uded as part of annota ted n et delays
o r a s part of ann otated cell delays . Allowed values are net or cell . Load
delay is the portion of cell del ay result ing from the capac i tive load of the
net the cell is driving. All timing arc s o f the same net and of the same cel l ,
must be ann otated with t he same load_ delay_ type .

- f r om fr om_lis t
Specifies a l i st of leaf cell p i ns and top level po rt s that are the
startpoints of the timing arcs for which d elays are a nn ota t ed .

-to to_list
Specifies a l i st of leaf cell pi ns and/or top level ports t hat a r e the
e ndpo in ts of the timi ng arcs f or \·;hi ch de l ays a r e annotated.

- cond sdf_ expression
Use this opt i on onl y if the library has a condition atta ched to the specified
del ay timing arc; otherwis e , an error mes sage is gener a ced. Sp ecifies the
condition f o r which the annotated delay is val id . The syn tax of the c ond it ion
mu st match the cond ition specified i n the library us i n g the construct
sdf cond. The syntax is the same one used i n the Standard Delay Format (SDF).

- incremen t
Spe cifies t ha t the delay is to b e i n cr emen t ed to th e current d e lay of the
specified timing arc .

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83

- delta_on ly
Spec i fies that the annotated delay is to be added to the net delay value
ca l cul a ted by Pr i meTime. You canno t u se t h is opt ion with -cell .

-wor s t

Th i s option is not ye t impl emen t e d , s o it is ignored .

de l ay_val u e
Specifies the delay va lue between pi ns on t he same cell, i n units con s isten t
wit h t he t e chno l ogy libra r y used du r ing op timiza ti on . For exampl e , i f t he
cechnology library s pe cif ies de l ay values i n nanos e conds, d e lay_ value must
be expressed in nanoseconds.

-var i a ti on variatioll_ object
Speci fy a variation t o annota t e on a ll arc s between t he f rom and t o pins. The
var ia t i on_ob ject mu s t be c rea t ed us i ng the c r ea t e_va r ia tion c ommand.

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84

set_annotated_transition

set_annotated_transition

Sets the trans i tion time to be ann otated on specified pins in t he cur rent design.

Sets a transition time on pins and ports that overrides the transition time that is
otherwise calculated by the timing analyzer based on cell models, net parasitics , or
wi reload models.

SYNTAX

Syntax

i n t set_ annotated_ transition [ - rise] [ - f all ] [ - min ] [ - max ] [ - delta_on l yl slew_value
pin_ list
float slew_ value
li st pin_list

set a n notated_ tran sit i o n transit i on_ time objects \
[- rise ] \
[- fall ]

\

[-min]

\

[- max ]

\

[ -de l ta_on l y ]

ARGUMENTS

where the arguments have the following meaning:

- rise

transition_ time

Time it takes for a signal to transition from high to low
or vice versa .

objects

Pins and ports on which this transition is set.

[-ris e ]

Transition time is only valid for a rising signal.

[ - fall ]

Indicates that sletv_ value represents the data r i se transition time.

Transition time is only valid for a falling signal.

[-min ]

Only use this transition time during a min-timing
analysis, that is , during hold analysis.

[- ma x )

On ly use this transition time during a max-timing
analysis, that is , during setup analysis.

[ - delta_only ]

Indicates that the transition time is a delta time , that
is, a variation that might be positive or negative.

-fa ll
Indicates that sleh'_value represents the data fall tran sition time.

-min
Indi ca t es tha t s l ew_va l ue rep re s en t s t he mi ni mum t ransi tion time. Use thi s
option only if the design i s in min-max mode (mi n and max operating
conditi ons).
- max
I ndicates that slew_ va l ue represents the maximum trans ition time . Use this
option onl y if the design i s in min - max mode (min and max operating
conditi ons ) .

- delta_only
Indicates tha t slew_ value represen t s a de l ta transition t ime to be added t o
t he transition time c omputed by delay ca l culation.

slew_ va l ue
Spec ifi es the t ransit i on t ime of t he specified pins o r ports, in unit s
consistent ,. , ith the t echno logy library us ed dur i ng opti miz at i on. Fo r exampl e,
if the techn o logy library specifies d e l ay va l u es in nanoseconds, slew_value

must be expr essed i n nanosec onds. I f used wi th t he - delta_only op t ion,
slew_ value can be a negative n~~er.
pin_lis t
Specifie s a l ist of pi ns or por ts to be annotated with the transition time
slew_ value.

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85

set_aocvm_component

set_aocvm_component
Specifies AOCVM r andom or systematic component o n the top-l e vel
dur i ng a n AOCVM ana l ys i s.

NOTE: This command is deprecated . Use the read aocvm Tel command to read the
advanced on-chip variation derating information .

design for use

Configure the derating factors used during advanced on-chip variation analysis.
You can create a derating table by invoking the set_aocvm_component Tel command
multiple times with different values for the depth or distance. Aprisa will do linear
interpolation or extrapolation to calculate derating factors for depths or distances for
which no derating factor is specified.

Syntax

SYNTAX
i n t set_ aocvm_ component
[-ea r ly I -l ate]
[-cell_delay ] [-net_delay]
[ - r andom path_ depth I - systematic pa th_ di stance]
value

in t
fl oat
float
list

path_d epth
path_ distance
value
object_list

ARGUMENTS
-early
Indicates that the componen t will a pply t o del ay arcs that are early derated .

set_aocvm_ componen t \
[- rise I - fa ll] \
[- late I - early ] \
[- cell_ de l ay I - net _ de lay]
- random I - sys tema ti c \
d ep th_ or_ distance ] \
derate_ factor]

\

where the arguments have the following meaning :
[ -r ise I fall]

Controls whether the setting holds for a rising or
falling event. By default, the setting holds for both .

[ -l ate I early]

Controls whether the setting holds for an early path
(signal path for hold analysis, or clock path for setup
analysis) or late path (signal path for setup analysis,
clock path for hold analysis}.

- late
In d icates that the componen t will apply to delay arcs that are late derated.
-cell_delay
Indicates that the componen t will apply to cell a rc delays only .
- n et_de l ay
Indicates that the component wil l apply to nee a rc delays only.
- random path_ depth
Indicates that valu e is the random component to be u sed a t a path d e p t h of
path_ depth . The path_ depth should be an i n tege r value greater than zero .
-systematic path_distance
Indica t es that value is the systematic component to b e used at a path distance
of path_di stance . The patb_distance should be a fl oating-point value greater
than zero.
val u e
Indicates the f r actional quantity of p r o ce ss variation for this component
with re spect to nomina l arc delay to be set on the design . The value should
be a fl oating-point number between 0 and 1 .

[ - cell_delay I - net_delay ]
Controls whether the setting holds for cell or net
delays. By default, both are derated by this setting.
-random

I

- s ystema tic
Controls whether a random or systematic variation is
being described. For systematic variation , the
distance is interpreted as the geographical distance
of the path being derated. For random variations , the
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86

being described . For systematic variation , the
distance is interpreted as the geographical distance
of the path being derated . For random variations , the
distance is interpreted as a logical depth, that is, the
number of gates in the path.
depth_ or_ distance

Integer number that is either a geographical distance
in database units for a systematic variation or a
gate-level distance (that is, number of gates on a
timing path) for a random variation.

dera te_fac t or

A real number, which is the delta by which the cell or
net delays on a path (or both) are derated , that is,
their delays are scaled by a factor (1 +
derate_factoi) .

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87

set_dont_touch

set_dont_touch

Sets the dont_touch attribu t e on cel l s, nets, designs , and l ibr ary cells to prevent
synthesis from replacin g or modifying them d u ring optimization.

Sets the dont_touch attribute on cells and nets. These cells or nets cannot be deleted
during optimization, though they can be physically moved . If you set the dont_touch
attribute on a module, then all its cells and nets inherit the attribute.

SYNTAX

Syntax

st r ing set_dont_touch object_list [value]
li s t
obj ect_ li s t
Boolean value

set dont touch nets_or_cells [0

1]

ARGUMENTS
object_lis t
Specifies a lis t of cells , n ets, designs, or l ibr ary cells o n wh ich to place
the dont_toucb att r ibute.

where nets_or_cells is a collection of nets and cells for which to set the
dont_touch attribute.

va l u e
Spec i fies the val u e with which to set the dont_ touch at t ribu t e. Allowed
val u es are t r ue (the defau l t) or false .

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88

set_min_library
Sets the library to be used for minimum delay analysis

Command: set_min_library <string:max_library>
standard SDC command

The set_ min_ library command is used to relate a minimum conditions library to a
maximum conditions library .

SYNTAX
st r i n g set_min_library
[-min_vers i on mi n_ li brary]
[-none]
ma x_ library
stri n gmi n_libra ry
st r i ngma x_libra r y

option:
-min version string
-none
--get_option arg <l >
--set_option
--get_default arg <l >
--set default ...
--list_options
--load_options
--license
--he l p

name of min library
dissociate min library
get option value
set option value
get default value
set default value
list current option values
load current option values
list required licenses
display command help

ARGUMENTS
-min_version min_library
The library for min analysis . This l ibra r y is not to be used in the link_path.
- none
Dissociate max_library from its min library
max_ library
The library for max analysis . This library shou ld be used in the link_path .

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89

set_s i_delay_analysis
Sets coup ling information on n ets for crosstalk analysis.

SYNTAX
int set_si_delay_analysis
[-reselect rnets]
[-ignore_arrival inets]
[ - exclude]
[-vic t ims vnets]
[-aggressors anets]
[ -rise]
[-fall]
[-min J
[-max ]
l ist
li st
l is t
list

Command: set_si_delay_analysis
internal development utility

option:
-exclude
-victim collection
--get_option arg <l >
-- set_opti on ...
--get_default arg <l >
--set default ...
--li st_options
--load_options
--license
--help

exclude nets as victims or aggressors respect ively
victime nets
get option value
set option value
get default value
set default value
list current option values
load current option values
list required licenses
display command hel p

rnets
inets
vnets
anets

90

90

ARGUMENTS
- reselect rnets
Specif i es a list of nets to be reselected in each it eration, independen t of
reselection criteria. A n et cannot be reselected i f it is fi lt ered out; if
this is attempted, the XTALK -10 6 message comes up du ring the update_ timing.

description:
This command is for AtopTech internal use only.

You cann ot use this option with the -ignore_ arrival , -exclude , -victims , or

-aggressors opt ion s . If it applied on a noncoup led net, it is ignored .
- ignore_arrival inets
Specifies a list oE ne t s t o be an.alyzed as infini te wi ndow. You cannot u se
t his opt ion wi th the -reselect , -exclude , -victims , o r -aggressors options .
-exclu de
Indicat e s that ne ts specified as vnets or anets) ar e to b e excluded from the
crossta lk analysis as victim nets or aggressor nets, r espectively . You cannot
u se th i s option with the - reselect or -ignore_arrival option. When both victims vnets and -aggressors anets are applied, al l cross capacitances

between vnets and aneta are excluded, when vnets are v i ct ims and anets are
aggressors .
-victims vnets
Specifies the l ist of nets on which -exclude information is applied as a
victim. Yo u cannot use th is option with the - reselect or - ignore_ arrival

opt i on. If yo u use the -victims opt i on, you must u se the -exclude opt i on.
When used with t h e -aggressors option , -victims e x cludes the cross
capacitances between the victim ne t s (vnets ) and the aggressor nets (anets).
- aggre ssors anets
The list of nets on which -exclude option information is app l ied as an
a ggr essor . You cannot use th is option wi th the -reselect or -ignore_ arrival

option. If you use the - aggressors opt i on, you mu st use the - exclude option.
W en us ed with the -victims option, -aggressors excludes the c r oss
h
capacitances be t ween the victim net s (vnets) and the aggressor nets (an ets ).
-rise

Excludes a li st o f nets fo r victim rising . If you use the -rise option, you
must use the -exclude option.
-fall
Exc l udes a l ist of n e t s for victim falling . I f you u se the -fal l option, y ou
must use the -exclude option.

-min
Exc l udes a list of nets for min pa th analysis . If you u se the -min option,
you mu st use the -exclude option.

- max
Exc l udes a lis t of nets f or max path a nalysis . If you use the -max op t ion,
you must use the -exclude option.

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91

set_ user_attribute

set_ user_attribute
Sets a user-defined attribute on an object. First, you need to define the attribute, the
value it can accept, and the class of objects on which it can be placed using the
define_user_attribute Tel command .

Sets a us er a ttr ibute to a specif ied value on an object .

SYNTAX

Syntax

string set_user_ attribute
[-c l as s c las s_name]
[ -quiet ]

se t_user_attr ibute objects att_name att_value [-qu iet ]

object_spec
attr_ name
valu e
stringclass_ name
l i st object_spec
str ingat tr_name
st ringvalue

ARGUMENTS

where the arguments have the following meaning :

-class class_name
If object_ spec is a name, this is its c lass . Allowa ble values are design,
port, cell, pin, net, lib, lib_c ell , or lib_pin .

objects

Collection of objects on which this attribute need to
be set.

- quiet

att_name

Name of the attribute that will be set. This attribute
must have been created using the
define_user_attribute Tel command .

att_value

Value of the attribute. This value must be of the type
defined for this attribute.

[- quiet]

Suppress error messages.

Suppresses al l report messages.
object_ spec
Obj ec ts on whi ch to set the attribute. Each element in the list is a
coll ect ion or a pat t ern which is combined with the class_name to find the
objects .
attr_name
Shows the name of t he attribute.
value
Shows the va l ue of the attribute.

92

92

sizeof_collection
Returns t h e number o f ob jec ts i n a c o l lec t i on.

sizeof_collection
Return the number of objects in the specified Aprisa collection. This command has the
same functionality as the standard /length Tel command. However, it is much faster
and uses less memory because Aprisa collections are handled by the ATopTech
database manager directly.
For this reason , it is good practice to use Aprisa collections and Aprisa functions to
operate on these collections .

SYNTAX

Syntax

int sizeof_ collection collection]
col lec tion collection l

siz e of_collection collection

ARGUMENTS
collectionl
Specifies the collection for which to get the number of objects . If the empty
collection (empty string ) is used for the collectionl argumen t, the comma nd
returns 0 .

where collection is a collection of objects .

93

93

sort_ collection

sort_ collection
Sorts a list of objects. The sorting is done by compa ring the object attributes in the
order as listed in the criteria argument. By default, the objects are sorted in ascending
order.

Sorts a c o llection b ased o n one or mor e at tr i bu tes, r e s u l t ing i n a n e w, s or ted
collec ti on. The sort i s ascend i n g by defau l t .

SYNTAX

Syntax

coll e c t ion sort_collection [-des cen di ng ] coll e ction l c rit e ria
co l l e ct i on c o l lectionl
l i s t c r i t e r ia

sort_col l e ct i on obj ec t s {crit e ria_ list} \
[- descend i ng ]

ARGUMENTS

where the arguments have the following meaning :

- descending
Indicates that the collection i s t o be so r ted i n r everse o r de r. By defau l t ,
the sor t proceeds i n ascendi ng o r der .

ob ject s

List of objects to sort.

col l e ctionl
Specifies the collection t o be sorted.

{ cri teria_list}

List of object attributes on which to sort. The
attributes are used in the specified order.

[- d escen d i ng ]

Sort objects in descending order.

cri t eria
Specifies a l ist of one or more application or user - defined attributes to use
as sor t k e ys .

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94

swap_cell

swap_cell
Renames and possibly moves a cell in the netlist hierarchy witho ut chang ing the
layout, that is, without changing the cell , its location, or its connectivity.

Swap s one o r mor e c e ll s wi t h a n e w design o r library cel l .

This operation is mostly used during a meta l-on ly ECO when a placed spare cell , in
the logic hierarchy typically located in the top module , is used to make a logic change
in some module .

SYNTAX

Syntax

i n t swap_ cell c e l l _l i st swap_ i n
swap_ cel l
[ - don t_pr ese r v e _cons t ra i n t s ]
[ - f ile f ile_name]
[ - format fi l e _ format]
l ist c e ll l i s t
stringswap _in
string f i le_name
s t ring file_ format

ARGUMENTS

cel l \
- r ena me name \

where the arguments have the following meaning :

ce l l _ list
Specifies a list of ce l ls to be swapped out .

cell

Cell , that is , library cell instance or module instance
you want to rename .

- rename name

New hierarchical name for the cell. If you use the
hierarchy separator, this cell effectively moves in the
logic hierarchy.

swap_in
Sp e c i f i es the name of the des i g n o r

l i b ra ry cell t o be swa pped i n.

- d on t_preserve_ constrai n ts
Indicates that s wap_ cell is n ot to reapply the curren t design con stra in ts
aft er t he swap .
-fi le file_ name
Spe ci f ies the name o f a fi le that conta i n s a d e s ign t h a t is t o be s wapp e d in .
- f ormat fi l e_format
Specifi e s the format for file_name . Allowed values are db ( the defa u lt ),
Ve ril o g, EDIF, a nd VHDL .

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95

update_timing

update_timing
Invokes the timing simulator on the design . The simulator can run in regular or
incremental mode. A regular analysis ignores all current analysis information . An
incremental simulation uses the results of the previous analysis and the changes
made to the design since the last analysis . By default, AP knows when it can run in
incremental mode and when it needs a full analysis. However, you can force a
complete analysis.

Updates timi ng i nformation on the current de sign .

For MCMM designs, the timing information is updated for all scenarios , unless you
specify a scenario.

SYNTAX

Syntax

string update_timing [-ful l ]

upd ate_ timi ng [-full] \
[- scen ar i o s cenario_name ]

ARGUMENTS

where the arguments have the following meaning :

- full
Indicates that t he entire timing ana l ys i s is to be performed from the
beginn ing . The default is to perform an incrementa l analysis, which updates
only out-of-date i nformation and runs more quick ly.

[-fu ll ]

Run a complete timing analysis. By default, an
incremental timing analysis is performed.

[- scenar i o scenario_ name ]
Name of scenario for which to update the timing
information. By default, the timing information is
updated for all scenarios. If you specify the -scenario
argument, you can only update one scenario at a
time.

96

96

write_parasitics

write_parasitics
Writes parasitic information to a user-specified file. By default, the parasitic data is
written in SPEF format.

Writes out a nnotated parasitics information for the c u rrent design.

SYNTAX

Syntax

Boolean write_parasitics
- fo r mat file_fmt

wri te_parasitics file \
[-use_name_map] \
[-no_c oupling_ cap ] \
[-min] \
[-max ] \
[-fl at ] \
[-f ormat SPEF I DSPF]

file_name

string file_fmt
string file_ name

where the arguments have the following meaning :

ARGUMENTS
file
- format tile_fmt
Specifies the format of the output parasitics fi l e. Curren t ly, the only
allowed values are SPEF (Standard Parasitic Exchange Format) and SBPF
(Synopsys Binary Parasitics Format) .

Name of the output file with parasitic information.

[ - use_ name_ map l

Use a name map when generating an SPEF file . The
name map is part of the SPEF standard : it reduces
the file size by translating names into numeric IDs.

[-no_coupling_cap]

Do not include coupling capacitance

[- min ]

Write parasitic data for the minimum PVT condition ,
that is , the condition that results in minimum parasitic
resistance and capacitance.

[-max ]

Write the parasitic data for the maximum PVT
condition , that is , the condition that results in
maximum parasitic resistance and capacitance.

[-fl at ]

Flatten the netlist, then write parasitic data.

fi le_name
Specifies the name of the output parasitics file.

[-format SPEF

I

DSPF]

Format of the file . The default value is SPEF.

97

97

write sdc

write_sdc
Writes design constraints to a user-specified file using the standard SOC format. SDC
constraints typically contain information on the following:

Writes out a script in Synopsys Design Constraints (SOC) format.

•

Clocks-Clock definitions, clock latency, clock uncertainty, and clock transition
times

•

Ports-Minimum and maximum arrival times of signals on input ports, and
minimum and maximum required arrival times of signals at output ports

•

Signals-Minimum and maximum transition times, maximum allowed output load,

•

Paths-Maximum and minimum allowed delay on signal paths , false paths, and
multi-cycle paths.

These design constraints are used by both construction tools (such as placement/
optimization, routing, and clock-tree synthesis) and analysis tools (such as timing
analysis and the DRC checker). You ca n write all SDC constraints or select types of
design constraints .

SYNTAX
int write_ sdc file_ name [ - ver sion s dc_ versi on]
[-comp r ess compression] [-include categori e s list]

Syntax

s t r ingversi on
stringfile_name
stringcompression
list
categories list

write sdc tile \
[- port_latency ] \
[- port _ latency_only ] \
[- pin_latency_only ] \
[- latency_offset_only ] \
[-balanced_source_latency_only]
[-c ancel_out ] \
[-ext ensi on ] \

ARGUMENTS

where the arguments have the following meaning:

[-nosplit ]

file~name

Specifies the name of the file to which the SDC script is to be wr itten.
- version sdc_ version

Specifies the version of SDC to wri te . Allowed values are 1.2, 1 . 3, 1.4, 1.5,
1.6 and latest (the default).
-compress compression

Specify that the script shoul d be compressed . The only valid value for
compression is gz i p.

\

file

Name of the output file with the SOC constraints.

[ - port_ la tency]

Include the clock latency of each module port of the
current design .

[-por t_la tenc y _ only]

Only write out the clock latencies of the ports .

-include include_list
Write spec i fied command categor i es only . The only val i d value for
include_list is exceptions .
- n osplit
The -nosplit opti on prevents l ine - spl it t ing. This is most useful for doing
diff o n previous scripts, or for pos t -processing the script.

98

[ - l a tency_ offset_ only ]

Only write clock latency offsets. The latency of the
clock at the various clock pins does not vary much
during minor design changes. Instead of
recalculating these latencies after every design
change , they can be written to a file once and read
during successive iterations of the design . Besides
cutting down on run-time, designs typically converge
faster with this approach .

[-ba l anced_ sou rce_l a t ency_ only ]
Identify the clocks that have the longest average
latency, then add source latency constraints to all
other clocks so that their average clock latency
matches that of the longest clock . It does so to
minimize the timing slack on inter-clock paths.
[ -cancel_ ou t]

Set the clock source latency so that it cancels out the
average clock network latency. First, the average
clock arrival time of all clock sink pins is calculated.
Then , the clock source latency is set to the negative
value of that average clock network latency. This
way, the average clock source latency and the
network latency will cancel each other out.

[- extens i on]

Write all SOC constraints including SDC extensions.

99

99

write_sdf

write_sdf
Writes timing data calculated by AP 's timing analyzer to a user-specified file using the
Standard-Delay Format (SDF) format. This information typically includes :

Writes a Standa rd Delay Format (SDF ) back- anno t a tion fi le .

•

Environment and technology conditions for which th ese results are valid

•

Minimum and maximum pin and path delays

•

Setup and hold slacks on inputs of memory elements

•

Timing constraints

•

Skew information

If Sl analysis is enabled during timing analysis, the write_ sdfTcl command merges
both the non-S I net-edge delay and Sl-induced delta delay in the interconnect delay
value written in the SDF file .
If you only want the non-S I net-edge delay in the interconnect delay value in the SDF
file, you must disable Sl analysis before using the update_timing and write_sdfTcl
commands .
You can control the precision with which the results are printed out, and you can filter
out disabled arcs and arcs with invalid delays.

SYNTAX
string write_ sdf [ -version sdf_ version]
[ -no_ cel l _ de l ays]
[ -no_ timing_ checks)
[ -no_ net_ delays ]
[ - i n p ut_po rt_ nets )
[ -output_p ort _ net s)
[ - signi fican t _ digits digits )
[ - enabl ed_ arcs_ only]
[ - no_ interna l _pins)
[ -instance inst_ name)
[ - context sdf_ context )
[-map s df_ map_ file_ lis t)
[- annotated )
[- l eve l s level)
( -no_ e dge)

Syntax
wr it e _ s d f f i le \
[- s i g nifi c ant_di git s number ] \
[-i nc rement] \
[ -enabled _ a r cs_ only ]

100

100

[ - compress compression]
[ -i nc l ude include_ li st]
[ - exclude exclude_ li st]
[ - n o_ negativ e _ de lays)
[ - n o_e dge_merg ing arc_type_ list]

file_name
s tringsd f _version
int digi ts
string inst_name
string f i 1 e_ name
s tringsdf _ context
list sdf_ map_ f il e_ list
in t level
s tr ingcompression

ARGUMENTS

where the arguments have the following meaning:

-version sdt_ version
Selects which SDF version t o use. Supported SDF version s are 1 . 0 , 2 . 1, and
3.0. SDF 2.1 is t he defaul t .

fil e

-no_ cell_ delays
Indicates that no cell delays are be written in the SDF file. By default, all
cell pin-to-pin delays are written to the SDF file. Cell delays include the
load delay of the cell . Following the SDF conventions, only cell input pin

Name of the SDF file to write .

[- s ign ificant_digi ts number )

Number of digits to include after the decimal point.
The default value is 3.

to cell output pin delays are written. In case one cell output is unbuffered,

delays are usually represented in libraries by a delay from an ou tput pin to
another output pin. Because this is not allowed by the SDF convention , the
SDF delay for an unbuffered output is specified from ce l l inputs .

-no_ tirning_checks
Indicates t hat no cell timing checks are to be written in the SDF file. By
default, all cell timing checks (for example, setup, hold , recovery, and
removal) are written to the SDF file.
-no_ net _ delays
Indicates that no net delays are to be written in the SDF file. By default,
all net pin-to-pin delays are written to the SDF file.
- input_port_nets
Indicates that the SDF file is to include delays of nets connected to input
ports of the current design. By default, these delays are not written to the

[-increment ]

Generates an incremental SDF file.

[- enab l ed_arcs_only ]

Skip disabled arcs and other arcs with invalid delays.

NOTE: The following standard arguments to the write_sdfTcl command are not yet
supported :
-no_c e ll_delays, -no_timing_checks, - no_ net_ delays ,
- input_port_ nets , - o utput_port _ nets, - no_ internal_p ins, - no_edge,
- annotated, - no_ negative _ delays, - leve l s , - instance , - context,
-vers ion, -compressi on, -map, -no_ edge_merging

SDF file because the external connectivity information for ports is not
available. If -instance is specified, then all net delays across the instance
boundary leading to a pin inside the ins tance are included ins t ead. The pin
must be be found on any of levels 1 to level of hierarchy if - levels level
is specified .
-output_port_ nets
Indicates that the SDF file is to include delays of nets connected to output
ports of the cu rrent design. By defau lt, these delays are not written to the
SDF file because t h e extern al connectivity in formation for ports is not
available. If -instance is specified, then all net delays across the instance
boundary leading from a pin i n side the instance are included instead. The pin
must be be found on any of levels 1 to level of hierarchy if -levels level
is specified .

101

101

-significant_digits digits
Specifies t he number of digits to the right of t he decimal point that are to
be written in SDF delay triplets. Allowed values are 0-13; the default is 3.
-enabled_arcs_only
Indicates that the SDF file is to contain delays only of enabled timing arcs,
and is not to include delays of currently-disabled timing arcs. By default,
delays of al l timing arcs in the design are written to the SDF file, whether
they are disabled or enabled.
- n o_ internal_p ins

Indicates that the SDF file is no t to include delay timing arcs f rom or to
internal pins . Timing arcs to or from i n ternal pins are expanded into delays
from and to primary input and output of the given cell .
-instance inst_name
Specifies that the SDF file is to be written onl y for the instance named

inst_name. By default, all pin names are relative to the inst_name. However,
if boundary net delays are inc l uded {-input_port_nets or -output_port_ nets )
all pin names are relative to the top design. Note that i n general, if input_port_ nets or -output_port_ nets is specif i ed, boundary nets are written
leaf-to-leaf and do n ot start or end on hierarchical pins. If boundary nets
are required to star t or end on hierarchical pins, refer to the
write_physical_ annotations command.
-context sdf_ context
Specifies the context for writing bus names i n SDF. Valid values are verilog,
vhdl, or none {the default) . In the verilog context, when pin names are
disp layed,

t he l ast two square bracket characters ( '' [" and

11

]

11

)

are not

escaped. In t he vhdl context, t he last two parenthesis character s ( " {" and
")" ) in a pin name are not escaped. In t he default context none, all busde l imiting characters are escaped with a backslash character {"always
escap ed . When used with t he - map option, - context also af fec ts the way names
are printed in mapped SDF fi les . In t h e verilog context, names are printed
in %s[%d] f ormat; in the vhdl context, names are printed in %s{%d) format .
Note: Names are affected only if they are mapped u s ing the
bus{name_ to_ be_ changed) function in the mapping file.
-map sdf_map_ file_ list
Specifies a list of mapping fi les the SDF wr iter is to use when writing out
the SDF file. A mapping file contains a user-specified format for printing
SDF cell delays and constraints. When writing out SDF f or a cell, the SDF
writer takes the user-spec ifi ed mapping, if presen t, to print out SDF for the
ce ll . If no user-specified mapp ing i s present for a cell, the SDF writer
\'Jr ites out SDF in the normal way .
-annotated

Indicates that the SDF is to include only timing arcs that have been annotated
with the read_ sdf , set_annotated_ delay , or set_ annotated_ check commands .
- levels level
Specifies the number of leve ls of hierarchy for which the SDF is written out .
Level 1 means only the top design or inst_ name. Value of N means all levels
of hierarchy, 1 t o N. By default, all levels o f hierarchy are writ ten out .
Note t hat boundary net delays ( -input_port_ nets , - output_port_ nets )
typically have some net arcs from or to pins outs ide the inst_ name . The
location of such outside pins i s not limited by -levels . That i s, the -levels
and - instance options let you choose which boundary arcs are included, but
do not restr ict where the a r cs lead outside of inst_ name.
-no_ edge
Indicates that the generated SDF i s n ot to inc l ude any edges {posedge or
negedge) for both combinational and sequential IOPATHs.

102

102

file_name
Specifie s the name of the SDF file to be wr i tten.
- comp r e ss compr ession

Specifie s a for mat to be used to compress t he file . The on ly va lid val ue for
compres sion is gz i p . By def au l t, files a re not compressed .
-incl ude i ncl ude_ lis t
Specifie s a list of con struc t s to i ncl ude in t he SDF file ; these replace o ne
o r more c on structs f rom the set of default con structs . Allowed va l ues are one
or more of t he follow ing :
• SETOPHOLD , which i ndica t e s t ha t a ll SETUP and HOLD cons t r uc ts a re t o be
replac ed by SETO PHOLD con structs . If a pa i r of s e t up an d hold a rcs are fo und
between the s ame pi n edges , t i ming in fo rmat i on for t he/both a rc / ar cs i s
written i n a single SETUPHOLD construct . If a si ng l e setup / hold arc is fo und
then t he arc will be wr itten i n a si ngle SETUPHOLD c on str uc t with no timing
i n formation for the hold/setup port i on . SETOPHOLD s uppo rt s nega tive val ues
a nd ca n be wr itten onl y fo r version s 2 . 1 a nd 3 . 0 .
• RECREM, which indica t es that al l RECOVERY and REMOVAL cons t ructs are to be
rep laced by RECREM construc t s . If a pair of recovery and removal arcs are
f ound between the same p in edges, timing information for both arcs is written
in a single RECREM construct .I f a si ng le recovery/ removal arc is found then

the arc will be written in a single RECREM construc t wi t h no timing
information f or the removal / recover y portion. RECREM supports negat ive values
and c a n be written only f o r vers ion 3.0 .
-exclude exclude_ list
Specifies a list of timing values of cons t ruc t types t o be either e x cluded

f rom the SDF file i n order to reduce its size, or to be replac ed by another
construct, as in the case of condelse . Al l owed values are one or mor e of the
f ollowing :
• constant_ nets, which indicates that ne ts are to be omitted from the SDF

fi l e if t hey propagate a cons t ant.
• constan t_delay_arcs, wh ich indicates t hat delay arcs are to be omitted from
t h e SDF fi l e if they propagate a constant,
l ogical inputs .

eith er from case analysis or

• default_cel l_delay_arcs, which indicates that all defaul t cel l delay arcs
are t o be omit ted from the SDF file if conditional delay arcs are presen t.
If there are no conditional delay arcs, the default cell delay arcs are
wri t t en to the SDF file .
• wlm_ load_de l ay, which indicates that net delays and cell de l ays calculated
using WLM are to be ornrnit t ed from t he SDF.
• checkpins, when library compiler finds both combina t iona l and sequential
arcs between pins, a checkpin is created so that all arcs are expanded in the
db so t hat a sin gle ar c pinA-pinB is rep l aced by the combina t ion of a positive

una t e arc p inA-pinAcheckpinl with zero delay and an arc pinAcheckpinl -pinB
with the same sense and val ues as t he or i g ina l arc. W
hen this option is set
t he SDF is wr i t t en out as i f a l l checkpins were neve r created .
• no_ condelse, indicates that PrimeTime will not use t he condelse statemen t

to write ou t defau lt iopaths. By defau l t PrirneTirne will replace default
iop aths with t h e condelse construct . Spec ifying this option will result the
condelse statement being replaced by a default iopath . This option should be
used for generating simu l ator compa t ibl e SDF.
- no_negati ve_delays
Specifies t hat PrirneTime will generate an sdf file wi thout negative delays .
Any del ay values which are negative prior to writing the sdf file wi l l be

103

103

represented as a zero in the sdf file. This option should be used when the
sdf file is intended for simulator use. Using this option leads to inaccruate
delay estimation in PrimeTime, so the user should use caution with this
option.
-no_ edge_ rnerging

Specifies a list of arc types which are not to be compressed in the SDF file
through edge merging. Allowed values are one or more of the following

104

104

write_spice_deck
W
rites to a SPICE deck the paths or ar cs generated by
get_ timing_ arcs.

SYNTAX
in t write_ spice_deck
[-a l ign_ aggressors]
[-analysi s _ type type ]
[ - c _ effectiv e_ l oad ]
[-full_c l ock_cone]
[-ground_coupling_capac itors]
[ - header header_ file_ name]
[-initial_de lay delay ]
[-logic_one_narne vlname ]
[ - l ogic_ one_ vo ltage vl ]
[-logi c_zero_narne vOname ]
[-logic_zero_voltage vO ]
[-margin margin_value ]
[-rninirnurn_transition_ tirne trans ]
[-no_clock_ tree]
[ - output file_ name]
[-pre_driver]
[- sub_circuit_file spice_sub_circuit_file]
[-s weep_ size number_o f_points]
[-sweep_step num]
[-tirne_precision precision ]
[- tran s i ent_ s i ze tran_s ize]
[-t ransient_ s t ep tran_ step ]
[-use_probe]
[- user_rneasures user_ measure_list ]
[-sarnp l e_size number_of_samples]

get _ t~ing_paths

or

Command: write_spice <db:object_list>
internal development utility

option:
-min
-max
--get_option arg<l>
--set_option
--get_default arg<l>
--set_default ...
--list_options
--load_options
--license
--help

min condition
max condition
get option value
set option value
get default value
set default value
list current option values
load current option values
list required licenses
display command help

paths_ arcs_ list
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stringheader_file_name
float delay
stringvlname
float vl
stringvOname
float vO
float margin_value
float trans
stringpaths
stringfile_name
s tring spice_ sub_circ uit_fil e
unsignednumber_of_points
float num
unsignedprecision
f l oat tran_size
floa t tran_step
int
number_of_samples

ARGUMENTS
-align_aggressors
Apply only to a net t iming arc . Indicates that t he relative switching time
of the active aggressors of the net arc compute by the cross ta l k de lay or
noise bump are wr it ten out the correspondi ng PWL statement. It is effect i ve
i f the ne t has a coupled RC network annotated. The v ictim wi ll switch after
the initial_ delay and the active aggressors will switch relative to that.
Spice uses t he ca l cul at i on eng ine t o get the worst case a lignment, and uses
simi ll ar setup so tha t alignment stays valid . i.e. the fi ltered aggressors
are not considered as effective during calcula ti on so they are coupling
capaci t ance is grounded.

description:
This command is for AtopTech internal use only

-ana lysis_type type
Specifies the type of cross talk/noise analysis for the spice deck generated.
The possible crosstalk delay types are max~rise 1 max_ fall min_rise and
min_ fall. The possible noise types are above_ high , above_ low , below_ high and
below_low. This option has no e ff ect on t he timing path . The defaul t value
is max_ rise for a t iming arc.
1

-c_effective_load
Indica tes that the effective capacitors computed by the PrimeT i me during the
delay calculation are connected to some driver pi ns in the SPICE deck . These
driver pins are not driving any victim nets and aggressor nets.
- fu l l _ clock_ cone
Indicates that the ful l fan -in cone of the c l ock tree is to be genera t ed . By
defaul t, i f the clock is propagated , a singl e cha in o f c l ock tree gates is
generated ; otherwise, a piecewise linear waveform (PWL) is connected to the
c lock pin. Note that using t his opt i on could generate a very large spi ce deck,
because write_spice_ deck must determine a l l voltage lev els or waveforms of
every input port of these input cones. An error message is issued if -

no_clock_tree is also set .

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106

-ground_coupling_capacitors
Indicates that the aggressors of the timing path or timing arc are not
written. The associated coupling capacitors are grounded with the factor one.
-header header_file_name
Specifi es the path to the user header fi l e whose content is copied to the
spice deck generated. User can use this file to identify the spice deck, to
include the library file (s), or to copy text to spice deck for any o t her
purposes to f acili tate t he sp i ce run.
-initial_delay delay
Specifies the ini t ial de l ay , in lib rary un i t, added to al l PWL statements.
The de f ault value i s the longest clock per i od, or 1.0 l ibrary unit for
asynchronous designs. Note that setting delay to zero makes generating a ramp
difficult and is not recommended.
-logic_one_narne v1name

Specifies name of the default upper rail voltage source.
-logic_one_voltage vl
Specifies the upper rail of the vol t age swi ng of the gate input pins. This

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is used in t he PWL and power rail vdd generated by the command . The default
value i s ma in library vol tage . This option will be effecti ve on l y if t he
variab l e l ibrary_th resholds_use_main_lib is set to TRUE.
-logic_ zero_name vOname
Speci fies name of the default l ower rail vo l tage source.
- logic_zero_voltage v O
Specifies the lower rail of vo l tage swing of the gate input pins. Th is is
used in the PW and t he ground vo l tage vss generated by t he command . The
L
default val ue is 0 volts . This option wi l l be e ffect ive only if t he variable
library_ thresholds_use_main_lib i s set to TRUE.
-margin margin_value
Specifies t he va lue in time to be reduced from the swit ching time o f the data
pin of the l unching sequen t ia l cell of the timing path or timing arc.
-minimum_transition_time trans
Spe c i fies the min imum transition time in nanoseconds , to be used in al l
generated PWL i f t he t r ansition time computed by PrimeTime is s mal l er than
trans. The de faul t value i s 0.001 n s; trans ition times l ess than 0.000 1 n s
are n ot recommended.
-no_ clock_tree
Indi cates no clock path is traced . A c l ock pul s e s t atement is connec t ed
direct l y t o t h e clock pin of a sequential gate. An error i s issued if the ful l_c l ock_cone is set. If the delay type of t he t i ming path i s max (max_r i se
or max_ fa ll) the pul se statement of the lunching cl ock is computed from the
l ate edges of the clock arriva l wi ndows and t he maximum s l ew of the c l ock
pin. The pul se statement of t he capturing clock is compu ted fr om the earl y
edge of the clock arrival windows and the minimum slew . For t he min (min_ rise
or min_fa l l ) delay type, the ear ly edges are u sed for t he lunching clock and
the l ate edges are used f or the capturing c l ock .
- output name
If -sample_size opti on is not used , this op tion specifies the na me o f the
SPICE deck f i le to be writ t en f or the f irst t i ming pa t h. SPICE deck files
related to subsequent timing paths are also based on t hi s name . This is
required. If t he -sample_size option is used, then t his op ti on specif ies the
name of the directory to be created for writing the sampled spice deck f il es.
-pre_d river
The PWL vol tage s ources are r eplced by the equ i v e l ent synopsys pre-driver.
The pr e - driver is a smooth wavefrom which is more realas ti c t ha n the ramp.
Use t his op t ion only if t he library is characteri zed by the s tandard synopsys
pre - dr i ver.
-sub_ c i rcu i t _fi le spice_ sub_ circuit_file
Spec i fies t he path to the fi le that contain s all the SP ICE . subckt d efini tions
of all gates in the timing paths. By defaul t, a subcircuit cal l uses the pin
order in the Synops ys . l ib f ile. Use this option if the SPICE subci rcuit has
a different pin order from that of the .lib fi le.
-sweep_ size number_ o f_points
Used in conjunction with the - a li gn_ aggressors option. Indi cates the number

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of sweep point generated for each active aggressors of the ne t arc. The number

o f simulation will increase geometrically with the number of the active
aggressor
-sweep_s tep num

Used in conjunction with the -align_ aggressors opt i on and -sweep_size.
Indicates the maximum time interval between sweep points generated for each
active aggressors of the net arc . The unit is in nanosecond. The default is

O. lns.
-time_preci s ion precision
Speci f ies the number of prec 1 s1on digits for t ime in the PWL generated. The

default va lue is 6 . The range is from 1 to 20.
-trans1ent size tran

s~ze

Specifies the total t ransient time used in the SPICE .tran sta t ement. The
unit is in the largest clock period. The defau l t is 4 c l ock periods. If there
is no clock in the design, 10ns is used.
-transient_step tran_size

Specifies the transient step size used in the SPI CE . tran statement . The unit
is in nano second . The defaul t is O. OO ln s.
-use_probe

Use .probe statement to output t he node vo ltage instead of .prin t sta t ement.
-user_measures user_measure_ list

Us e this option to add you'r own measures instead of the ones genera t ed by
the spice deck automatically . The empty user_measure_list could be used as a
way to remove all auto generated .measure and . print from spice deck .
-sample_si z e

Spec if ies the number of spice deck f iles t hat have to be created whi l e
performing variation-aware timing analysis . This option takes the name of the
directory via -o~tp~t option and crea t es multiple spice deck fi l es that
correspond to var i ous samples o f t he variations defined.
paths_arcs_ list
Spec if ies the col l ection of timing paths or timing arcs that the ir circuits
are writ t en o ut.

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case_analysis_sequential_propagation

case_analysis_sequential_propagation

Determines whether case analysis is propagated across sequentia l cells .

Persistent parameter that controls whether Aprisa propagates constants specified for
a case analysis across sequential cells .

TYPE
Syntax:
fistringfP

case_ a n alysis _ sequential_propagation true

DEFAULT

I

false

where the values have the following meaning :

never

true

Propagate conditions on conditional arcs across
sequential cells.

false

Do not propagate conditions on conditional arcs
across sequential cells.

DESCRIPTION
Determines
va lue s are
propagated
propagated

whether case a nalysis is propaga ted across sequential cells . Allowed
never (the default) or always. When set t o never, case analysis is not
across the sequentia l cells. When set to always , case a nalysis is
across the sequent ia l cells.

The default value is true.

To determine the current value of this variable , type printvar
case_ analysis_ sequential_propagation or echo $case_ analysis_ sequentia1_propagation .

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collection_result_display_limit
Sets t he maximum number of objects that can be displayed by any command that
displays a col lection.

collection_result_display_limit
Runtime parameter that specifies the maximum number of objects in a collection to
display in the shell.

TYPE

Syntax:
int

collection_result_displ ay_limit integer
DEFAULT
100

where integer is the number of objects in the collection to display in the shell .
The default value is 100.

DESCRIPTION
Thi s variable sets the ma ximum number of o b j ects tha t can be displayed by any
command that d isplays a collection . The default is 100 .
When a command ( f or exampl e , add_ to_ collection ) is i ssued at t he command prompt , its
res u lt is implici t ly queried, as thou gh query_objects h ad been called . You can limit
t h e numbe r of objec ts displayed by setting t his variable to an appropria te integer .
A val u e o f -1 display s al l obj ects; a value o f 0 displ ays the co llec t ion handle id
instead o f t he names of any objects in the collection .
To d etermine the current value of this v ar iable , use printvar
collection_ result _display_ limit .

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2

default_oc_per_lib

default_oc_per_lib

Enables the use o f a default operating condi t ion per i ndividual li brary .

Persistent parameter that controls whether Aprisa uses for each library the default
operating condition as set in the library as opposed to using one operating condition
for all cells of all libraries.

TYPE
Boolean

DEFAULT
t r ue

DESCRIPTION
Enables t he us e of a de f a ul t opera t ing cond ition per i ndividual li brary . When the
default_oc_per_ lib variabl e i s s e t to true ( the default value) , each cell that does
not have a n explicitly-set oper ating condi tion (on the cell itself, on any of its
paren t cells , or on the design ) is assign ed the default operati ng condit i on of the
li brary to wh ic h the cel l be l ongs . When set to f als e all cells t hat do not ha ve any
expl icitly-set operating condition are assigned the default operating condi tion of
the mai n lib rary (the first l ibrary in the link_path) .

Syntax:
default_oc_per_l ib true I false
where the values have the following meaning :

true

Use the default operating condition as specified in a
library for all instances from cells in that library.

false

Use the same default operating condition for all
instances used in the design. The default operating
condition is the operating condition from the first
library listed in the link path .

The default value is false .
The recommended flow is to explicitly set operating cond ition s on t he design or on
each hierarchical block that is power ed by t he same voltage {a lso called t he voltage
is land ). Thi s va riabl e i s mainly for obta i ni ng backward compa tibility f or th e corn e r
case of use of de f a u l t conditions in releases prior t o 20 02 . 09 .
To dete rmi ne t he current value of this variable , use printvar default_oc_per_lib.

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disable_case_analysis
Specif i es whether case analysis is disabled .

TYPE

disable_case_analysis
Persistent parameter that controls whether the timing analyzer works in case analysis
mode. In this mode, you specify specific constant values and signal transitions to
selected inputs to force the circuit in a certa in state .

Boolean

Syntax:
DEFAULT

d i sabl e _ case_ analysis true

I

false

false

where the values have the following meaning:
DESCRIPTION
When false (the default ), constant propagation is performed i n the design from pins
either that are tied to a logic constant value , or for which a case_analysis comma nd
is specified . For example, a typical design has several pins set to a constan t l ogic
value . By default, this constant value propagates t hrough the logic to which it
connects . When the variable disable_case_analysis is true, case a nalysis and
constant propagation are not performed.

true

Ignore all case-analysis settings.

false

Perform a case analysis using all case-analysis
settings.

The default value is false .

To de t ermi ne the c u rrent val ue of this variable , use printvar disable_case_analysis .

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rc_degrade_ min_slew_when_rd_less_than_rnet
Enables or disables the use of slew degradation in min a nalysis mode during the RC009 condition .

rc_degrade_mi n_slew_ when_rd_less_than_rnet
Persistent parameter that controls how the delay is calculated for interconnects with
high resistance .

TYPE
Boolean

DEFAULT
fa l se

DESCRIPTION
When false (the default), PrimeTime does not use s l ew degradat i on through RC
networks in min ana l ysis mode during the RC- 009 condition . When true, PrimeTime uses
slew degradation during the RC-009 condition. This variable is effective only if the
rc _ adjust_ rd_wben_ less_ than_ rnet variabl e is true .
The "RC - 009 condition" means a condition in which PrimeTime checks the li braryder ived drive resistance, and if it is less than the dynamic RC network impeda nc e to
ground by a n amount equa l to or grea t er than the value of the
ro _rd_ less_ than_ rnet _threshold variable, PrimeTirne adjusts the drive resistance
using an empirical fo r mula to improve accuracy, and is sues the RC-009 message. In
case this i mproved accuracy is not sufficient, PrimeTime provides extra pessimism by
not using s l ew degradation in min analysis mode; however, superfluous mi n delay
violat ions could occur as a side effect. You can keep s l e w degradation on in mi n
ana l ysis mode after you have qualified the RC-009 methodology for your accuracy
requirements, by setting this variable to t rue.

By default, for high-resistive nets, AP uses a different approach for calculating
interconnect delays compared to the Arnoldi method used for regular nets .
This is done to ensure sufficient pessimism. You can force Aprisa to use the same
approach as for regular nets, resu lting in a more accurate, but not guaranteed
worst-case result. You may want to use this parameter to avoid false hold time
violations.
Syntax:

rc_degrade_rn in_ s l ew_when_ rd_ less_ than_ rnet true

false

where the values have the following meaning:

true

Revert to the default interconnect delay calculation if
the algorithm for high-resistive nets is pessimistic.

false

Always use the special algorithm for high-resistive
nets.

rc _ degrade_min_ slew_when_ rd_ less_ than_ rnet is one of a set of four variables

re l evan t to the RC-009 condi tion. The other three are as follows :

The default value is false .

• rc_ adjust_ rd_wben_ less_ than_ rnet enables or disab les t h e RC - 009 condition; the
default is true. When this vari ab l e is set to false, PrimeTime does not check the
drive r esistance, and the values of the other related variabl es do n ot mat ter .

• rc_ filter_ rd_ less_ than_ rnet de t ermines whether the RC - 009 message is issued only
when a ne twork delay is greater than the correspond i ng dr iver t r ans i t ion time. The
default is true . To receive RC - 009 messages every time PrimeTime overrides the drive
resistance, set this variabl e to false. This variab l e has no effect i f
rc_adjuat_rd_wben_leas_than_rnet is false .

• rc_rd_ less_ than_ rnet_ threshold specifies the thresho l d beyond which Pr irneTime
overrides the library-derived drive resistance with an empirica l fo rmu l a. The
defau lt is 0.45 ohms. You can override this default by setting the variable to
another value . This varia ble has no effect if rc_ adjust_ rd_ when_ less _ than_ rnet is

fa l se .
Note: If rc_ degrade_ slew_ when_ rd_ less_ than_ rnet is false while
rc_filter_rd_less_than_rnet is t rue, the RC-009 message is not issued .
For more information, see the manual page of the RC-009 warning message.
To determine the current val ue of this variable , type printvar
rc_ degrade_ min_ slew_ when_ rd_ less_ than_ rnet or echo
$rc_degrade_ min_ slew_when_ rd_ less_ than_ rnet .

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rc_ driver_model_mode
Specifies which driver model type to use for RC delay calculation .

TYPE
str i ng

rc driver_model mode
Persistent parameter that controls whether the basic or the advanced CCS model is
used for output pins driving nets.
Syntax:
rc_ driver_ rnodel_ rnode basic

I

advanced

DEFAULT
advanced

DESCRIPTION
Pr imeTime supports two types of dri ver models for RC delay calculation, b asic and
adva nced . The basic model is derived from the conventional delay a nd slew library
schema , while the advanced model is derived f r om a new schema. The advanced mod el
has many advantages , one of which i s the sol u tion to the problem described by the
RC - 009 warning message. The advanced dr i ver model is part of the Synopsys Composite
Current - Source (CCS) mode l.
When the shell variab le rc_ driver_model_moae is set to basi c, RC delay calculation
wi ll always use driver models derived from t he conventional de lay and slew schema
present i n design libraries . When set to advanced, RC delay calculation will use t h e
advan ced driver model if data for it is pre sent. The report_delay_calculation
command used on a cell arc will sho\v the message "Advanced driver-modeling used " as
appropriate.

where the values have the following meaning:

basic

Use the simplified ccs model on selected net drivers
if the ccsd_auto_switch parameter is enabled ;
Otherwise, use no CCS model.

advanced

Use the advanced CCS model on all net drivers ,
regardless of the ccsd_auto_switch parameter
setting .

The default value is basic.

To determine the current value of this variable, enter the following command:
pt_shell printvar rc_ driver_model_mode

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