Synopsys, Inc. v. Atoptech, Inc
Filing
929
PERMANENT INJUNCTION AND DISPOSITION ORDER. Signed by Judge Maxine M. Chesney on 12/19/16. (Attachments: # 1 Appendix Part One, # 2 Appendix Part Two, # 3 Appendix Part Three, # 4 Appendix Part Four, # 5 Appendix Part Five) (mmclc2, COURT STAFF) (Filed on 12/19/2016)
APPENDIX
Part Four
Trial Exhibit 1441, pages 71-190
-rise_to to_objecc
Similar to the -to option, but applies to only rising delays at the
constrai ned pin. Y m
ou ust specify one of -to, - rise_to , or - f al l _to .
-fall_to co_objecc
Similar to the -to option, but applies to only falli ng delays at the
constrai ned pin. You m
ust specify one of - to , -ri se_to , or -fall_to .
-secup
Indicates that only the setup data check is to be removed . If neither -setup
nor -hold is spec ified, both setup and hold checks are removed.
- hold
Indicates that only the hold data check is to be removed. If neither - setup
nor -hold is specified, both setup and hol d checks are removed.
-clock clock_object
Indicates tha t the data check for the specified clock at the related pin is
to b e r emoved. Thi s op t ion applies on ly i f a pr e viou s set_ data_ check command
used the -clock option to specify the same clock; otherwise, this option is
ignored .
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remove_disable_clock_gating_check
Restores c l ock gat i ng checks previously disabl ed by set _ disable_ clock_ gating_ check ,
for specified cells and p i ns.
SYNTAX
str ing remove_disable_clock_gating_check obj e ct_ li s t
l is t obj ect_ li s t
ARGUMENTS
object_ list
Specif i es a l i st o f ce l ls a nd pins f or whom previo usly-dis abl ed c l ock g ating
checks are to be restored.
Command: remove_disable_clock_gating_check
standard SOC command
option:
- -license
- - help
list required licenses
display command help
description:
This command is the same as standard SOC command.
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remove_disable_timing
Command: remove_disable_timing
Remove set_disable_timing constraints.
Enables t he previ ously disabled timing arcs.
SYNTAX
st r i n g remove_ disable_ timing
[-f r om from_p in_name ]
[ - to to_pin_name]
object_ list
string£rom_pin_name
str ingt o_pin_name
li st object_ list
option:
-all
(require)
--get_option arg
--set_option
--get_default arg
--set_default ...
--system_default
--list_options
--load_options
--license
--help
remove all disable timing
get option value
set option value
get default value
set default value
use system default values
list current option values
load current option values
list required licenses
display command help
ARGUMENTS
- from from_pin_name
- to
to__pin~ name
Specifies that only the arcs between these two pin s on the specified cell or
library cell be disabled.
description:
Remove SOC set_disable_timing constraints.
Right now, provide one required option -all to
remove all disable timing constraints.
ob j ec t~li s t
Specifies a list of cel l s, pins , l i brary cells, l ibrary cell pins, or ports .
The object_list must contain only cell s or library ce lls (i f -from and -to
are specifi ed) .
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73
remove_driving_cell
remove_driving_cell
Removes port d riv i ng cel l i n f ormation.
Removes driving cell constraints that were set using the set_ driving_ cell Tel command _CLJrrently, this
command removes all driving cell constraints on the specified pins or ports.
SYNTAX
Syntax
string remove_ driving_ cell [-rise ]
[- fall ]
[-min ]
[ -max]
[ -c lock clock_name]
[ - c l ock_fall]
port_list
remo v e _ d r i ving_c ell p or t _li st \
[ - r ise] \
[-fall ] \
[ -min] \
[ - max ] \
[ - c l ock_fa ll ] \
[- c l o ck clocks ]
stringclock_name
list port_list
ARGUMENTS
- ri se
where the arguments have the followi ng meaning ;
Names of the ports for which to remove the driving cell constraints.
Not supported yet.
[-fall ]
- fall
port_ li s t
[-rise]
Removes rise driving cell information .
Not supported yet.
[ - min ]
Not supported yet.
[ - max]
Not supported yet.
[- c l oc k_fa ll ]
Not supported yet.
[ - clock cloc ks]
Not supported yet.
Removes fall driving cell informati o n .
-mi n
Removes min driving cell information.
-max
Removes max driving cell information.
- clock clock_name
Remove s t he d riving c ell set re l ative to t he specified c l ock .
-clock_ f al l
Removes the d riv i ng cell re l ative to the falling edge of the clock . The
default i s the rising edge_
port_l ist
Provides a lis t of input or output port s .
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remove from collection
remove_from_collection
Re move s o bj e c ts from a co ll ection,
collection remains unchanged.
result i ng in a n e w col lection. The ba se
Creates a new collection , starting from a base collection and removing objects that are part of a
subtraction set. Neither the base collection not the subtraction set are modified.
SYNTAX
Syntax
collec t ion remove_from_collection
r emove f r om c ol l ection ba se coll e ction sub tract collection
base_collection
xlco l lection base_ co11ec tion
list
object_ spec
ARGUMENTS
base_ col lection
Specifies the base col l ection to be cop i ed to the resu l t co l lection . Objects
matching object_ spec are removed f rom the result col l ection.
o b j ect_spec
Spe cifi es a list of named objects o r collections to remove. The object class
of each element in th is l ist mu st be the same as in the base collection. If
t he name matches an existi n g collection, the c o llect ion is used. Othe rw ise,
t h e objec t s are searched for in the database using the ob j ect class of the
ba se collection .
where the arguments have the following meaning :
b a s e colle c t ion
s ub t r a ct
c o~~ec tio n
All objects from the base collection that are not in the subtract
collection are returned.
Objects that are not returned .
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remove_input_delay
remove_input_delay
Remove s i n p u t delay informa tion fr om po r ts or pi n s.
Removes input delay on the ports or the pins that was set using the set_ input_ delay Tel command.
Currently, this command removes all input delay information from the specified pins or ports.
SYNTAX
Syntax
string remove_ input_ delay [- clock clock_ name ] [-clock_ fa l l ] [- l evel_ sensitive] [rise] [-fall] [-max ] [-min] port_pin_ list
l i st clock_name
l i st port_pin_list
remove_input_ delay port_pin_list \
[-rise] \
[-fall] \
[-mi n] \
[ - ma x ] \
[-clo ck_fall]
\
[-clock clocks] \
[-level sensitive]
ARGUMENTS
- clock clock_name
Relative clock; '' fo r no clock . Use this option to remove only input delay
relative to one clock.
where the arguments have the following meaning:
port_pin_list
Names of the ports and pins for which to remove the input delays.
[-rise]
Not supported yet.
- clock_ fall
De l ay is relative to fal l ing edge of c l ock.
[-fall]
Not supported yet.
-level_ sensitive
Delay is from level-sensitive l atch .
[-min ]
Not supported yet.
-rise
[-max ]
Not supported yet.
[-clock_fall ]
Not supported yet.
[-clock clocks]
Not supported yet.
[-level sensitive]
Not supported yet.
Removes rising input delay.
- fall
Removes falli ng inpu t delay.
- max
Removes max imum i nput delay.
- min
Removes minimum i nput delay.
port_pin_ list
Specifies a list of ports and pin s.
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remove lib
Removes one or more l ibraries f rom memory.
remove_library
First, optionally, detaches unused libraries from projects in memory and then removes libraries that are
not attached to any project in memory.
A library is considered used by a project if at least one of its library cells is referenced by at least one
cell instance in the project, or if the project uses any of its timing data such as SDC, min/max, noise ,
leakage , or CSS information.
A library is considered attached to a project if it is listed in the link path of the project, as set by the
set_link_path Tel command or fink_path Tel variable. A used library is always attached , but an attached
library may or may not be used.
You control whether this command removes unused or detached libraries.
Use caution when removing attached libraries. A currently unused library may be needed later for
design optimizations.
You can remove any library or only remove scaling libraries.
Note that, before removing any library, the remove_library Tel command first loads all pending delay
load libraries. In case of a loading error for any delay loaded library operation, the remove_library Tel
command fails and issues the following error message:
ERROR: No lib r a ri es we r e re moved , because of l oad erro r s. Check l og . . .
All library load errors must be resolved before any libraries can be removed _This approa ch ensures
that all libraries are accounted for before removing any. Otherwise, a wrong library. for example a
library needed for another scenario, may get removed .
SYNTAX
Syntax
s tr i ng remove_ lib -all li b rar ies
l ist libr aries
remo ve_library [object list] \
[-all_ unused] \
[-unused_scaling_lib_groups] \
[-ignore_link_path_reference]
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ARGUMENTS
- a ll
Remove s a l l l ibr a r i e s.
l ibr a r ies
Pr ovides a l ist of libraries to remove .
where the arguments have the following meaning:
[ object_list ]
List of libraries to remove from memory provided
they are not attached to any project.
[ - a ll_ unu sed ]
Remove all libraries from memory that are not
attached to any project.
[-unu sed_sca li ng_ lib_gr o ups ]
Only remove all scaling library groups that are
currently not used. Typically, you use this
argument after you deleted scenarios to remove
scaling libraries that were only used in those
deleted scenarios.
[- i gno r e _ li n k_ path_r e f erenc e]
Detach the specified libraries from projects in
which they are not used , that is, remove them from
the link path of the project.
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remove_max_area
Command: remove_max_area
standard SOC command
Removes the max_area att r i bute f r om t h e c urren t desi g n.
SYNTAX
i n t remove_max area
ARGUMENTS
None.
option:
-- license
- -help
list required licenses
display command help
description:
This command is the same as standard SOC command.
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remove_max_ capacitance
remove_max_capacitance
Removes max i mum capa ci t anc e l i mits f r om po r ts o r des ign s.
Removes the max_ capacitance constraint from the specified objects. which can be ports , pins, clocks,
or designs.
This command is the standard
soc command .
SYNTAX
Syntax
s tring remove_max_ capacitance objec t _ lis t
l ist
ob j e ct_ li st
remove_max_capacitance objects
ARGUMENTS
where the argument has the following meaning:
ob j ec t _ li st
Provides a list of por ts or designs f rom whi ch t o r emove maxi mum capacitance
limi t s.
objects
List of objects from which to remove a max_capacitance
constraint. The objects can be ports, pins, clocks, or
designs .
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remove max fanout
remove max fanout
Removes maximum f anou t limits fr om p orts or desi gns .
Removes the max_fanout constraint from the specified objects, which can be ports, pins, clocks, or
designs.
This command is a standard SOC command.
SYNTAX
Syntax
string remove_max_ fanout object_ list
list object_ lis t
remove max fanout objects
ARGUMENTS
where the argument has the following meaning:
ob j ec t _l is t
Lists the ports or designs from wh i ch t o remove maximum f anout limits.
ob j ects
List of objects from which to remove a max_ fanout
constraint. The objects can be ports, pins, clocks, or
designs.
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remove_max_transition
remove- max- transition
Removes max i mum t ransit i on l imi ts f rom por t s , c l ocks or designs .
Removes the max_transition constraint from the specified objects, which can be ports, pins, clocks, or
designs.
This command is the standard
soc command.
SYNTAX
Syntax
string remove_max_ transition object_ list
l is t object_l i st
rerno v e _ max_transition objects
ARGUMENTS
where the argument has the following meaning:
obj ect_ list
Lists the ports, c l ocks or designs from which to remove maximum transition
limi t s.
objects
List of objects from which to remove a max_transition
constraint. The objects can be ports, pins, clocks, or
designs.
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remove_multi_scenario_design
Removes all mul t i sc enario objects f rom memory a nd r emoves f r om disk a l l images
generated by mu lt i scenario a nalysis .
SYNTAX
bool e an remove_multi_scenario_design
Command: remove_multi_scenario_design
Don't support.
option:
--license
--help
list requi red licenses
display command help
description:
Don't support.
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remove_output_delay
remove_output_delay
Removes output d elay from output port s or pins.
Removes output delay on ports or pins that was set using the set_output_delay Tel command.
Currently, this command removes all output delay information from the specified pins or ports.
SYNTAX
str ing remove_ output_ delay
(-clock clock_ name]
[-clock_ fall]
[ - lev el _ sensitive ]
[-rise]
( -fall ]
[-max]
( - min]
port_pin_ list
Syntax
remove_output_delay port_pin_list \
( -rise] \
[ -fall] \
[ -min] \
[ -max] \
[ -clo ck_fa l l ] \
[- c l ock clocks] \
[ -level sensitive]
str ingclock_name
li st port_pin_l ist
ARGUMENTS
- clock clock_name
Relative clock; {" " } for input delay relative to no clock .
where the arguments have the following meaning:
por t_pin_ l ist
Names of the ports and pins on which to remove the output delays.
Removes the delay re lative t o falling edge o f clock. If you spec ify c lock_ na.me
wi thout -clock_ fall , the delay relative to rising edge of t h e clock is
[- rise ]
Not supported yet.
removed.
(- fall ]
Not supported yet.
[-min]
Not supported yet.
[ - max]
Not supported yet .
[ -clock_ fall]
Not supported yet.
[ - c l ock c l ocks]
Not supported yet.
[ - level sensitive ]
Not supported yet.
- c lo ck_fall
-level
sens~tive
Removes l evel-sens itive output delay .
- r ise
Removes rising output delay .
-fal l
Removes fa lli ng ou t put de l ay.
-max
Removes maximum ou tpu t d elay .
- min
Removes minimum output delay.
port_pin_ list
Specifies a list of ports and pins. Each element in the list is either a
col lection of ports or pins, or a pattern wh i ch ma tches ports or pins on the
cur rent desi gn.
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remove_ propagated_clock
Removes a p r opagated clock specifi cat i on .
remove_propagated_clock
Removes from objects the propagated clock attribute that was set using the set_propagated_cfock Tel
command . The objects can be a combination of clocks, pins, and ports.
SYNTAX
Syntax
string remove_propagated_ clock object_ list
l i st object_ list
remove_propagated_clock object_list
where object_list is a collection of clocks, pins, or ports.
ARGUMENTS
object_ l i s t
Li sts clocks , ports, or p l ns .
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remove_rail_voltage
Removes power r ail vo l tage that was set by the &et_ rail_ voltage command on c el l s .
remove_rail_voltage
Removes all rail voltage settings for all or selected scenarios. When you disable automatic updating of
the supply voltages by the power network analyzer, that is, you set ta parameter
enab/e_pna_rail__voltage to false, and you manually set supply voltages using the set_rail__vo/tage Tel
command , then these settings are saved in the design database and can only be modified by another
set_rail_vo/tage Tel command or removed by the remove_rail_voltage Tel command.
SYNTAX
Syntax
in t remove_ rail_ voltage cell_list
remove_rail_voltage \
- al l \
[ -scena r i o scenario_name ]
list
cell_ li st
ARGUMENTS
cell _list
where the arguments have the following meaning :
- al l
Remove rail voltage overrides on all cells. For now,
this argument is mandatory. In the future , you will have
the option to specify a list of cells.
[- scenario scenario_name]
The scenario for which to remove the rail voltage
overrides. This argument is required for a MCMM
design.
Specifies a list of ce l ls from which to remove rail voltages.
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remove scenario
Removes a scenario in mult i scenario ana l ysis .
remove scenario
Removes scenario(s) that were created using the create_scenario Tel command . A scenario is a set of
external and process conditions under which the design needs to be analyzed.
SYNTAX
Syntax
remove_scenario scenario list
remove scenario
ARGUMENTS
where scenario_name is the name ofthe scenario you want to remove.
scenario name [scenario name] ...
scenario list
A l ist of unique strings used to i dentify each scena rl o.
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remove_si_noise_analysis
Command: remove_si_noise_analysis
remove the effect of set_si_noise_analysis command
Removes th e e ff e ct o f t he set_si_noise_analysis c ommand.
SYNTAX
int remove_si_noise_analysis
(-i gnore_a r r i val ine ts ]
[-vi c ti ms vn e t s ]
[ - a ggresso r s anet s)
[-a bove)
(- bel ow]
(- low)
[ - high )
[ -all ]
li s t
l is t
l is t
i n ets
vnets
an e ts
ARGUMENTS
-ignore_ arrival inets
Removes the effect of u sing the set_ si_ noise_ a nalysis command with its
option:
-above
-below
-high
-low
-all
-victim collection
-aggressor collection
-ignore_arrival collection
--get_option arg
--set_option ...
--get_default arg
--set_default ...
--system_default
--list_options
--load_options
--license
-- help
description:
-all
ignore_arrival option . You canno t use this op ti on wi t h t he -victims or aggressors opti on .
-victims vnets
Removes the effect of using the set_ si_ noise_ analysis command with its victims opt i on . When this option -victims is used to remove the effect set
by the command set_ si_ noise_ analysis with the opt i on -aggressors , it does not
remove any exclusion on the nets. However, when you use the -victims option
with -aggressors op t ion, the command res t ores the pair-wise relationshi p . You
can not use th i s -victims opt i on with the -ignore_ arrival option .
-victim
-aggressor
-ignore_arrival
above
below
high
low
remove all effect
victime nets
aggressor nets
ignore arrival window
get option value
set option value
get default value
set default value
use system default values
list current option values
load current option values
list required licenses
display command help
remove all effect of
set_si_noise_analysis
remove -victim effect specified by
set_si_noise_analysis
remove -aggressor effect specified by
set_si_noise_analysis
remove -ignore_arrival effect specified
by set_si_noise_analysis
- aggressors anets
Removes the effect of the set_ si_ noise_ analysis command with its -aggressors
option . When this option - aggressors is used to remove t h e effect set by the
command set _ si_ noise_ analysis with the option -victims 1 it does not remove
any exclusion on the n ets . However, when y ou use the -aggressors op tion with
the - victims option/ t he command res t ores the pair-wise relationship. You
cannot use this -aggressors option with the -ignore_ arriv al option.
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-above
Removes the effect of
set~si~noise~analysis
-exclude -above command.
Removes the effect o f
set~si ~noise~analysis
-exclude -below command.
Removes the effect of
set~si ~noise~analysis
-exclude -low comman d .
-be l ow
-low
- high
Removes the effect of
set~si~noise~analysis
-exclude -high command.
- all
Removes all the effects of
set~si~noise~analysis
command on all the nets.
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remove user attribute
remove user attribute
Remov es a user a t tri bute from an objec t .
Removes one or more user-defined attributes that were previously assigned to the object using the
set_user_attribute Tel command .
Syntax
SYNTAX
string remove_ user_ attribute [ -quiet)
stringclass_name
list object_ spec
stringattr_ name
[ -c l ass class_name)
object_spec attr_name
ARGUMENTS
remove_user_attribute objects attribute name \
[- c lass class_name]
[ -quiet]
\
where the arguments have the following meaning :
-quiet
Does n o t repor t a ny messages .
-class c la ss_name
If object_spec i s a name, thi s is its class . Allowab l e va l ues are desi g n ,
port , cel l , p i n, n et, lib , li b_cel l , o r lib_pi n.
objec t_spec
Shows objects from which to remove the attribute. Each element in the list
is e ither a co ll ection or a pattern which combi nes wi th the c l ass_name to
find t he objects.
objects
Objects from which to remove a user-defined attribute.
attribute name
Name of attribute to remove.
[-cl ass c lass_name ]
Only remove the attribute on an object if that object is of the
specified class. For a list of all classes, see Aprisa Classes.
[-quiet]
Not supported yet.
attr_narne
Provides the name of t he attribute .
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report_aocvm
report_aocvm
Displays in f ormation abou t AOCVM componen t s a n d AOCVM coef f ic i en ts in the curren t
design.
Reports on the derating factors generated from the advanced on-chip variation (OCV) analysis.
SYNTAX
Syntax
i nt report_ aocvm
object_ lis t
report_aocvm \
[-from pins -and - port s] \
[-to pins-an d-port s ]
l i st
objec t _ l is t
ARGUMENTS
object_ list
Specifies a path fo r which AOCVM derate components and metrics are to be
reported .
where the arguments have the following meaning :
[ - f rom pins-and-ports ]
Select all timing paths starting at one of the pins or
ports from the specified collection .
[ - to p i ns - and- ports ]
Select all timing paths ending at one of the pins or
ports from the specified collection.
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report_attribute
report_attribute
Reports the attribute s on one o r mo r e ob j ects .
Reports attributes and their values on a specified set of objects.
The objects in the provided set may be from different classes. You can further narrow your selection in
the set by specifying the class of objects on which you want to report. The report includes both user
defined attributes and Aprisa built-in attributes such as wire length and capacitance of a net.
Syntax
SYNTAX
string report_ attribute [ - class class_name]
str ing
class_ name
l ist
object_ spec
[- nospli t)
[- appl i cation) object_spec
ARGUMENTS
-class class_name
I f objec t _spec is a name, thi s is i t s c l ass . Allowabl e va l ues are design,
port, cell, pin, net. lib, lib_cel l . or l i b_pin.
report_attribute objects
[-class class_name] \
[ -applicat i on ] \
(-pattern string] \
I -sort ]
where the arguments have the following meaning:
objects
Objects for which to report its attributes.
[ -cl ass class_name ]
Class name of the objects for which you want the attributes .
[-a pplication]
Report the application attributes as well as the user-defined
attributes.
[- pattern string]
Report on the attributes that match the specified name pattern.
[ -so r t ]
Sort the names of the reported attributes.
- nospl i t
Does not split lines i f column overflows.
-application
Lis t s appl ication att r ibu t es as wel l as user- defined a t tributes .
object_ spec
Lis t of objects to report. Each element in t he l is t i s either a collection
or a pattern which combines with the class_name to find the objects.
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report_case_analysis
Command: report_case_analysis
report case analysis info and affected flip flop
Report s cas e a n a l ysis e n tri e s on p or t s a nd pins.
SYNTAX
s tr i ng report_ case_ analysis
[-a ll]
[ -nosplit]
option:
-all
-seq
-nosplit
-from collection
--get_option arg
--set_option
--get_default arg
--set_default ...
--system_default
--list_options
--load_options
--license
--help
report all case analysis and
constant propagation
report all impacted sequential
pin
no line split
report from a pin or list of
pins
get option value
set option value
get default value
set default value
use system default values
list current option values
load current option values
list required licenses
display command help
ARGUMENTS
-all
Reports the pins upon whi ch you have set ca se ana lysis values a nd reports the
built-in constant pins of th e design that are considered for start points of
logic cons tant propaga t i on. Logic constant propagation i s performed by
default from t he constant pin s of the des ign, unless the
disable_ case_analysis variable is set to t r ue.
- nosplit
Prevent s line spl itt i ng and facilitates wri t ing sof tware to extract
informa tion from the r eport output. If you do not use th is option , most of
the design infor mation is listed in fixed-wid th columns . If t he i n for mat i on
for a g iven field exceeds t he column width, the nex t field begi ns on a new
line start i ng i n the correct column.
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report_clock
report_clock
Repor ts clock-related information.
Reports clock information, such as the clock period , its waveform, clock latency and uncertainty, on all,
or the specified set of clocks.
SYNTAX
Syntax
string report_ cloc
[ -a ttr ibu t e s]
[ -skew]
[ -groups ]
[ -nosplit]
[ cl ock_names ]
report_clock [clock_list]
[-attributes] \
[-skew]
\
[-nosplit] \
[-significant_digits number]
clock_names
l ist
ARGUMENTS
where the arguments have the following meaning:
- attributes
Shows clock at t ribu tes and provides a list of all the c l ocks in t he c u rrent
cl ock list
Clocks on which to report. By default, all clocks are
included.
[ - attributes l
Include the values of the clock attributes in the
report. This argument is only applicable when the
-skew argument is used.
[- skew ]
Include the clock latency and uncertainty in the
report.
[ - no s plit]
des ign. The i n fo r mation for each cloc k inc l udes source c.ype , signal rise and
Do not split lines ifthe rows do not ftt on a
letter-sized page. This setting results in a less
readable table, but is easier to process by other
tools and scripts.
[-significant_ d igits number]
Set the precision by providing the number of digits to
report after the decimal. The defau It value is 2.
fall times, and attribu tes . Th i s report i s shown by defa u l t.
- skew
Reports c l ock latency (source and network latency) and un certa in t y
i n formation set on the design by the set _c lock_lt~-tenc:y a nd
s e t _ clock_uncertainty corronands, r e sp ec tively.
Clock ne twork. latency informa t i o n in cl udes rise latency and f al l latency .
Cloc k so ur ce laten cy informacion inc l u des r i se latency a n d fall latency for
early and late arrivals . Cl ock uncertainty i nf ormat i o n includes intra.clock
setup or ho ld u nce rtainty and i ntercl ock se tup or hold uncertai nty. Th is
option al so reports a n y f ixed clock transiti o n set by u sin g the
set_ clock_ transition command. This optio n only reports active clocks .
-groups
Shows the c ur rent setting of c l ock grou ps , i n c luding the list o f active c l ocks
i n the current analysis scope and groupinq of exclusive clocks and
asynchronou s c locks set by u sing the set_ clock_ groups comma nd .
-nospl it
Specifies n ot to sp l it l ines if a column over flows. f1ost. of the design
information is listed i n fi xed- width col umns . If the i n forma t ion for a given
field exceeds the column width , the next fieJ d begins on a n ew 1 ine, starti ng
in the correct col umn. Th is option p r events line-sp l itting and fa c i lit a tes
wr iti ng software to extract i nformation from the report outp u t .
clock_narnes
Lists the clocks that mu st be reported . Substitute the l ist you want Eor
clock_names,
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94
report_constraint
report_constraint
Di splays constraint - related in f ormation about a des i gn.
Reports the status of the design with respect to the specified design constraints. This report includes
details of the design constraints that are violated and where they are violated . You can specify the
types of constraints for which you want a report.
For MCMM designs, by providing a prefix for the output file names, you can create reports for all
scenarios at once.
When you enable parametric on-chip variation modeling (pocvm) , then instead of reporting expected
(average) timing results, you can get a report on worst results for a given confidence interval. You
specify the interval as a multiple of sigmas.
SYNTAX
Syntax
int report_ constraint [ -a l l _ violators ] [-verbose)
[ - path_ type format ] [ -max_ delay] [ -min_ delay )
[-max_ capacitance ] [ -min_ capacitance ]
[ -max_ transition ) [ -min_ transition ]
[-max_ fanout) [-rnin_ fanout ]
[-min_pulse_ width] [ - min_period]
[- recovery ) [-removal] [ -max_ skew]
[ -c l ock_ gat ing_ setup ] [-c l ock_ gating_ ho ld ]
[- clock_ separation )
[ -connection_ class )
[- ignore_ register_ feedback feedback_ slack_ cutoff ]
[- significant_ digits digits ] [ -nosp l it )
report_ constrain t [ -al l_violators] \
[-pins pin_list] \
[-verbose] \
[-reason] \
[- path_ type end
s l ack_ o nl y ] \
[-max_de l ay] \
[- min_ de l ay] \
[-max_capacitance] \
[-min_capacitance] \
[-max transition] \
[-min_transition] \
[-max_fanout] \
[-min fanout] \
[-max_ fanout_count] \
[-delay_noise] \
[-min_ pu l se_ width] \
[ -min_period] \
[-recovery] \
[- remova l] \
[-max_skew] \
[- cloc k_gating setup ] \
[- cloc k_gating_hold] \
[-clock separat i on] \
[-include_clock_net] \
[- remove_clock_reconvergence_pessimism value] \
[-igno re_regis ter_feedback value] \
[- significant_digits number ] \
[- nosplit] \
[- html] \
[-summary] \
[- noenvironment] \
[-no_hiecacchi cal _pins ] \
[- no_ buffec_inverter_on_ clock ] \
[- scenario scenario] \
[- prefix filename_prefix ] \
[- sigma n]
string format
in t digits
float slack_ cutoff
float feedback_ slack_ cutoff
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where the arguments have the following meaning:
ARGUMENTS
-all_ violators
Indicates that a summary is to be displayed showing t he worst violation per
endpoint of each violated design rule constraint in t he current design . The
-verbose option provides detailed information on each constraint violation.
[ - all_violators l
Report all violations of the specified rules. By
default , only a summary of violations for each rule is
provided .
the least violator.
[-pins pin_list]
Report only violations on the specified pins.
Indicates that more detail is to be shown about constraint calculations .
[-verbose ]
Report in detail on the violations.
-path _ type format
Specif ies the format for the path repor t . Allowed values are slack_ only (the
default), and end . Th i s option has an effect only if the -verbose option is
not used. If slack_ only is specified, the report displays only e ndpoint
slacks . If end i s specified, the repo r t has a colwnn forma t that shows one
l ine for each path, with only the endpoint path total, required~time, and
slack .
[-reason]
Report the reason why optimization was not able to
fix the violations.
[-max_ delay]
Include violations of the maximum allowed delay
and setup constraints. By default , these violations
are not included .
- max_ delay
Indicates that only max_ delay and setup information is to be d i splayed. The
default constraint report displays all timi ng and design rule cons t raints.
[-min_delay]
Include violations of the minimum required delay
and hold constraints . By default, these violations are
not included.
[ - max_ capacitance ]
Include violations of the maximum capacitance
constraints.
[-min capacitance]
Include violations of the minimum capacitance
constraints.
[ - max transition]
Include violations of the maximum transition
constraints.
[ - min transition]
Include violations of the minimum transition
constraints.
[- max fanout]
Include violations of the maximum fanout load
constraints.
[- min fanout]
Include violations of the minimum fanout load
constra ints.
( - max_fanout_count]
Include violations of the maximum fanout count
constraints.
[ - delay_ noise]
Include delay noise violations.
( - min_pulse_width]
Include violations of minimum pulse width
constraints.
[ - min_period]
Not supported yet.
[ - r ecovery]
Not supported yet.
[-removal]
Not supported yet.
[ - max_ skew]
Not supported yet.
[clock gatlng_setup]
Not supported yet.
[clock_gating_hold]
Not supported yet.
cloc k separation]
Not supported yet.
[ - include_clock_net]
Include violations on clock nets.
[ - remove_clock reconve r gence_pes
Only check for common path pessimism when the
slack is less than the specified value.
M
ultiple v iolations for a given constraint are listed from the greatest to
-verbose
~min_delay
Indicates that on ly min_delay and hold information is to be displayed. The
default constraint report displays all timing and design rule cons t raints.
-max_ capacitance
Indicates t hat only rnax_ capacitance constraint information is to be
displayed . - max_ capacitance is a design rule used to limit total capac i tance
on a net. The -max_ capacitance option displays the max_capacitance cost (the
sum of all max_ capacitance violat i ons) . To see details about the worst
violator, use the -verbose option in addition to the -max_ capacitance option.
To see details about a l l rnax_capacitance violation s, use the -all_ violators
and -verbose options in addition to t he -max_ capacitance option . The default
constraint report displays all timing and design rule constraints.
-min_ capacitance
Indicates that only rnin_ capacitance constraint information is to be
displayed . The -min_ capacitance option is a design rule used t o limit total
capacitance on a net. The default constraint report displays all t iming and
des i gn rule constrain ts .
- max_ transition
Indicates that only max_ transition constraint information
-rnax_ transition is a design rule used to limit transition
pins . The de f ault constr aint report displays all timi ng
constraints. If the library uses the cmos2 delay model.
information is shown instead.
is to be displayed.
time on a ports and
and design rule
max_ edge_ rate
-min_transit ion
Ind i cates that only min_transition constraint information is to be d i splayed .
-min_ transition is a design rule used to set a minimum transition time on a
ports and pins. The default constrai nt report displays all timing and des ign
rule constraints. If the library uses the cmos2 delay model, rnax_ edge_ rate
information is shown instead.
-max_ fanout
Indicates t hat only max_ fanout constraint information is to be displayed . max_ fanout is a design rule used to limit fanout_ load on a net. The default
constraint report displays all timing and design rule constraints.
-mi n_ fanout
Indicates that only rnin_fanout constraint i nformat ion is to be displayed. min_ fanout is a design rule used to set a minimum fanout _ load on a ne t . The
default constraint report displays all timing and design rul e constraints.
-mi n_pulse_ width
Indicates that only rnin_pulse_width constrain t information i s to be
displayed . -m.in__pulse_ width is a design rule used to set a minimum pulse width
high or low at a clock pin or at pins in t he clock network. The default
constraint r e port d i splays all timi ng and design rul e constrai n t s
- mi n_period
Indicates that only min_period constraint information is to be displayed.
mi.n_period is a design rule used to set a minimum per iod on a clock signal.
The defaul t constra i n t report displays a ll timing and design rul e
constraints.
simism value]
96
96
between the con trol pin tran sition to the i nactive s ta te , a nd the active edge
of t h e synchron o u s clock signal . Thi s t.ime is from t he c o n trol signal go ing
inactive t.o t he clock edge t.ha t l a tch es data in. Th e a synchronous con trol
signal mu st r emain constan t. dur i n g t.h i s time, or an incorrect va l u e may appear
at t he o u tput s . The default const ra in t report d isplays al l timing and des i gn
ru l e constraints .
[- ignore_register_ feedba ck
value]
Ignore paths starting and ending at the same
clocked element if the total path delay exceeds the
specified value.
[-significant_dig i ts number]
Controls the precision by number of digits to use
after the decimal point .
[-nosplit]
Do not split rows over more than one line if they do
not fit a letter-sized page .
[- html]
Generate a report in HTML formal. By default, an
ASCII report is generated.
[ -summary ]
Include a timing summary.
[ -noenvi ronmen t ]
Do not report values of environment variables.
[-no hierarchical_pins)
Do not report on hierarchical pins .
[-no_buffer inverter_on clock)
Do not report on buffers and inverters in the clock
path .
(-s ce nario scenario]
Report timing results and design constraint
violations for the specified sce nario in a MCMM
design.
[-pre fix f ilename_ prefix)
If no scenario is set , only one report is created and is
named filename_pref i x.
-removal
Indicates that only remova l constraint in fo r ma ti on is t o be di spl a yed. removal is a timing con strai n t used to describe the minimum allowa ble t ime
between t he clock pin inactive edg e , while t h e asynchronous p in is active ,
to t h e inactive edge of the same a synchrono u s control pin . The defau lt
constraint repo rt disp lays all timing and design rule c onstraints.
-max_ skew
Indicates that only ma x_ skew constraint in f orma tion is to be disp l ayed . timin g constraint that checks the maximum separation time
allowed be tween t wo clock s igna ls . The de f aul t constrain t repo rt displays al l
timi n g a n d desi gn rule constraint .
max_ skew i s a
-c l ock_ga ting_ setup
Indicates that only clock_ gat i ng_ setup constraint information is to be
d isplayed . -clock_ gating_ setup is a timin g constraint used to set a minimum
set up time between a c l ock and a s i gna l control l ing the gat ing of tha t clock.
The d efault constraint repor t disp l ays a ll timin g and des i gn r ule
constra in ts,
-c l ock_ ga ting_ ho ld
Indi cate s that only clock_ gat ing _ hold con str a in t i n formation
d isplayed . -c lock_ gating_ hold is a timing c ons t rai n t u sed to
h old tim e between a clock and a si gnal con c rolling t h e ga t ing
The d efault cons tra in t repo rt disp l ays a l l timing and design
constra ints .
i s to be
set a minimum
o f that. cl ock .
r ule
-c l ock_separa t ion
Indicates tha t only clock_sep a ra ti on cons tra.int in f orma tion is to be
di splayed . -c lock_ separation is a timing constraint t hat checks the min imum
sep arat i on t i me a l lowed between two cl o ck s i gna l s. The d e f ault con st raint
repor t disp l ays all timing a n d design rule constraint.
If a working scena rio is specified w~h the
set_working_scenario Tel command, only one report
is created. Its name starts with fi l ename prefix,
followed by a dot and the name of that scenario.
-conn ec t ion_cl ass
Indicates to display o n ly connection_ class constraint information . The
connec ti on_class constra in t is displ ayed only if t here is a connec tion_class
violation.
If you are in MCMM mode and have several
scenarios set with the current_ session Tel
command , a report is generated for each of the
scenarios in the session. The names of the reports
start with filename prefix, followed by a dot,
and the name of that- scenario.
- i gno re_ regis ter_ feedback f eeciback_ sla ck_ cuto f f
Indi c ates to ign ore any timing path that sta rt s and e nds at the same regis t er
and h olds a val ue. This op ti on appl ies to mi n de l ay as wel l as max de l ay
reports . On ly paths with slack less t han t he s pec i fied f eedback_ slack_ cutoff
are ignored. This option is app lied as a fi lter to t h e path s a f t er t hey a re
generated . Therefore , t he number of paths gen erated may be less than the
Allowed va l u es are 0-13; t he defau l t i s d e te rmined by t he
report_ default_ significant_ digits variabl e , whose defau l t value is 2. Use
this option if you want to override the default .
-n ospl i t
Most o f t h e design i nformat i on is l isted in fixed - widt h colUJlUls . If the
information for a given field exc eeds the width of t he column, the next field
begins o n a n ew l ine, start ing in the correct column . The -nosplit optio n
p revents l ine splitting and faci l itates wri ting software to extract
information from the report output.
Note that the -prefix argument redirects the report to
a file. Hence, it has precedence over the >
redirection operator.
[-s i gma n]
Report the n-sigma delay. This argument is only
relevant if the -verbose argument is specified and
th eta parametertiming_pocvm_enable_ana/ysis is
true .
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97
report_crpr
report_crpr
Repor t s the clock r econv e rgence pessimism calculated between specified register
clock pi n s or ports .
Generates a report on the clock reconvergence pessimism (CRP) on a set of user-specified timing
paths. You can specify paths by the source pin, sink pain, launching clock, capturing clock or any
combination of these.
Clock reconvergence occurs when the clock path to the launching clock and the clock path to the
capturing clock share a common subpath. The reconvergence pessimism is the difference of the max
timing and min timing of that shared sub path.
For each of the selected paths, the report includes the path, the clock node that is common to both
launch and capturing clock, and the CRP value of the path for both setup and hold constraints.
SYNTAX
Syntax
i n t report_crpr -from from_ latch_ clock_pin
-to to_latch_clock_pin
[-from_clock from_cl ock]
[-to_clock to_clo ck]
[ - setu p I - hold]
[-signi ficant_dig its di gi ts]
report_c rpr \
-from [from_pins] \
\
[-from_clock [from_ clocks]] \
[- to_cloc k [ to_clocks]]
-to [ to_pins]
stringfrom_latch_clock_pin
stringto_ latch_ clock_pin
string from_ clock
stri ng to_clock
i ntegerdigits
where the arguments have the following meaning :
ARGUMENTS
- from from_latch_clock_pin
Specifies the clock pin of t he l aunching sequential device or c l ock gating
check to be reported. A constrained inpuc port may also be used.
- from ( from_ pins ]
Select only paths that start from one of the
specified pins.
-to to_latch_c l ock_pin
Specifies the clock pin of t he captur ing sequential device or clock gating
check to be reported. A constra i ned output por t may a l so be used.
- to [ to_pins ]
Select only paths that end in one of the specified
pins.
-from_clock from_cl ock
Specifies the clock that fans out to the launching sequential d evice.
[-from_ clock [from_ clocks]]
Select only paths whose launching clock is one of
the specified clocks.
[-to_ c lo ck [ to_clocks] ]
Select only paths whose capturing clock is one of
the specified clocks.
-setup
Indicates that the CRP used for a setup da t a path is to be reported. The setup and -hold o p t ions are mu t ually exclusive . I f ne ither option is
specified , - setup is assu..-ned.
-hold
l ndi cates that the CRP used for a hold data p ath i s to be r eported . The setup and -hold options are mutually exclusive. If neither option is
specified , -setup is assumed .
-sign i f icant_ digi ts digits
Specifies t he n umber of digits to the right of the decimal point
th~t .;~.re
to
be reported. Allowed va l ues are 0-13. I f this option is not specified the
number of significant digi t s is determined by the
report_ default_ significant_ digits var:iabl e which ha s a defaul t value of 2.
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report_delay_calculation
report_delay_calculation
Displays t he actua l ca l cul at i on o f a cell or n e t t iming arc de l ay value.
Reports the results of the delay calculation for a set oftiming arcs. You specify the arcs by providing
the ports or pins where the timing arcs start, the pins or ports where the arc ends, or both. You can
specify the tranMion time of the signal at the start of the timing arc.
The delay calculation is always reported for one specific scenario, even when analyzing multiple
scenarios.Therefore the -scenario argument is mandatory for MCMM designs.
NOTE: Currently, not all the arguments have been fully implemented.
Syntax
SYNTAX
int report_ delay_ calculation [ - min I - max]
[ -from_ rise_ tr ansit i o n value ]
[ -from_ fall _ trans i tion value ]
- f r om from_pin - to to_pin I - of_ ob j ects objects
[ -nosplit ]
[- thresholds]
[ - crossta l k]
from_pin
string
string
to_pin
float
value
coll ec tionobj ects
ARGUMENTS
- min
Indicates that minimum delay calculation is to be shown. The design must be
i n min/max mode .
r eport_ del ay_ ca l cu l at i on \
(-mi n] \
(-max ] \
(-nos pli t ] \
(- t h res h o l d] \
(-from_ r i s e_t r ans i t ion r is e ] \
[ - fr om_ f al l _tra n s i tion fa l l ] \
I - cross t alk ] \
[-fr om s ta r t_ timi n g_a r c ] \
(-to end_timi ng_ arc ] \
(-o f_ob j ects timing_ ar cs ] \
[-c ro sstal k] \
(-s c e nari o scenari o]
where the arguments have the following meaning :
[ -min ]
- max
Indica tes that maximum de l ay cal cu l ation is to be sho•m. This is the defau lt
i f neither -min nor -max is spec ifi ed.
( - max]
t ransition.
- f rom f rom_pin -to to_pin
Specifies the start a nd end points of a t iming arc within a design. For a
cell timing arc, t he pins must represent the input and outpu t pins of a common
leaf cell, which have a timing arc specified between them i n the library. For
a ne t t imi ng ar c, t he pins mus t be a driver and a load on a common ne t . Port
names are al l owed i n p l ace of pin names for net arcs . You mus t use either t h e
-fram/-to combination or the -of_objects argument, but not bo t h .
Re port on the maximum delay calculation.
NOTE: Currently, this argument must be used with the
-threshold argument because the command is not yet fully
implemented .
- from_ rise tran sition value
Specifies a value to be used by the delay calculation for the from rise
- from_ fall transition value
Specifies a value t o be used by the delay calculation for t he fro m fall
transi tion.
Report on the minimum delay calculation .
NOTE: Currently, this argume nt must be used with the
-threshold argume nt because the command is not yet fully
implemented .
[ -nosplit ]
Do not split lines in the report if the columns do not fit the w idth
of the page . Using this argument, an ASCII file is created
which is harder to read , but easier to process using script
languages.
( - thresho ld s ]
Report the voltage threshold le vels t hat are used to calculate
rise and fall delays and slews.
[ - fro m_ rise transition
Value to use for the rise transition t ime of the signal at the start
of the arc. The default value is 0.0.
rise]
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99
-of_ objects objects
Specifies a co llec t ion o f ti ming arcs (created with t he get_ timdng_ arcs
command) on which to report . Arcs in the l ist are reported in order of from
and to pins. You must use e ither the -from/-to combination or the -of_ objects
argument, but not both .
fall]
Value to use for the fall transition time of the signal at the start
of the arc. The default value is 0.0.
[- cro ssta lk)
Report on the impact of crosstalk on the arc delay.
[-fr om_ f a l l_transiti o n
NOTE: Currently, this argument is not yet implemented .
- nospl it
Pr events lin e - spl itting and facilitates writing software to extr act
information from the report ou tput . Most of the design information is listed
in fixed-wid t h columns . If the in f ormat ion in a given fi eld exceeds the column
width,
the nex t f ie ld begins on a new line, starting i n the correct column.
-thresholds
Reports the characterization thresholds that are used for delay calcu lation .
- cross t alk
Reports t he crosstalk information f or a net arc. The arc is specified by from_pin and -to_pin. It is not permitted wi th -of~objects and user choosen
t ransit i on time -from~rise_transition and -from_fall_tranaition. The
crosst alk information is reported from the last update_ timing.
[ - from start_ timing_ arc )
Start point ofthe timing arcs on which to report.
[-to e nd_ timing_ a rc]
Specifies the end point of the timing arcs on which to report
[ -of_objec t s timing_ arc s]
Specifies the objects, typically cells, whose arcs on which to
report.
[- cro sstalk ]
Report the impact of crosstalk on the arc delay.
[- scen a ri o s c ena ri o ]
Scenario for which to report the delay calculations. This
argument is mandatory for MCMM designs.
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report_disable_timing
report_disable_timing
Reports disabled timin g arcs in t he current design.
Reports on all disabled timing arcs in the current design . Timing arcs can be disabled because they
are logically impossible, that is, they require a signal to be both true and false , or because they are not
possible given the current constant signals like in a case analysis, or the user specifies to ignore a
path, or it is a path that the timer breaks to resolve a circular dependency (loop breaking path).
For every arc, the report lists the reason why the arc is disabled. The reasons can be one of the
following:
•
Case analysis (c): Arc does not apply for the current case analysis.
•
Conditional arc (C): Conditional arc which condition is not met.
•
Default conditional arc (d): Arc to be used when no other conditional arcs are active.
•
Loop breaking (1): Arc was disabled by the timer to break a timing loop.
•
False net-arc (f); Arc can logically never be active.
•
User-defined (u); Arc disabled by the user.
•
Propagation of constant values (p): Arc disabled based on propagated constant values.
SYNTAX
Syntax
string report_ disable_ timing
[-nospli t ]
[ cells_or_ports]
collection cells_or_ports
report_disable_timing [-nosplit]
ARGUMENTS
where [-nosplitl prevents line splitting if the rows do not fit on a single page .
-nosp l it
Pr events l ine split ti ng and facilitates writing so f tware to extract
information from the report output. If you do not u se this option , most of
the design informati on is l isted in fi xed-width c o l umns . I E the i n formatio n
for a g i ven field exceeds the column <;idth, t he n ext fiel d begins on a ne<;
line starting in t he correct co l umn.
cells_or_ports
Li mits disabled arc reporti ng to t h e specified list of cells or ports. Provide
the l ist or collection oE cel l s or ports as an argume n t to the command .
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report_driver_model
report_driver_model
Displays the driv e r model for a l ibrary ce l l
parasitics.
t iming arc used to drive annota t ed
Evaluates a liming arc inside a library cell for a specific input slope and output load capacitance and
reports the equivalent driver model, that is, a ramp voltage source and a hold resistor. For MCMM
designs, you can specify the scenario for which to show the result. Ttle report includes:
• Total delay from input to output pin
• Slope of transition at the output pin
• The incremental arc delay due to load capacitance
• The incremental output slope due to load capacnance
• The hold resistance of the driver model
• The transttion time of the ramp voltage of the driver model
SYNTAX
int report_driver_model
-l ib cell lib_ cell
-f r om_pi n from_pin
-to_pin to_pin
- rise_s lew rise_s l ew
-fal l slew fall slew
- capacitance capacitance
string
s t r i ng
string
float
float
double
lib_ cell
from_pin
to_pin
rise_slew
fall slew
capacitance
ARGUMENTS
- lib_ce l l lib_ cell
Specifies the name of t he l i brary cell for which the driver model is to be
computed. The name should be in the form library_ name/cell_ name.
Syntax
report_driver_model \
-lib_cell collection \
-from_pin string \
-to_pin string \
[-rise_slew rise_slew] \
[- fall_slew fall_slew] \
[-capacitance load_capacitance] \
[-scenario scenario]
where the arguments have the following meaning:
- to_pin to_pin
Speci f ies the en dpoin t of a timing arc t hr ough the l i b_ce ll.
-rise_slew r~se_slew
Specifies the rise t i me in l ibrary units on the from_ pin .
Library cell of which you want to evaluate a timing
arc
- frorn_p i n string
Start point of the timing arc to evaluate.
-t o _pin string
-from_p in from_pin
Specifies the star t point of a timing arc through the lib_cell.
-lib ce ll collection
End point of the timing arc to evaluate.
[ -rise s l ew rise slew]
Rise slew at pin specified with the -from_pin
argument. The default value is 0. 1 ns.
[- fall s lew fa ll_ slelv]
Fall slew at pin specified with the -from_pin
argument. The default value is 0. 1 ns.
[ -capaci tance load_capacitance ]
Load capacitance at pin specified with the -to_pin
argument. The default value is o. 1 pF.
[ - sc enar i o scenario]
Report the delay values for the specified scenario.
- f al l_slew f all_ s lew
Specifies the fall time in library un its on the fr om_pin .
- capacitance capacitance
Spec i f ies the load in lib r ary units on t he to_pin .
102
102
report_min_pulse_width
Displays minimum pulse width check information about specified pins or ports.
SYNTAX
i nt report_min_pulse_ width
[-all _violators)
[ -si gni ficant _ digits digits )
[ -nosp l it )
[ -path_type format]
[- i n pu t __pins]
[port__pin_ list)
list
port__pin_ lis t
ARGUMENTS
-all_violators
Indicates t hat only violating mi nimum pulse width checks are to be reported .
Command: report_min_pulse_width [db:port_pin_list]
Report minimum pulse width check information in
current design.
-verbose
show more details
-path_type path_type(summary)
clock path path display type
path_type = summary I full I
full_clock_expanded
-significant_digits integer(3)
number of digits after decimal
point
-nosplit
prevents line splitting if
column overflows
--get_option arg
get option value
--set_option
set option value
--get_default arg
get default value
--set_default ...
set default value
--system_default
use system default values
--list_options
list current option values
--load_options
load current option values
--license
list required licenses
--help
display command help
description:
Report minimum pulse width check information in
current design.
-s ignifican t_digi ts digits
Specifies the number of repo rted digits to the right of the dec imal poin t.
Allowed va l ues are 0-13; the default is determi n ed by the
report_ default_ significant_ digits variabl e, whose default value is 2. Use
this option i f you want to override the default .
-no split
Most of the d esi gn information i s listed in fixed-width columns. If t h e
i nfor mation for a given fie l d exceeds t he wi dth of the co l umn, t he next fiel d
begins on a new line, s t arting in the correct column. -nosplit prevents line
splitting and facilitates writing software to extract in fo rmation fr om t h e
repor t output .
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103
- path_type format
Specifies the format of the path report and how the clock path is displayed.
Allowed values are: summary (the default), which generates a report with a
column format that shows one line for each path and shows only the required
p u lse width, actual pulse width and slack; short, which displays only s t ar t
and end points in the clock path; tull_clock, which displays full clock paths;
a nd tull_clock_expanded , which displays f ull clock paths including all master
clocks of a generated clock.
- i npu t_pi ns
I n dicates t hat input pins are to be shown in the path report. The default
isto show only output pins.
port_pin_l ist
Specifies a list of pins or ports to report . By default, the report contains
all pins and ports in the current design.
104
104
report_noise
report_noise
Re por t s noi se ana lys is informa tion.
Reports on the functional noise analysis. The report contains information on the size and width of
noise bumps on victim nets, caused by crosstalk, and it reports on the noise slack, that is, the
difference between the calculated noise bump and a bump that would cause a functional failure. The
latter is derived from the noise sensitivity of the input pin driven by the victim nets.
The noise analysis considers four cases. The victim net can be either low or high and the noise bump
can be positive or negative.
• A regular glitch analysis is performed on all pins and the noise resholds for all these nets are set by
theta parameters si_noise_margin_above_high and si_noise_margin_below_high. You can now
override these values for selected pins using the set_noise_margin Tel command.
• An overshoot and undershoot analysis is only performed on selected pins for which a noise margin
was specified using set_noise_margin Tel command with the -below_low or -above_high
arguments.
Syntax
SYNTAX
int report_ noise
[ - above]
[-below]
[- l ow]
[ - high ]
[ - nworst_pins pin_count]
[-significant_digits digits]
[ - s l ack_type slack_type]
[ - slack_lesse r _th an slack_limit]
[-a l l _ viola t o rs )
[ - data_pins]
[-clock_pins]
[ -asyn c_pins]
[-verbose )
[-nospli t )
[object_list]
list
report_nois e
[-th r e sho ld value]] \
[-th r e s hol d low value]\
[-th r esho ld_high value]\
[-nets nets ] \
[-vi c tim_onl y] \
object_list
ARGUMENTS
where the arguments have the following meanir1g :
-above
Performs the reporting only above the rails. I f this opti on is combined with
-low , it repor ts for the noise bumps above the low ra il . I E it is combined
with -high , it reports the noise bumps above the high rail. Otherwise, it
[- thresho ld value )
Do not report on any positive noise peak smaller than
the specified value when the victim signal is low or any
negative noise peak smaller than the specified value
when the victim signal is high. The defauh value of this
threshold is 0.0 mV.
[- thres ho l d_l ow va l ue )
Do not report on any positive noise peak smaller than
the specified value when the victim signal is low The
default value of this threshold is 0.0 mV.
reports the noise bumps above the high rai l and above the low rail .
- below
Performs the report i ng only below the r ails. If this op t ion is combined wi t h
-low , it reports for the no i se bumps below the l ow rai l . I f it is combined
with -high , it reports the noise bumps bel ow the high rail. Otherwise, it
reports the no ise bumps below the h igh rail and below the low r a i l.
105
105
[- t h resho l d_ high value]
-low
Performs the reporti ng only fo r the low rail . If this option is combin ed with
-above , it reports the noise bumps above the low rail. If it is combined with
-below , it reports the noise bumps below the low rail . Otherwise, it reports
the noise bumps for both below and above the low rai l .
-high
Performs the repo rting only for the high rail. I f this option is combined
with -above , it reports t he noise bumps above the high rail. If it is combined
with - below , it reports the noise bumps below the high rail. Otherwise, it
Do not report on any negative noise peak smaller than
the specified value when the victim signal is high.The
default value of this threshold is 0.0 mV.
[-ne ts nets ]
Only report noise information for the specified nets.
[-victim_on l y ]
Report only victim peak value .
reports t he noise bumps for both below and above the high rail.
-nworst_pins pin_ count
Specifies the number of load pins to be repo r ted . Any number greater than 1
is accepted; the default value is 1 .
- significant_digits digits
Specifies the number of digits after the decimal point to be displayed for
t ime values in the generated report. Allowed values are 0-13; t he default i s
determined by the report_default_ significant_digits variable, whose default
value is 2 . Use this option if you want to override the default. This option
contro l s only the number of digits disp l ayed, not t h e precision used
internally for analys i s. For analysis, PrimeTime u ses the fu l l precision of
the platform's f i xed -precision, floati ng-point arithmetic capability.
-slack_ type slack_ type
Specifies the type of slack to be used . Valid values are area, height, and
area_percent. A slack_type of area reports slack as the voltage margin
multiplied b y the noise bump width. The voltage margin is defined by the noise
bump height and noise immunity curves or DC noise margin. Th is setting is the
default . A slack_ type of height reports noi se slack as the voltage margi n . A
slack_ type of area_percen t reports noise slack as the percentage of the noise
constraint area. The noise constraint area is computed by multiplying the
noise height constraint by the noise bump width .
-slack lesser_than slack_limit
I ndicates that onl y those pins wi t h a slac k less (more negative) t han
slack_ limit are to be shown.
-all_vio l ators
I ndicates t hat only violating pins {negative slack) are to be shown. This
option cannot be used with the -slack_ lesser_ than option. I f this option
used with the -nworat_pins option, the number of violating pins will be
limi ted by that value.
i~
- data_pins
Indicat es that the reporting is done only on pins that are data pins of
sequentia l ce l ls. The effec t is similar to preselect the data pins usi n g
all_registers -data_pi ns and pass the resu l ting collection t o the
report_noise comman d.
-clock_p i n s
Indi cates t ha t the r eporti ng is don e only on p i ns that are clock pins o f
sequential cells . The ef fect is similar to preselect t he clock pins using
all_r egisters - clock_pins and pass the resulting collection to the
report_noise command .
-async_pins
Indica t es that the reporting is done only on the asynchronous p ins of
sequential cells. The effect is similar to preselect t he asynchronous pins
using all_registers - async_pins and pass the resulting co l lection to the
report_no is e command.
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106
- verbose
Shows more detai l s abou t t he calculation of t otal noise on each load pin,
inc l uding the individual contribution of each aggressor as well as noise
bumps propagated from previous stages of the design.
-nosplit
I f t he informa t ion in a given f ield exceeds t he column wid t h , t he n ext field
begi ns on a new li ne, starting in the correct column. The -nosplit option
prevents l ine - spli tting and facilita t es wri t ing software t o extract
information fr om t he report output.
ob j ec t _ list
Specifies the load pins for which the noise reporting i s performed. If no pin
is specified, reporting is performed on t he entire design .
107
107
report_port
report_port
Di s pl a y s port i n f ormat i on within t h e de s ign .
Reports electrical illformatioll of boundary ports such as maximum capacitance, minimum
capacitance , and reports timing information such as maximum transition time and load information for
these ports.
SYNTAX
Syntax
string report_port [-verbose ]
[ -de si gn_ru le]
[ - dr i ve)
[ - inp ut_ del a y )
[ - output_delay)
[ - wire_ l oad ]
[ - no sp li t ]
[por t _ n ames 1
repor t _ p o rt [port_ list ] \
[-de s ign_rule] \
[ - nospli t ]
l i st
port_names
where the arg uments have the following meaning :
ARGUMENTS
- verbose
1
-design_rule
Reports only port desi gn r ule information, including maxCap, manLoad, a nd
[port_ list]
List of ports for which to report on. By default, a report is generated
for all ports.
[ - des i gn_ r u l e ]
Report maximum capacitance, maximum load, and maximum
fanout.
[ - nosp l it ]
I ndicates t ha t the port r eport i ncl udes a l l po r t i nformat i on . By defa ult
only a summary sec tion is displayed that li sts al l ports and their direc tion.
Do not split rows if they do not frt the width of a page .
maxFanout.
-d r ive
Reports only drive r esistance, i nput transition time , a nd driving cell
informa tion for only input and i nout p or ts .
- inp ut_delay
Reports onl y the port input delay in formation you set .
- output_de lay
Reports on ly the port output delay i nf orma tion you set .
-wire load
Reports on l y the port wire load i n formation.
- nosplit
Preven ts li ne sp li tt i ng if co l umn overf l ows. Most de sign i n fo rma ti on is
listed in fixed- width columns . I f the i nf ormat ion f or a given fiel d e xceeds
the column width, the next f ield begins on a new l ine, star ti ng i n t he correct
co l umn . Thi s option prevents line-sp li tting and facilitates writing software
to extract inf orma tion from the report outpu t.
port_names
Di splays i nformat i on on these ports in the c urrent desig n . Each e lemen t in
this lis t i s ei ther a col lect ion o f ports or a pattern ma tching th e port
names .
108
108
report_power
report_power
Generate power reports .
Reports the breakdown of total power consumption. II reports static and dynamic power consumption
on the entire design if no objects are specified. The report includes a break down oftotal power
consumption by type of objects, such as standard cells, memory cells, flip-flops, latches , gates, and
clock cells. You can also request a power consumption report for a specified list of cells.
The power analysis is based on activity factors that are typically provided through a VCD or FSDB file
that you load using the extract_ switching_ activity Tel command. If, for a net no switching activity is
provided , Aprisa assumes a default activity of 0.1 . You can change that value using theta parameter
power_default_toggle_rate. Note that the default toggle rate of all clock nets is fixed to 2.0 alld cannot
be changed.
Aprisa also provides four ta params to control the active ratio of clock-gating cells :
power_cg_default_active_ratio_1st, power_cg_default_active_rafio_2nd,
power_cg_default_active_ratio_3rd, and power_cg_default_active_ratio_extra.
SYNTAX
Syntax
i nt report_power
[ -net_power)
[ - cel l_power]
[ - leaf J
[ -include_ boundary_ nets ]
[ - include_estimated_ clock_network]
[ - sort_by sort_method]
[ - nworst number ]
[ -power_greater_ than threshold]
[ - hierarchy]
( -levels level]
[ -clocks clock_li st ]
[- groups group_ list
report_power [cells] \
[-sort_by name I inte rnal_power
leakage_power I dc_power) \
[- scenari o scenari o ] \
[- verbose)
switching_power I \
[ object_ li st]
[ - verbose]
[ - nosplit]
int number
i nt level
string sort _ method
float threshold
list cloc.k_ list
list group_ list
l ist ob ject_ list
109
109
where the arguments have the following meaning :
ARGUMENTS
- net_power
Indicates to genera t e net-based power r epo rt .
[cells )
List of cells on which to report power. If you do not
specify any cells , you receive a tota l power
consumption report on the design.
[-sort_by name I internal_power
swit c hing_ power I leakage_ power
dc_ power]
Order in which the power information needs to be
reported . The default value is intemal_power.
- cel l _power
Indica t es to generate cell-based power r eport.
-leaf
Indica tes that t he power report should travers e the h ierarchy and report nets
or cells at al l lower -l evels (as if t he design's h i erarchy were flat) . The
default is to report objects at only the current level of h i erarchy.
[-scenario scenario]
- incl ude_ boundary_ n ets
Indicates that the switching power of primary input nets is to be
Name of the scenario . This argument is required
for MCMM designs .
[ - verbose )
Provide a detailed breakdown of power
consumption by cells. Th is argument is only
applicable if you specified a list of cells on which to
report .
co~~ted
when g e n erating th e power r eport; th e default is to excl ude boundary inpu t
nets.
- include_ estimated_clock_ network
I ndicates that t he clock network power estimated by
estimate_ clock_ network_power is t o be i ncluded in the power report.
- sort_by sort_ method
Speci fi es the sorting mode f or the net or c e ll order i n the power report.
-nwo rst number
Indi cates tha t the r eport is to be f i ltered so t hat i t displays only the topmost number of nets or cells sorted by a certa i n type of sort_ method.
- power_ greater _ tha n threshold
Indicates t hat onl y ne ts or cells with total power value equal to or greater
t han t hreshold are to b e r e ported .
-hierarchy
Indicates to generate hiera rchy - based power report.
- levels level
Specifies the number of level s of hier arc hies to be d i splayed in t he
hiera r chy-based power report.
- clocks clock_list
Select only nets and/ or cel ls that belong to the c lock doma i ns specified by
clock_li st and generate report for t he s ele cted objects.
-groups group_ list
Select only nets and / or cel l s t hat belong to the power g roups specified by
group_list and generate report for the sel ec ted obj ects.
object_ l ist
Specifies a list of c ells and / or nets to be displ ayed in the c ell-ba sed and/
or net - based power report.
-verbose
Indicates to report som verbose information, mainly i n the header of the
e
report, such a s opera t ing cond it ion s , wire load models used to calculat e
power, and power unit i n forma tio n, etc.
- nosplit
I ndi ca t es to preven t li ne-spl itting or sect i on - brea king. By defau l t, if the
i nforma t i o n fo r a given fie ld e xceeds its fix ed c ol umn width, che n e xt fie ld
begi ns on a neH li ne , starting i n the correc t co l umn (line-spli tti ng ) . Also
by defaul t, if the information for one line exceeds t he 80 character l imit,
the report is broken into 2 sections, each containing part of the inf ormation
(section - breaki ng).
110
110
report_switchi ng_activity
report_switching_activity
Reports s t atistics on the swi tching activity and s i gnal probabil i ty annotat i on on
the curr e n t design o r instan ce.
Reports signal switching activities (SA) of source pins specified through a collection of input objects .
These input objects can include pins, ports, nets, cells or both.
For each pin, it reports the source of its activity factor, which is one of the following:
•
unfonnat-Activity set to global defaun value as no other activity information is available.
•
VCD-Activ~y
•
FSDB-Activity was read from a FSDB file .
was read from a VCD file.
•
SAIF-Activity read from an SAIF file.
•
derived-Activity was calculated through propagation from other pins.
•
clOck-Activity set to 2.
•
defauH-Activity is set to the value of the ta parameter power_default_togg/e_rate because its
activity is not found in a VCD,FSDB or SAIF flle, and cannot be detenmined through propagation
The report_ switching_ activity Tel command returns a summary report if no arguments are specified.
SYNTAX
Syntax
i n t report_ switching_ activity
[-lis t _no t _annotated)
[- cells cell _ list )
[-averag e_ac t ivity)
[ - base_cloc k elk ]
[-hierarchy]
[ - coverage
[-sor t _ by (hier I toggle]]
[-toggle_li mi t limit )
[-l ist_low_activity )
(-list_by_ sourc e source ]
(- list_no t _annotated)
[ - exclude excl usion_group]
[-i ncl ude_ on ly incl us ion_ group]
report_switching_activity objects \
[-hie rarchical ] \
[-so r t_by name I swi tching_activity] \
-s c enario s c enario name \
[-verbose]
i n t report_ switching_ activity -old
[- rt l I - gate]
(- list_not_ ann otated)
( -cells cell_list ]
list c e ll_ list
s t ring e lk
i n t limit
stri ng source
s tr ing exclusion_group
string inclusion_ group
111
111
ARGUMENTS
-rt l l -ga t e
These options are only supported \vhen the -old opti on is used .
I ndicates whether switchi ng ac t i v ity annotat ions are to be repo rted fo r
objects annotated by an RTL backwa rd SAIF file or a gate -level backward SAIF
f il e. An RTL backwa r d SAI F f ile is genera ted using RTL simu l ati on, and
contains t he switching activity of synthesis invariant objects. These are
objects that a re no t expected t o change during s yn thesis , and include the
design ports, and the outpu ts of sequential and tri - state cel l s. Calling the
report_ awitching_ activity command with -rtl option '-"ti ll report the switching
activity a nnotation on des i gn ports, sequen tial cell ou tput s and t r i-state
outputs . Use the -rtl option after r eading an RTL backward SAIF. A ga t e - level
backward SAI F file is generated using ga t e - level simulation, and contains the
switch i ng activi t y of all design ne t s . Cal l i ng the report_switching_activity
command v!ith -gate op ti on wi ll report the swi t ching ac t ivity anno ta tion on
the des ign nets a nd leaf cell in ternal power arcs and leakage states . Use the
-gate option after reading a gate- level backwa rd SAIF file. Whe n neither rtl or -gate options are u sed, the defau l t -gate is assumed . If both the
options are given, the de f ault -gate is assumed .
where the arguments have the following meaning :
objects
Objects such as ports, nets, pins or cells through
which source pins are identified.
[ -hiera r chical]
Get objects at any level of the hierarchy whose
local name matches .
[- sort_ by name I
switching_activi ty ]
Sort the report by object name or switching
activity. The default value is swifching_acfivity
- s cenario sce nario name
Name of scenario for which to report the switch ing
activity. This argument is required fo r
multi-scenario designs .
[ - verbose ]
Include the toggle rate , clock period , and voltage
in the report.
- lis t _ not_ a nnota ted
When t he comman d is used wi th this f l ag, the r eport lists t he design nets
tha t have n o us er swi tchi n g activity ann o tation . This report does no t include
constant value ne t s (l ogic one/ zero nets) . Note that s uch net s are annotated
with default switching activity if they are not user anno tated .
- ce l ls cells_ li st
Indicates that switchi ng activity a nnotation is to be reported only for t he
specified cells_ list.
-average_activit y
Pr oduces a repo rt wh ich ave r ages t ogg l e ra t e s over the nets in t he des i gn.
When combined with the -hierarchy flag, average swi t c h i ng activity is
computed for each s ub block i n the design .
It is pos si ble using t he f i lter options -excl ude or -incl ude_on ly to ge t a
report of average togg l e rates over a subset of the nets in the design . Th i s
can be usef u l , for instan c e, to get the average tog gle rate fo r an notated
n ets, or even the average toggle rate for annotated nets driven by sequen t ia l
cells .
This option i s not availabl e with the - old opti on.
- base_c l ock e l k
When the - average_ activity r eport is requested, a verage ac t ivi t ies over n ets
a r e reported . The averaged toggl e r ates r eported are by de f a u lt with r e spect
to a fixed t ime unit. When the - base_clock option is used, the r eported
averaged toggle ra tes a r e with respect t o t he peri od of the clock elk .
This option is not availabl e VIith the -ol d option .
-hi erarchy
When t he comman d is used with this fl ag, the r e port generated wil l i nc l ude
i n formatio n about sub b l ocks i n the design . The f l ag cannot be u sed with the
list generating opti o n s for the command.
This option is n ot available with the -old opt i on .
- coverage
Causes t he command to produc e a summary report about the nets a nd the design
t hat have switching a c t ivity information, but have few togg le s. Coverage is
defined as the percentage of nets with more than li mit toggl es . See the option
t oggl e_ limit. This r epo rt can be used to ve rify that switching activities
from simulation or propagation a r e properly exerci sin g the d es i g n . Combined
with t he -hierarchy flag, t he r eport can be used t o make sure t hat each block
in t he design is properly exerc i sed.
This op t ion is not availab le with the -old op ti on .
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112
- sort_by [hier / net_ toggle_ r ate / name ]
When used with the any of the hierarchical reports (that is, using the hierarchy flag with the de fau lt r eport o r with -average_ac tivity o r -
coverage), the hierarchical blocks in the report are sorted either by
h i erarchy (depth first), or by averaged t oggle rate, or by name.
When used with any of t h e l i st reports ( that is, u si ng -l i st_low_activity or
- list_by_source or - list_not_annotated), then the l ist will be sorted by
toggle rate, or by name . For the list reports, the option - sort_ by hier is
not accep t ed.
This option is no t available v th the -old option .
li
- toggle_limi t limit
Sets the lo .. er limi t for what is considered to be few toggl es . This limit is
used by the -coverage repor t and by the -list_l o
redirection operator.
[-aocvm]
For the reported timing paths, list the derating
factors applied to the various gate and net delays
due to advanced on-chip variation (OCV) modeling .
Advanced OCV models are specified using the
read_aocvm and the set_timing_derate
-aocvm_guardband Tel commands .
[-voltage]
Report the voltage applied to the cells. You typically
request this report if you applied supply voltages
manually using the set_ rail_ voltage Tel command, or
allowed automatic updates from the power network
analyser by setting the ta parameter
timing_back_annotate_rail_vo/tage to true .
119
119
-nosplit
Most of the design information is listed in fixed-width columns. If the
in f ormation in a given f ield exceeds the column width, the next field begins
on a new li n e, starting in the correct column . The - nosplit option prevents
[ - variat i on]
For all timing results , show both the mean delay and
the standard deviation.
l ine-splitting and facilitates writing software to extract information from
the report au tpu t.
1.-so r t _ by_ slack]
Sort the timing paths by slack regardless of their
path groups. By default, paths are listed per path
group.
- trace_ latch_ borrow
This option con trols the type of report generated for a path that starts at
a transpar ent latch. If the path startpo i nt borrows from the previou s stage,
usi n g this opt i on causes the report to show the ent i re set of borrowing paths
that lead up to t h e borrowing latch, starting with a nonborrowing path or a
non inverting sequential loop . By default, the report shows only the las t pa t h
in the sequence of borrowing stages. Each stage is reported separately,
showing the time borrowed and l ent and the endpoin t s of the stage . The
cumu la t ive a mount of borrowed time along a sequenc e of stages is not included
in the report . The options - i nput_l)ins , -nets, -transition_ times , capacitance , and - s ignificant_ digi ts apply to every stage in the sequence of
borrowing paths, but the remaining options (for example, - from and -true )
apply only to the l.;;tst stage r eported .
- d on t_merge_ dupl ica tes
This option is available only if the user invokes PrimeTime with the multi_ scenario option . I t turns OFF a main capability in merged reporting
that i s ON by de f ault . Th e op t ion af fe cts t he ma nner i n wh i ch paths f r om
multiple scenarios are merged . By defau l t, when the same path is reported
from more than one scenario, PrimeTime reports only the single most critical
instance of that path i n the merged report a n d shows its associated scenario.
By u si n g th i s option , PrimeTime will not me rge duplicate i ns t anc e s of t h e
same path into a si n g l e instance, but instead shows all c r itical i nstan c e s
of the path from all scenarios. Since the number of paths reported is limited
by the -nworst, -max_paths and other options of this command, t h e resulting
merg ed report, when t h is option is used, may not be evenly spread out across
the design, but instea d may be focussed on the port i on of t h e design that is
critical in each scenario .
-pre_ cornmands pre_command_string
This option is available o n ly if t h e u s e r invoke s Prime Time with the multi_ scenar io opt i on . Th is opt i on allows users to spec i fy a string of
commands to be executed in the slave context before the execution of t h e
merged_ reporting command. Commands must be grouped using the
character,
The max imum size of a command is 1000 chars.
11
11
;
-pas t_commands pos t _ command_ s tring
This option is available o n ly if the user invokes PrimeTime with the mu l ti_scenario option. This option allows user-s to specify a str i ng of
corrunands to be executed in the s l ave con t e x t after t h e execu tion of the
mer g ed_ rep o r t i ng c ommands . Comman ds are grouped us i ng t he
character . The
maximum size of a command is 1000 chars .
-exception s
Pr i n ts user-entered timing exception s, name l y fa l se paths, multi -cyle paths,
and min / ma x delays, that are satisfied per timing pat h being reported . The exceptions option s requires one and only one of the follow i ng t h ree values:
domina nt , overridClen , and e.l.l . Please no t e th a t the additional analysis
required p e r path with - exception s is non - trivi al Therefore, a
report_ timing wi t h -exceptio n s is expected to e x ecute s l owe r than t he exact
same command without the -exceptions option . -exceptions does not work with
-pa.th_ type short / end / swomacy option.
This option ind i cates that the timing paths ar e to be adj u sted using AOCVM
information. The orde r in whic h the pa t hs a r e printed matc h es the order in
which the paths would have been printed had this option not been specified .
This option automatically sets -derate a n d -path_ type full _clock_ exp.anded .
AOCVM derate factors are shown in the Derate column of the timing report .
-recalculate
Indicates that path recalculation shou ld be applied during the search . The
worst recalcu l ated paths meeti n g the path requirements are returned. This
opt i on can r esult in long r u ntimes d u e to the path searching required, This
option does not work with -aocvm., -justify , -true , -slack_ greatar_ than and
other mu lti scenario options. including -pre_ commands , - post_ cormn.and s . dont_ merge_duplicates and -attributes .
collection!
Specifies the collection of timing path s to report . Th is option is mu tually
exclusive of option s which con trol the selection of paths to report and is
only compatibl e wi t h options wh ich con t rol the formatting of the r epor t .
120
120
report_transitive_fa ni n
report_transitive_fanin
Reports l ogic in f an-in o f s pecified si nk objects.
Reports the tanin of listed to-pins.
SYNTAX
Syntax
string report_ transitive_ fanin [- nosplit ) -to sink_l is t
list sink_list
report_transitive_fanin \
[-scenario scenario] \
-to collection \
[ -from collection] \
[-through collection] ... \
[-trace_arcs timing I enabled
[ -quiet] \
[- level cellLevel] \
[-pin_level pinLevel] \
[-nosplit]
ARGUMENTS
- nosplit
all)
where the arguments have the following meaning :
[-s c ena rio s cenario ]
Scenario for which data is requested.
-to collection
List of pins for which to report the fan in.
[- from collection}
Only report that part of the fanin that originates
from a pin from the specified collection.
[- t hroug h co llection ] .. .
Only report that part of the fanin that touChes one
of the pins from one of the specified collections.
Does n ot spl it l i nes i f co lumn overflows .
-to sink_ list
Specifies a list of sink p i ns, ports, or ne t s i n the design, whose transi t 1ve
fan -i n i s reported . I f a net is specified, the e ff e c t is t he same a s lis t i ng
all driver pin s on the net .
[-trace_ a r cs ti ming I e nabled I
al l]
Possible values are:
timing-Stop at disabled cell arcs and timing arcs
that have been cut by case analysis. This is the
defauij value.
enabled-9:op at disabled timing arcs, but ignore
case analysis.
all-Ignore disabled timing arcs and case
analysis. Do tracing purely netl ist·based.
[ -quie t]
Suppress warning messages.
[-level cell Level]
Include pins of all cells that are at a distance up to
eel/Level cell arcs from the root pin.
[ - pin_ leve l pinLevel]
Include all pins that are at a distance up to
pinLevel pin arcs from the root pin.
[ -n osp l it ]
Do not split lines in columns whose lines go
beyond the column width.
121
121
r· port_transitive_fanout
e
Reports logic i n fanout of specified sourc es .
report_transitive_fanout
Reports the fanout of listed to-pins.
SYNTAX
Syntax
string report_ transitive_ fanout [ -nosplit) - clock_tree -from source_list
list source_ list
report transitive fanout \
[-scenario scenario] \
{ -from collection I - clock t ree clocks ) \
[-to collection] \
[-through collection ] ... \
[- trace_ arcs timing I enabled I all] \
[-quiet] \
[-level cellLevel] \
[-pin_ level pinLevel ] \
[-in clude_hiera r ch ica l_pins] \
[-nosplit]
ARGUMENTS
where the arguments have the following meaning :
- nosplit
Does not split lines if column overflows .
-clock_tree
Reports transitive fanout of a ll clock sources in the design.
-from source_ list
Specifies a list of source pins, ports, and nets in the design whose
transitive fanout is reported . If a net is specifi ed, the effect is same as
l i sting all the load pins on the net.
[ - scenario scenario)
Scenario for which data is requested.
-from collection
List of pins for which to report the fanout. Either
this argument or the -clock_free argument must be
specified.
-clock tree clocks
Trace fanout of clock sources. Either this
argument or the -from argument must be
specified.
[-to collection]
Only report paths ending in a pin from the
specified collection.
[-through collection] ...
Only report that part of the fan in that touches a pin
from one of the specified collections.
[ - trace arcs timing I enabled I
a l l]
Possible values are:
timing-Stop at disabled cell arcs and timing arc
that have been cut by case analysis. This is the
default value.
enabled-Stop at disabled timing arcs, but ignorE
case analysis.
122
122
all-Ignore disabled timing arcs and case
analysis. Do tracing purely nellis! based.
[- leve l integer]
Number of traced a res .
[-quiet ]
Suppress warning messages.
[ -leve l
cel l Level ]
Include pins of all cells that are at a distance up t<
eel/Level cell arcs from the root pin .
[ - p in l evel pinLevel]
Include all pins that are at a distance up to
pinLevel pin arcs from the root pin.
[ - in clude_hiera rch i cal _ pins]
Include the module ports of instantiated modules
in the report.
[ -no sp l it]
Do not split lines in columns whose lines go
beyond the column width .
123
123
reset_path
reset_path
Resets spec ifi ed paths to single- cycle behavior.
Removes path exceptions that have been set using the set_fa/se_path and set_multicyc/e_path Tel
commands.
SYNTAX
Syntax
Boolean reset_path
[-setup) [-ho l d)
[ -rise) [ - fall)
[ - from from_ list
I -rise_ from rise_ from_ list
I -fall_from fall _ from_list)
[ - through through_ list ]*
[ -rise_ through rise_ through_ list]*
[-fa l l _ through fall _ through_ list)*
[-to to_ list
I -rise_ to rise_ to_ list
I -fall_ to fall _ to_ list)
reset_path [-setup) \
[-hold) \
[-r ise ) \
[ -fa ll) \
[-from pin-and-ports) \
[-rise_from pin-and-ports] \
[-fall_from pin-and-ports] \
[-to pin-and-ports] \
[-rise_to pin-and-ports] \
[-fall_to pin-and-ports] \
[-through pin-and-ports] \
[-rise_th r ough pin - and - ports]
[-fall_through pin-and-ports]
list
list
l is t
l is t
list
l ist
list
list
list
\
from_ list
rise_ from_ list
fall _ from_ list
through_ list
rise_ through_ l ist
fall _ through_ list
to_ list
rise_ to_ list
fall _ to_ list
ARGUMENTS
where the arguments have the following meaning:
-setup
[-setup]
Only remove path exceptions that were defined for
setup checks.
[ - hold]
Indicates that only setup (maximum delay) evaluation is to be reset to its
default, single-cycle behavior. If neither -setup nor -hold is specified,
both setup and hold checking are reset to single-cycle .
Only remove path exceptions that were defined for
hold checks.
[-rise]
Only remove path exceptions that were defined for
rising signals.
[-fall]
Only remove path exceptions that were defined for
falling signals.
-hold
Indicates that o nl y hold (minimum del ay) evaluation i s to be reset to its
default, single-cycle behavior. If ne ither -setup nor -hold is specif ied,
both setup and hold checking are reset to single-cycle .
- rise
Indicates that only rising path delays are to be rese t to si ngle-cycle
behavior. If neither -rise nor -fall is specified, both rising and falling
delays are reset to single-cycle .
124
124
[-from pin-and-ports]
Indicates that only fa lling path delays are to be reset to single-cycle
behavior . If nei ther -rise nor -fall is specified, both risi ng and falli ng
delays are reset to single-cycle.
-from from_list
Specifies a list of timing path startpoint objects . A valid timing startpoi nt
is a clock, a primary input or inout port. a sequential cell, a clock pin of
a sequential cell, a data pi n of a leve l-sensi tive latch, or a pin that has
i nput delay specified. If a clock is specified, all registers and primary
inputs related to that clock are used as path startpoints. If you specify a
cell, one path startpoint on that cell i s affected. You can use only one of
-from, -rise_ from , and -fall_ from .
-ris e_ from rise_ from_ list
Same as the -from option, except t hat t he path must r i se from the objects
specified. If a clock object is specified, th is option selects startpoints
clocked by t he named clock, but only the paths launched by rising edge of the
clock at the clock source, taking into account any logica l inversions along
the clock path. You can use only one of -from , -rise_ from , and -fall_ fram .
-fall_ from fall _ from_ list
Same as t he -from option, except t hat t he path must fall from the objects
specified . If a clock object is spec i fied. this option selects startpoints
clocked by the named clock, but only the paths launched by fall i ng edge of
the clock at the clock source, tak ing into account any logical i nvers i ons
along the clock path. You can use only one of -from , -rise_ from , and fall _ from .
-through through_list
Specifies a list of pins, ports, and nets through which the paths must pass
that are to be reset. Nets are interpreted to imply the leaf -level driver
p ins . If you omit -through , all timing paths specified using the -from and
to options are affected. You can specify -through more than once in one
command invocation. For a discussion of t he use of multiple -through options,
see t he DESCRIPTION section.
-rise_through rise_through_list
This option is similar to the - through option, but applies o nly to paths with
a rising trans ition at the through points. You can specify -riae_ through more
than once in one command invocation . For a discussion of the use of multiple
-through options, see the DESCRIPTION section.
Only remove path exceptions on paths that
originate at one of the specified pins or ports.
[-rise_ from pin-and-ports ]
Only remove path exceptions on paths that
originate with a rising signal at one of the specified
pins or ports .
[ - fall from pin - and- ports ]
Only remove path exceptions on paths that
originate with a falling signal at one of the
specified pins or ports.
[-to pin-and-ports]
- fall
Only remove path exceptions on paths that end at
one of the specified pins or ports.
[-rise to pin-and-ports]
Only remove path exceptions on paths that end
with a rising signal at one of the specified pins or
ports.
[ - fall to pin - and - ports]
Only remove path exceptions on paths that end
with a falling signal at one of the specified pins or
ports.
[-th ro u gh pin-and-ports]
Only remove path exceptions on paths that pass
through on e of the specified pins or ports.
[-rise through pin-and-ports]
Only remove path exceptions on paths that pass
through one of the specified pins or ports with a
rising signal.
[-fall through pin - and-ports]
Only remove path exceptions on paths that pass
through one of the specified pins or ports with a
falling signal.
[ - trace_ arcs timing I enabled I
all ]
Possible values are:
timing-Stop at disabled cell arcs and timing arcs
that have been cut by case analysis. This is the
default value .
- fa ll_thr ough tall_through_list
This option is similar to the -through option, but applies only to paths with
a rising transition at the through points. You can specify -fall_ through more
than once in one command invocation . For a discussion of the use of multiple
-through options, see the DESCRIPTION section .
-to to_ list
Specifies a list of timing path endpoint obj ects. A valid timing endpoint is
a clock, a primary output or inout port, a sequentia l cell , a data pin of a
sequential ce l l , or a pin that has output delay specified. If a clock is
specified, all registers and primary outputs related to that clock are used
as path endpoints . If a cell is specified, one path endpoint on that cel l is
affec ted . You can use only one of -to , -rise_ to , and -fall_ to .
-rise_t o rise_ to_ list
Same as the -to option, but applies only to paths rising at the endpoint . If
a clock object is specified, this option selects endpoints clocked by the
named clock, but only t he paths captured by rising edge of the c lock at clock
source, taking into account any logical inversions a l ong the clock path. You
can use only one of - to , - rise_ to , and - fall _to .
-fall_ to fall _ to_ list
Same as the - to option,but applies only to paths falling at the e ndpoi nt. If
a clock object i s specified, th i s option selec t s endpoints clocked by the
named clock, but only t h e path s launched by falling edge of the clock at the
clock source, taking into account any logical inversions along t he clock
path . You can use only one of -to , -riae_ to , and - fall_ to .
enabled-Stop at disabled timing arcs, but ignore
case analysis.
all-Ignore disabled timing arcs and case
analysis. Do tracing purely nellis! based .
[- leve l integer]
Number of traced arcs.
[ -quiet]
Suppress warning messages .
[ - level cellLevel]
Include pins of all cells that are at a distance up to
eel/Level cell arcs from the root pin.
[ - pin_l evel pinLevel]
Include all pins that are at a distance up to
pinLeve/ pin arcs from the root pin .
[- include_hierarchical_pi ns]
Include the module ports of instantiated modules
in the report .
[-no sp l it]
Do not split lines in columns whose lines go
beyond the column width.
125
125
reset_timing_derate
reset_timing_de rate
Resets user specified d era te fact o rs set either on a design or on a spec i fied l ist
of ins ta nces (cells , nets or library cells) .
Removes timing derating factors set with the set_ timing_derate Td command.
SYNTAX
Syntax
string reset_ timing_ derate
[ - hierarchical_ net_ delay ]
[ - s ca l ar ] [ - v ar i ati on ]
reset_timing_derate \
[ -aocvrn]
object_list
object_li st
list
where the argument has the following meaning :
ARGUMENTS
-hierarchica l_net_delay
Indicates that net derate facto rs
reset .
wi~hi n
hierarchical cells should also be
[- aocvm]
Only reset derating factors related to aocvm, that
is, factors set by the set_timing_derate
-guardbound Tel command.
-scalar
Indicates that on ly derate factors for deterministic delays should be reset.
-variation
Indicates that onl y dera t e factors fo r statistical delays shou ld be reset.
ob ject_ list
Speci fi es a list of designs, cel ls , l ibrary cel l s or nets which wi ll be reset.
126
126
set_ an notated_ delay
set_annotated_delay
Sets the ne t or cel l delay value be tween t wo pins .
Specifres a delay between two pins. This delay can be a cell delay from an input pin of a cell to an
output pill of the same cell , or a net delay from all output pin of a cell to an input pin of another cell.
This delay replaces or is added to the delay calculated by the timing analyzer.
The delay may only be valid for either a min-timing or max-timing analysis and may be only valid for
risillQ or falling edges of a signal.
Annotated delays typically are read in from an SDF file generated by a third-party timing analysis tool.
Syntax
SYNTAX
string set_ annotated_ delay -c e ll
[ - ris e )
f - Ea ll)
[ - mi n ]
[ -max]
[ - load_ delay load_delay_ type]
[ -from from_pins]
[ - to to_pins]
[ -cond sd f _ expression]
[ -increment]
[ - de lta_ o nly]
[-worst)
- varia tion variation_ob j ect
de l ay_ va l ue
st ring loa a_del a y _ type
l is t
fr om_pi ns
l is t
to_pins
stringsdf_ expression
f l oat delay_ val u e
I
- net
set_annotated_delay delay \
-from collection \
-to collection \
[-net] \
[-cell] \
[-rise]\
[-fall] \
[-min] \
[-max] \
[ -cond string] \
[-load_delay string] \
[-increment] \
[-delta_only] \
[-worst]
127
127
ARGUMENTS
- cel l
where the arguments have th e following meaning :
Delay in pica seconds.
-f r:om s t ar t p i ns
Set delay only on arcs that start from a pin in the set.
Set delay only on arcs that end in a pin in the set.
[- n e t ]
Delay only models the net delay.
[ - cell ]
Delay only models the gate delay.
[- r:i s e ]
Only use this delay for a rising signal at the input pin.
[ - f all ]
Only use this delay for a falling signal at the input pin.
[-min ]
Only use this delay for min-timing , that is, hold analysis.
[ - max ]
Only use this delay for max-timing , that is, setup analysis.
[- i n c r e me n t ]
Add this delay to whatever the timing analyzer calculates based on
cell timing models and net parasitics.
[-d elta_ onl y ]
-net
de l ay
- to e n dp in s
Specifies t ha t the delay annotated is a cel l de l ay . The -cel l and -ne t
argument s are mut ual l y e x c lusive; you mus t spec i fy one, but no t bo t h .
Indicates that this is a delta delay, i.e . a change in delay, that can
be positive or negative.
Specifies that the delay annota t ed is a net delay . The -net and -cell
argumen ts are mutua l ly e x c lusive; you mus t spec i f y one, but not both .
-r ise
I ndicates that the de l ay is for the da ta r ise transit i on . If y ou do not
speci f y e ith er - r i se o r - fall , both va l ue s are set .
-fall
I ndicates t hat the timing check is for the da t a fa l l transit i on. I E you do
no t spec i f y either - rise or - fall , both val ues are set .
- min
Use this option only if the design is in min_max mode (mi n and ma x operating
conditions) . Specif i es the minimum delay for both data rise and da t a fal l
t ransitions.
- load_de lay load_ delay_type
Specifies whether l oad delay is to be inc l uded as part of annotated net delays
o r a s part of annotated cell delays . Allowed values are net or cell . Load
delay is the portion of cell del ay result ing from the capac i tive load of the
net the cell is driving. All timing arc s of the same ne t and of the same ce l l ,
must be annotated with t he same load_ delay_ type .
- f r om fr om_list
Specifies a l i st of leaf cell p i ns and top level po rt s that are the
startpoints of the timing arcs for which delays are a nn ota t ed .
-to to_list
Specifies a l i st of leaf cell pi ns and/or top level ports t hat are the
e ndpo in ts of the timi ng arcs f or \·;hi ch de l ays a r e annotated.
- cond sdf_ e xpression
Use this opt i on onl y if the library has a condition atta ched to the specified
de l ay timin g arc; otherwis e , an error mes sage is genera ced. Spec i f i e s the
condition f o r which the annotated delay is val id . The syn tax of the c ondit ion
must match the cond ition specified i n the library us i ng the construct
sdf cond. The syntax is the same one used i n the Standard Del ay Forma t (SDF).
- incremen t
Spec ifi es t ha t the delay is to be incremented to th e current de lay of the
specified timing arc .
128
128
- delta_on ly
Spec i fies that the annotated delay is to be added to the net delay value
ca l cul a ted by Pr i meTime. You canno t u se t h is opt ion with -cell .
-wor s t
Th i s option is not ye t impl emen t e d , s o it is ignored .
de l ay_val u e
Specifies the delay va lue between pi ns on t he same cell, i n units con s isten t
wit h t he t e chno l ogy libra r y used du r ing op timiza ti on . For exampl e , i f t he
cechnology library s pe cif ies de l ay values i n nanos e conds, d e lay_ value must
be expressed in nanoseconds.
-var i a ti on variatioll_ object
Speci fy a variation t o annota t e on a ll arc s between t he f rom and t o pins. The
var ia t i on_ob ject mu s t be c rea t ed us i ng the c r ea t e_va r ia tion c ommand.
129
129
set_annotated_transition
set annotated transition
Sets the trans i tion time to be ann otated on specified p i ns in t he cur rent design.
Sets a transition time on pins and ports that overrides the transition time that is otherwise calculated by
the timing analyzer based on cell models, net parasitics, orwireload models.
SYNTAX
Syntax
i n t set_ annotated_ transition [ - ri se] [ - fa ll ] [ -min ] [ - max]
[ - delta_on l y) slew_value
set_annotated_t ransition transition_time objects \
pin_list
[-rise] \
fl oa t sle<~_ va lue
l ist pin_list
[ -fall] \
[ -min] \
[ - max] \
[ -delta_onl y)
ARGUMENTS
where the arguments have the following meaning :
-rise
transition time
Time it takes for a signal to transition from high to low or vice
versa.
objec ts
Pins and ports on which this transition is set.
I ndicates that slew_value r epre s en ts the mi ni mum trans ition t i me. Use this
option only if the design is i n min-max mode (min and max operating
[-J:ise]
Transition time is only valid for a rising signal.
c ondit i ons ) .
[-fall ]
Transition time is only valid for a falling signal.
Indicates tha t slew_val ue r ep r esen ts t h e max i mum tra nsi tion tim e . Use th is
option onl y if the design i s in min - max mod e (mi n and max operating
[-min )
Only use this transition time during a min-timing analysis, that is,
during hold analysis.
[ - max)
Only use this transition time during a max-timing analysis, that is,
during setup analysis.
[-delta_o nl y ]
Indicates that the transition time is a delta time, that is. a variation
that might be positive or negative.
Indicates t hat slew_ value repre sen ts the da t a r i se t r ansi t i on time .
-fall
Indicates that slehr_value rep re sent s the data fall tran siti o n time.
-min
- max
conditi ons) _
- delta_only
Indicates that slew_val ue represen ts a delta transit i on time to be added to
t he tran si tion time c omputed by de lay ca lcul a t i on.
s l ew_va l ue
Spe cifies the t ransi tio n time of t he specified pins or por ts , i n uni t s
con sisten t with the technology l ibrary u sed d uri ng opti mization . For e xample,
i f the technology l ibr ary spec ifies delay val ues in nanos econds, slew_value
must be expr essed in nanoseconds. If used wi th the -delta_ only option,
slew_value can be a negative n umber.
pin_lis t
Specifi e s a li s t of pins or port s to be anno tated with the transition time
slew_ value .
130
130
set_aocvm_coefficient
Specifies AOCVM random or systematic coefficients on library cells for use during an
AOCVM analsysis .
SYNTAX
in t
set_ aocvm_ coefficient
[-random path_ depth_ scalar
I
-systematic systemati c_ component_ scalar]
Command: set_aocvm_coefficient [double:value]
standard SOC command
option:
-random double(l.OOO)
-systematic double(l.OOO)
object_list
-sigma_divider
float
float
li s t
path_ depth_ scalar
systematic_component_scalar
object_list
ARGUMENTS
-random path_depth_scalar
Indicates that path_ depth_ scalar is the random coefficient for the spec i fied
library cells in the object_ list . The path_depth_ scalar shou ld be a floating poi nt va lue greater than zero .
--get_option arg
--set_option
--get_default arg
--set_default ...
--system_default
--list_options
--load_options
--license
--help
path depth coefficient
systematic component
coefficient
force to divide the sigma
extracted for pocvm
get option value
set option value
get default value
set default value
use system default values
list current option values
load current option values
list required licenses
display command help
description:
This command is the same as standard SOC command.
-systematic systematic_component_scalar
Indicates that systematic_ component_ scalar is the systema t ic coefficient for
the specif i ed library cells in the object_ list . The
systematic_ component_ scalar should be a floating - poi n t val u e greater than
zero .
ob j ect_ list
Spe cifies a l ist of libr ary ce ll s on whi ch the coefficient i s s et .
131
131
set_aocvm_component
set_aocvm_component
Specifies AOCVM r andom or systematic component o n the top-level
during an AOCVM analys i s.
design for use
NOTE: This command is deprecated. Use the read_aocvm Tel command to read the advanced on-chip
variation derating information.
Conf~gure
the derating factors used during advanced on-chip variation analysis.
You can create a derating table by invoking the set_aocvm_componentTcl command multiple times
with different values for the depth or distance. Aprisa will do linear interpolation or extrapolation to
calculate derating factors for depths or distances for which no derating factor is specified.
Syntax
SYNTAX
i n t set_aocvrn_component
[-ea r ly I -la te]
[-ce l l_d el ay ] [-ne t _delay ]
[-rand om path_ depth I - s y stematic path_ distance ]
value
in t
floa t
f l oa t
list
path_depth
path_ distance
valu e
object_list
ARGUMENTS
-early
set_aocvm_component \
[-rise I -fall] \
[-late I -early] \
[- cell_delay I -net_delay] \
- random I - systematic \
depth_or_distance] \
derate_ factor]
where 1he arguments have 1he following meaning :
[-ri se I fall ]
Controls whetherthe se1ting holds for a !ising or falling
event By default, the selling holds for both.
[-l ate I earl y ]
Controls whether the selling holds for an early path
(signal path for hold analysis, or clock path for setup
analysis) or late path (signal path for setup analysis,
clock path for hold analysis).
Indicates that the componen t wil l apply to del ay arcs that are early derated.
- late
Indi ca tes tha t the componen t wil l apply t o delay arcs t hat are late derated.
-cel l_delay
Indicates that the componen t will apply to cell a rc d elays only.
[- ce ll_ dela y
- net_ delay ]
- n et_delay
Indicates that the component wil l apply to net arc delays only.
Controls whether the setting holds for cell or ne1
delays. By default, both are derated by this selling .
-random I - sys temat i c
Controls whether a random or sys1ematic variation is
being described. For sys1ematic variation, the distance
is in1erpre1ed as the geographical dis1ance of 1he path
being derated. For random variations , the distance is
interpreted as a logical depth. 1hat is. the number of
gates in the path .
dep t h_ or_ distance
Integer number that is e~her a geographical distance
in database units for a systematic variation or a
gate-level distance (that is, number of gates on a
timing path) for a random variation.
derate factor
A real number, which is the de~a by which the cell or
ne1 delays on a path (or both) are derated , tha1 is, their
delays are scaled by a factor (1 + derate_factol} .
- random path_ depth
Indicates tha t value is the random c omponent t o b e used a t a path d e p t h o f
path_ depth. The path_ depth should be an integer val ue g reater than zero .
-systematic path_distance
Indicat es that value is the systematic component to be used a t a path distance
o f pa th_dista n ce. The path_distance shou ld be a fl oating-poi nt v alue greater
than zero .
val u e
Indicates the f r actional quantity oE p r ocess va r iat ion for this component
with respect to n omi na l arc delay to b e set on t h e design . The value should
be a float i ng- p oin t number bet"een 0 and 1.
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132
set_disable_clock_gating_check
Disabl es the clock gat i ng check for specified objects i n the current des i g n .
SYNTAX
s t ri n g set_ disable_ clock_ gating_ check object_ list
list object_list
ARGUMENTS
object_l ist
Specif ies a list of cells and pins for which the clock gat i ng check is to be
disabled.
Command: set_disable_clock_gating_check
standard SOC command
option:
--license
--help
list required licenses
display command help
description:
This command is the same as standard SOC command.
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set_dont_touch
set- dont- touch
Sets the dont_touch attribut e on cel l s, nets, designs, and l ibrary cells to prevent
synthesis from replacin g or modifying them d u ring optimization.
Creates a dont_touch design constraint for selected cells and nets. These cells or nets cannot be
deleted during optimization, though they can be physically moved. If you set a dont_touch constraint
on a module , then all its cells and nets inherit the constraint. The constraint is only effective once you
start simulating or optimizing the design, so subsequent simulator commands, clock definitions, and
case analysis settings are not affected . \Mien the simulation and optimization starts, Aprisa generates
a dont_touch attribute on these cells and nets.
To remove this dont_touch constraint, you must remove the constraint and you need to remove the
dont_touch attributes. Use the remove_dont_touch_network command to remove the constraints in
the database that were set with the set_dont_touch_network Tel command , and use the set_attribute
Tel command to remove all dont_touch attributes on instances and nets.
SYNTAX
Syntax
string set_ dont_touch objec t_ li st [value ]
set - dont- touch nets- or- cells \
[ -ct s objec t ]
li st obj e ct_list
Boolean va lue
ARGUMENTS
where the arguments have the following meaning :
object_lis t
Specifies a lis t of cells , nets, designs, or library cells on wh ich to place
the dont_toucb att r ibute.
nets or ce ll s
Collection of nets and cells fo r which to set the dont_touch
attribute.
value
[- cts object ]
Marte all cells and nets belonging to the clock subtree rooted by the
specified pin, port, or clock with the dont_touch attribute.
Specifies the val u e with which to set the dont_ touch at t ribu t e. Allowed
values are true (the default) or false .
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134
set_dont_touch_network
Sets th e don t _t ouch attribu t e on clock ne t works for syn t h es is.
SYNTAX
string set_ dont_ touch_ network object_ list
list object_list
ARGUMENTS
object_list
Specifies a list of clocks, pins, or ports.
Command: set_dont_touch_network
Set dont_touch on the cells and nets of
downstream of one port/pin, or source point of
clock.
option:
--license
--help
list required licenses
display command help
description:
Set dont_touch on the cells and nets of
downstream of one port/pin, or source point of
clock.
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set_min_library
Sets the li brary to be u sed for minimum delay a n alysis
Command: set_min_library
standard SOC command
The set_ min_ library command is used to relate a minimum conditions l ibrary to a
maximum conditions library .
SYNTAX
string set_min_library
[-min_version min_library]
[-none]
max_ library
stringmin_l ibrary
st r i ngmax_library
option:
-min_version string
-none
--get_option arg
--set_option
--get_default arg
--set_default ...
--system_default
--list_options
--load_options
--license
--help
name of min library
dissociate min library
get option value
set option value
get default value
set default value
use system default values
list current option values
load current option values
list required licenses
display command help
ARGUMENTS
- min_version min_library
The library for min analysis. This l ibra r y is not to be used in the link_path.
-none
Dissociate max_l i brary from its min library
rnax_library
The library for max analys i s . This l i brary shou ld be used in the link_path.
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136
set_ mode
Command: set_mode
Selects the active mode of cell mode groups or design mode groups
SYNTAX
Boo lean set_mode [ - t ype cell I design ]
[mode_ li st]
[i n stance_list ]
lis t
mode_list
list instance_list
option:
-type string(cell)
--get_option arg
--set_option ...
--get_default arg
--set_default ...
--system_default
--list_options
--load_options
--license
--help
not supported yet
get option value
set option value
get default value
set default value
use system default values
list current option values
load current option values
list required licenses
display command help
ARGUMENTS
-type design I cell
Indica tes the type of mode to be made active . This option has the following
mutually-exc l usive valid values : design and cell . The cell value specifies
that cel l modes are to be made active. Cell modes are defined on library cells
in the library. The design value specifies that design modes are to be made
active . Design modes are user specified usi n g define_design_mode_ group and
map_ design_ mode . If the -type option is ornrnitted from the command then this
is equivalent to specifying -type cell
mode list
Specifies a li st of modes, each of which is to be made the active mode for
its mode group. If -type has a cel l va l ue then the mode_list mus t contain
only cell modes . If -type has a design value then the mode list must contain
only design modes.
instance_lis t
Specifies a list of instances for which the specified cell modes are to be
made active. This list must only be included with -type cell .
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137
set_noise_margin
Sets noise margin for a library pin, port , or pin.
set_noise_margin
Specifies noise margins on selected nets for the glitch noise analysis_ Glitch analysis accept four
different noise margins:
•
below_fow is the amount a noise peak might pull down a low signal before it is considered an
undershoot violation.
•
above_low is the amount a noise peak might pull up a low signal before it is no longer considered a
low signal and thu s a glitch violation.
•
below_high is the amount a noise peak might pull down a high signal before it is no longer
considered a high signal and thus a glitch violation _
•
above_high is the amount a noise peak might pull up a high signal before it is considered an
overshoot violation .
set_noise_margin allows you to set values fo r the following:
•
below_fow using the -below_fow argument
•
above_high using the -above_high argument
•
above_/ow and be/ow_high when neither the -be/ow_/ow nor the -above_high argument is
specified. Note that in this case the value is used for both margins.
Note that the glitch analysis always does a regular glitch analysis on all pins when signal integrity is
enabled. If no above_low and below_high margins are specified , it uses default values set by the Ia
para mete rs si_noise_margin_ above_high and si_noise_margin_below_high_
SYNTAX
Syntax
int set_ noise_margin
[-above]
[-be low ]
[ - low)
set_noise_margin \
pin_list \
[-above_high] \
[-below_low] noiseMargin
[-high]
margin_ value
object_list
float margin_valu e
list object_list
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138
ARGUMENTS
-above
where the arguments have the following meaning:
pin_list
List of pins for which the noise margins are
specified and on which to perform overshoot or
undershoot analysis.
[-above_high]
The specified margin holds for a high signal pulled
further up.
[-be low_low]
Specif i es the noise ma r gin for above ground or power rai l noise analysis
The specified margin holds for a low signal pulled
further down .
noiseMargin
Amount of noise voltage that can be injected
before it is considered a noise violation.
region.
-below
Specifies the noise margin for below ground or power rail noise analysis
region.
-low
Specifies the noise margin for ground rai l noise .
- high
Specifies the noise margin for power rail noise.
margin_value
Specifies a margin value . The value is the input height in units of voltage.
1 .0.
obj ec t_li s t
Specifies a list of lib- pins or ports .
If no arguments are given , this value is used for
both the above_Jow and below_high threshold for
the selected pins , thus overriding the equivalent fa
parameter settings.
If the -above_high argument is used , this margin is
used for overshoot analysis, that is, a high signal
pulled higher.
If the -below_Jow argument is used, this margin is
used for undershoot analysis, that is , a low signal
pulled lower.
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139
set_ rail_ voltage
set_rail_voltage
Set s power rail v ol tage o n c e l ls .
Overrides the voltages as set by the operating conditions for a specified list of standard cells. You can
limit the override to only be used for min-time or max-time timing analysis.
Typically, rail voltage overrides are automatically created by Aprisa's power network analyzer, but you
can use the set_rai/_voltage Tel command instead, for example, to import the results calculated from a
third-party power netwo~ analyzer.
When you execute the ser_rai/_voltage Tel command, Aprisa calculates the actual supply voltage of all
affected cells and stores the result as persistent properties on these cells. The sef_rai/_volfage Tel
commands are typically specified in the SOC files. When you save a design, these sef_rail_voftage Tel
commands are not saved as part of the SOC constraint of the database, but the result of these
commands are stored on the affected cells in the design database and thus are persistent. To remove
the rail constraints, use the remove_rai/_volfage Tel command.
For the timing analyzer to take into account the manually specified power supply voltages, before you
issue the set_rai/_voltage Tel command, you must:
•
In case of an MCMM design, you must select the scenario for which to set the voltages by invoking
the set_ working_ scenario Tel command with the name of the scenario. You cannot set voltages for
multiple scenarios.
•
Specify the timing libraries characterized for various voltages. Aprisa will use these libraries to
calculate the various timing parameters through interpolation.
Use the add_scafing_fib_group Tel command to these timing libraries. Then, use the link_ design Tel
command to rebuild the simulator.
•
Disable the automatic backannotation of voltages, calculated during power network analysis.
Set the Ia parameter timing_back_annotate_rail_ voltage to false .
Note that, if you set the rail voltages in the top-level design and you merge in a partnion , then these rail
voltages are propagated in the merged partition .
SYNTAX
Syntax
int set_ rail_voltage
[-rai l _ val u e rva lu e I - r ail_l ist rname_valu e_ list ]
[-min ]
[-max ]
set_ rail_voltage cells\
[-max] \
[ -min] \
cell_list
-rail - value static- rail- value \
[-dynamic_rail_value dynamic_rail_value]
float rvalue
list rname_ val ue_ list
list cell list
140
ARGUMENTS
-rail_value r value
Se ts v olt age on si ngl e- rail cells. If you use thi s opt ion, you c annot use the
-rail_ list option: They are mutually exclusive . Rep l ace rvalue with a decimal
or a n integer value .
where the arguments have the following meaning :
List of standard cells , that is, instances of library cells
for which to set the rail voltage.
( - max ]
-rall l ist rname_value_llst
Se ts voltages o n individual rails of mul ti - rail cells . Replace
rname_value_list wi t h a l is t, which must have even number of elements. (Odd
elements are names of r ai l si even e l ement s are voltage valu es.) The rail n ames
must match the de fi n it i ons of rai l s in t he libr a r y power_suppl y sect ion and
in the library opera ti ng condition s . If you use this o ption , yo u cannot u se
the -rail_value option: The y are mu tua l ly exc lusiv e.
cel ls
The rail voltage applies only to the max PVT condition.
[ - min]
The rail voltage applies only to the min PVT condition.
-rail va l ue static rail value
Static rail voltage
[- dyn ami c_rai l value
Dynamic rail voltage.
d ynamic_ rail_ value ]
- min
Sets rai l voltages for the mi n i mum op erating condition . If you do not specify
eithe r the -min or the -max opt i o n , the tool assumes you are u si n g both the
-mdn a n d -max options.
- max
Sets ra i l voltages for the maxi mum ope rating condition . If you do not specify
either the -min or the -max opt i on, the too l assumes y ou are us i ng both the
-min a n d -max op t ions.
cel l _ l is t
Specifies a list of cel l s on which to set rail voltages . Replace cell_llst
with the collect i on of cel ls you wan t .
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141
set_sense
Specifies u natene ss propagat i ng forward for pins with respect to clock source .
SYNTAX
s tring set_sense
[ -type type ]
[-positive ]
[-negati ve ]
[ -stop_propagation ]
[- logical _s top_propagation]
[-pul se pulse_type ]
[ -c locks clock_ li st]
object_ list
Command: set_sense
standard SOC command
option:
-type sense_type(clock)
-stop_propagation
-positive
-negative
-pulse string
-clocks collection
--get_option arg
--set_option ...
--get_default arg
--set_default ...
--system_default
--list_options
--load_options
--license
--help
specify type of sense (clock or
data) to be applied
sense_type = clock I data
stop propagation of specified
signals
only propagate positive
unateness from clock source
only propagate negative
unateness from clock source
pulse type
constraint applied to specified
clocks only
get option value
set option value
get default value
set default value
use system default values
list current option values
load current option values
list required licenses
display command help
ARGUMENTS
-type type
Specifies whether the type of sense being applied refers to clock ne tworks
or data networks . The possible va l ues for the type variabl e are: 'clock',
'data'. Note that 'clock' is assumed to be the default i f -type option is not
given . Note that i f - type data is given, the -stop_propagation and -clocks
options must be used as well.
description:
This command is the same as standard SDC command.
- clocks clock_ list
Specifies a l ist of c l ock objects to be applied with the given una teness t hat
is placed on all pin objects in the object_ list var iab le . If the -clocks
option is not supplied, all clocks passing through the given pin objects are
considered.
-stop_propagation
Stops t he propagation of spec i fied clocks in the clock_list variable from the
specified pins or cell timing arcs in the object_list variable . Only clock
used as clock is stopped if used with - type clock. To stop propagation for
both clock as clock and clock as data, you need two commands one with -type
clock and one with - type data. The -stop_p ropagat i on option cannot be
specified with the - positive, - negative or - pulse options .
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142
-positive
Specifies positive unateness applied to all pins in the object~list variable
with respect to clock source . The -positive option cannot be specified with
the - negative or -pulse options .
-negative
Specifies negative unateness applied to all pins in the object~list variable
wi t h respect to clock source . The -positive option cannot be specified with
the -negative or -pulse options .
- pulse
pulse~ type
Spec i fies the type of pulse clock applied to all pins in the object~list
variable with respect to clock source. The possible values for the pulse~type
variable are: 'r ise~ triggered~high_pulse', ' fall ~ triggered~high_pulse',
' ri se~triggered~low_pulse', or ' fa l l~triggered~low_pu l se' . The -pulse option
cannot be specified with the -negative or -pulse options .
object ~list
Lists of pins or cell timing arcs with specified unateness to propagate. The
timing arcs object can be used wi th t he - stop_propagation and logical~s top_propagat ion options only .
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143
set_s i_delay_analysis
Command: set_si_delay_analysis
internal development utility
Sets coup ling inf o rma t ion on n ets fo r c rosstalk ana l ys i s .
SYNTAX
i nt set_si_delay_analysis
[-reselect rnets]
[-ignor e_arrival inets]
[ - exclude]
[-victims vnets]
[-aggressors anets]
[-rise]
[-fall]
[ - min ]
[-max ]
l ist
lis t
lis t
list
option:
-exclude
- victim collection
-aggressor collection
- - get_option arg
--set_option ...
--get_default arg
--set_default ...
--system_default
--list_options
--load_options
--license
--help
exclude nets as victims or
aggressors respectively
victime nets
aggressor nets
get option value
set option value
get default value
set default value
use system default values
list current option values
load current option values
list required licenses
display command help
rnets
inets
vnets
anets
ARGUMENTS
- rese l ect rnets
Specifies a list of nets to be rese l ected in each iteration , independent of
reselection c riteria . A net cannot be reselected if it is fi l tered out; if
this is a ttempted, the XTALK-106 message comes up du r ing the update_timing.
You cannot us e this option with the -ignore_ arrival , -exclude , -victims , or
-aggressors options. If it applied on a noncoupled ne t, i t is ignored.
description:
This command is for AtopTech internal use only.
- i gnore_ar rival inets
Specifies a list of nets to be analyzed as infinite wi ndow . You cannot use
this opt ion with the -reselect , -exclude , -victims , or -aggressors options .
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144
-exclude
Indicates that ne ts specified as vnets or anets) ar e to be excluded from the
crosstalk analysis as victim nets or aggressor nets, r espectively . You cannot
use this option with the -reselect or -ignore_arrival option . When both victims vnets and -aggressors anets are applied, all cross capac i tances
between vnets and aneta are exc l uded, when vnets are victims and anets are
aggressors.
-victims vnets
Specifies the l i st of nets on which -exclude i nfo rmation is applied as a
victim. You cannot use this option with the -reselect or -ignore_ arrival
opt i on . IE you use the -victims opt i on, you must u se the -exclude option .
When used with the -aggressors option, -victims exclud es the cross
capacitances between the victim ne t s (vnets) and the aggressor nets {anets).
-aggressors anets
The list of nets on which -exclude option information is applied as an
aggressor. You cannot use this option with the -reselect or -ignore _ arrival
option. If you use the -aggressors option, you must use the -exclude option.
When used with the -victims option, -aggressors exc l udes the cross
capacitances between the victim nets (vnets) and the aggressor nets (anets).
-rise
Excludes a list of nets for victim rising. If you use the - rise option, you
must use the -exclude option .
-fall
Exc l udes a list of nets fo r victim falling . IE you u se the -fall option , y ou
must use the -exclude option .
-min
Excludes a list of ne t s for min path analysis. If you use the - min option,
you mu st use the -exclude option.
-max
Excludes a list of nets for max path analysis. If you use the -max option,
you must use the -exclude option.
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145
set_si_noise_analysis
Command: set_si_noise_analysis
exclude or include specified nets for noise analysis.
Sets coupling information on ne ts for noise analysis.
SYNTAX
int set_si_noise_analysis
[-i gnore_arrival inets]
[- excl ude]
[ - victims vnets]
[ -aggressors anets]
[ -above ]
[-bel ow]
[-low]
[-high]
list inets
l ist vnets
lis t a.nets
ARGUMENTS
-ignore_arrival inets
Specifies a l i st of nets to be set as inf in ite window . When inets are analized
as victims, al l of their aggressors are set with infinite window. When inets
are analized as aggressors, they are set as aggressors with arr ival time
ignored. You cannot use this option with the -exclude , -victims , -aggressors
or -high , -low , -above , -below options.
- exclude
option:
-exclude
-above
-below
-high
-low
-victim collection
-aggressor collection
-ignore_arrival collection
--get_option arg
--set_option ...
--get_default arg
--set_default ...
--system_default
--list_options
--load_options
--license
--help
exclude nets as victims or
aggressors respectively
above
below
high
low
victime nets
aggressor nets
ignore arrival window
get option value
set option value
get default value
set default value
use system default values
list current option values
load current option values
list required licenses
display command help
description:
use -exclude to exclude net from noise analysis
use -victim or -aggressor to specify victim nets
or aggressor nets
use -ignore_arrival to ignore the arrival window
for specified nets
Indicates that ne t s specif ied as vnets or anets ) are to be e x clu ded from the
noise ana l ysis as victim nets or aggressor ne ts, respectively. You cannot use
this opt i on with the -ignore_arrival option. When both -victims vnets and aggressors aneta are applied, the noise be t ween vnets and aneta is no t
a na lyzed, when vnets are victi ms and anets a r e aggresso r s .
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146
- victims vnets
Specifies t he l i s t of nets on which -exclude information is applied as a
victim. You cannot use this option with the -ignore_ arrival opt i on . IE you
use the -victims opti on, you mus t use t he -exclude option . When used with t he
-aggressors opt i on, -victims excludes the noise analys i s be tween the vict i m
ne t s (vnets) and t he aggr es s or ne t s (anets).
-aggressors anets
The li s t of ne t s on whic h - exclude option information is appl i ed as an
aggressor . You cannot use th i s opt i on with the -ignore_ arrival option . I f you
use t he -aggressors opt i on, you mus t use the - exclude op t ion. When used with
the -victims option, -aggressors excludes the noise analysis between the
vic t im ne t s (vnets) and t he aggr essor ne t s (anets) .
- above
Exc l udes a lis t of n e ts for v i c ti m above rai l . I f you u s e the -above op t ion,
you must use the -exclude option.
- below
Exc l udes a lis t of nets f or vict i m be l ow rail . I E you use the -below op t ion,
you must use the -exclude opti on.
-l0\\1
Exc l u des a list of nets for low rail noise ana l ysis.
If you use the - low
option, you must use the -exclude option .
-high
Exc l udes a list of nets for high rail noise analysis. If you u se the -high
option, you must use the -exclude option.
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147
set_switching_activity
set_switching_activity
Sets switching activity annotation on selected nets, pins, ports and cells, etc o f
the curren t design.
Set sw~ching activity (SA) on specified pins , ports , or nets. You can specify the
following ways:
•
Average number of signal changes per
•
In one of the
Average number of signal changes per clock period
•
activ~y
Static probability th at the signal is high
un~
of time
You ca n also use this commed to remove all previously set activitie s.
SYNTAX
i nt set_switching_activity
[-static_probabi lity value ]
[-toggl e_count count]
[ - clock_ derate value]
[-g l itch_c ount count]
[ - state_condi tion state ]
[-path_sources name_list]
[ - rise_ ratio ratio_ value]
[-peri od p e riod_value]
[ - base_ clock clock ]
[-type object_ type_lis t ]
[- n o_hierarchy]
[object_ list]
[-c l ocks clocks )
[ - quiet]
Syntax
set _swi tching_acti vity pinsPortsNets \
{ -static_probabilit y p r ob abi lity I \
- t oggle_c ount count { - period peri od 1 - clock string } I \
-clear }
f loat value
float count
s tr ing state
list name_list
float ratio_value
float period_value
st r ing clock
list object_ type_ list
l ist obj ec t _ list
list clocks
148
148
ARGUMENTS
-static_probability sp_value
Specifies the value of the static_probabil i ty switching activity . sp_value
represents the percentage of the time the signal is at the logic state 1. For
where the argument has the following meaning :
pinsPortsNets
Collection of pins, ports and nets on which to set
the specified activity.
[-static_p robability probability]
Static probability that the signal on the specified
pins, ports and nets is high.
-toggle count count
Average number of signal changes in a specified
time period . Use either the -period argument to
specify an absolute time or use the -clock
argument to specify the clock period to use.
[ - per i od period]
Time in database time units.
example, a value of 0.25 indicates that the signa l is in the l ogic state 1
for 25% of the time .
-toggle_count count
Specifies the value of the togg l e rate switching activity . The count is a
floating point number that represent th e number of 0-1 and 1-0 g l itch free
transitions, that the signal makes during a period of time. The period can
be speci f ied wi th the -period option . Al ternative l y , a re l ated c l oc k can be
annotated using the -base_clock argument, and the specified toggle rate will
be relativ e to the related clock period. If the option -clocks is specified,
the r elated clock is chosen based on which c l ock domain the object belongs.
I f belonging to multiple clock domains, the faster clock "ill be the related
clock . If no c l ock domain is found for the object, choose the fas test c l ock
in the design as the related clock.
- clock_derate value
An al t ernative to -toggle_count if -base_c l ock or -c l ocks is specified. The
annotated toggle rate for a certain object wil l be a factor of the toggle
rate of the r elated clock of the object . The related clock is chosen based
on which c l ock domain the objec t belongs. If belonging to multiple clock
domains, the faster clock will be the related clock. If no clock domain is
found for the object, choose the f astest clock in t he design as the re l ated
c l ock.
[ -c l ock string]
Clock whose period to use for toggle rate .
[- clear ]
Remove all activity information on the specified
ports, pins, and nets.
-glitch_ count count
Specifies the value of t he glitch rate switching activity. The count is a
floating poin t number t hat represent the number of 0 -1 and 1-0 glitch
transitions, that the signal makes during a period of time. The period can
be specified with the -period op tion . Al ternatively, a re l ated clock can be
annotated using the -base_ clock argument, and the specified glitch rate will
be rel ative to the rel ated c l ock period . This option cannot be used with c l ocks.
Pl ease note that i f only one of -toggle_ count or -glitch_ count options is
specified, then the o t he r value is assumed to be zero.
-state_condi t ion .state
Specifies the state condition when a nnotating state - dependent toggle rate and
g l i t ch rate on pins or state-dependent static probabi lities on cells. State
dependent toggle rate and glitch rate can be annotated r.-1hen the internal power
of the library cell pin is characterized with state-dependent power tables.
Sta t e - dependen t sta t ic probabili t ies can be annotated when t he cell leakage
power is characterized with state - dependent power tables . The state condition
speci f ied with th i s argument must be logica l ly equiva l ent to a state
condition in the interna l I leakage power characterization. The state
condition shoul d be enc l osed between " 11 • Moreover, if t h e user wants to set
switching activity information for the default state condition then the
argument of -state_ condition op t ion should be "defau lt". This option cannot
be used wi t h -clocks.
-path_sources name_list
Specifies the path sources when annotating path- dependent toggle rate and
gl i tch rate on pins. This is used when the l ibrary ce l l pin has path-dependent
internal power . The path source(s) specified with this argument must be the
same as those in the internal power characterization. When listing more than
one pin in pa t h sources t he pin names should be separated by a space and
enclosed between" ". For example if the pins in path sources are A and 8,
the argume nt to opt i on -path_ sources wi ll l ook like 11 A B" . Pl ease note that
if name_list is given using -path_sources argument, then state should also
be provided using -state_ condition condition. Th i s option cannot be used v1ith
-clocks .
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-rise_ra t io ratio_value
Specifies the ratio of rise transitions t o total transi tions for the
specified toggle rate a nd glitch rate when annotating pins that are
characterized with both rise and fa l l inte rnal power. The ratio_value
argumen t is a f l oat i ng po i nt number between 0.0 {a l l t ransit i ons are f a l l i ng)
and 1.0 (all transitions are rising). You need t o specify a toggle rate a nd
g l itch rate in order to use this option . The default value is 0.5.
clock domain an object belongs to. I f belonging to mu l tiple clock domains,
the faster c l ock wi l l be t he related c l ock . If no clock domain is f ound fo r
the object, choose the f astest clock in the design as the re l ated clock .
- quiet
Specifies quiet mode and for instance suppresses warnings on design objects
tha t could not be anno t ated on the design.
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set_ user_attribute
set_user attribute
Sets a us er attribute to a speci fi ed value on an object .
Sets a user-defined attribute on an object. First, you need to define the attribute, the value it can
accept, and the class of objects on which it can be placed using the define_ user_ attribute Tel
command.
SYNTAX
Syntax
string set_ user_ attribute
[-c l ass class_name ]
[ -quiet ]
set user attribute objects att name att value [-quiet]
object_spec
attr_ name
valu e
stringclass_name
l is t
object_spec
str ingat tr_name
st ring valu e
ARGUMENTS
where the arguments have the following meaning :
-class class_name
If object_spec is a name, this is its class. Allowable values are design,
port, cell , pin, net, lib, lib_cell, or lib_pin.
Suppresses al l
Collection of objects on which this attribute need to be set.
att name
- quiet
objects
Name of the attribute that will be set. This attribute must have
been created using the define_ user_ attribute Tel command.
att va lue
Value of the attribute. This value must be of the type defined for
this attribute.
[-quiet]
Suppress error messages.
report messages.
o b ject_ spec
Objects on which t o set the att ribute. Each element in the list is a
collection or a pattern which is combined with the class_name to find the
objects .
at tr_name
Shows the name of the attribute.
value
Shows the value of the attribute.
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151
set_variation
# Set variations on timing objects
set variation
Specifies the random variation of delays in library cells for parametric on-chip variation modeling
(POCVM) during timing analysis . POCVM can more accurately assess the imp ad of random delay
variation on circLJit timing, and thus reduces the pessimism of the traditional on-chip variation timing
modeling . Besides the local random variation you set w~h the set_ variation Tel command , you can
also use the read_locv Td command to import a LOCV file that describes distance and
stage-dependent variation. You enable POCVM with the fa parameter timing_pocvm_enable_analysis.
Syntax
set_variation \
-lib ce ll lib~ce ll list \
- sigma value \
[-parameter
random variation
r andom rise variation
variation_list
[object_ list]
(Variation objects to set)
(List of timing objects)
random_fall_vari at ion ]
where the arguments have the following meaning
-li b cell lib cell list
Collection of library cells fo r which the variation is set.
-sigma va lu e
The magnitude of the variation. It is the ratio between the
standard deviation of the cell delay and the nominal cell
delay. This value must be non-negative.
[-parameter
random varia t ion
random rise variation
random fall variation
Variation is set for rise delay, fall delay, or both:
random_ variation-Variation is set for both rise and fall
delays. This is the default value.
random_rise_variation-Variation is set for the rise delay.
random_fa/l_variation-Variation is set for the fall delay.
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sizeof_ collection
sizeof collection
Returns the number o f objects i n a c o l lec t ion.
Return the number of objects in the specified Aprisa collection . This command has the same
functionality as the standard /length Tel command . However, it is much faster and uses less memory
because Aprisa collections are handled by the ATopTech database manager directly.
For this reason, it is good practice to use Aprisa collections and Aprisa functions to operate on these
collections.
SYNTAX
Syntax
int sizeof_ col l ection collection]
collection collectionl
sizeof collection collection
where collection is a collection of objects.
sizeof_collection
Returns the number of objects in a collection.
SYNTAX
i n t sizeof_ collection collection]
col lection collection!
ARGUMENTS
co l lection!
Specifies t he co l lection for which to get the number of objects . If the empty
collection (empty s tr ing) i s u sed for the collectionl argument, t he command
returns 0 .
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153
sort collection
sort_ collection
Sorts a collection based on one or mo r e attributes,
collection. The sort is ascend i ng by default.
r esul ting in a new, s orted
Sorts a list of objects. The sorting is done by comparing the object attributes in the order as listed in the
criteria argument. You can sort using both Aprisa attributes and user-defined attributes. By default, the
objects are sorted in ascending order. The command also supports dictionary-style sorting , that is,
when the names contain numbers, these numbers are sorted numerically.
SYNTAX
Syn tax
co lle ct i on sort_collection [-des cend ing ] col l ection l c ri ter i a
c o ll ect i o n c olle c t ionl
l ist crit e ria
sort_coll e ction obj ects (criteria li s t) \
[-descen d ing] \
[- noca se ] \
[ -di c tionary]
ARGUMENTS
- descending
Indicates that the collection i s to be so rted i n reve rse o r de r. By defau l t ,
the sort proceeds in ascending order.
where the arguments have the following meaning:
objects
List of objects to sort.
{ cri teria_list)
List of object attributes on which to sort. The attributes are used in
the specified orde r.
[ - d escending]
Sort objects in descending order.
[ -nocase]
Ignore case for sorting .
[ - d ictionary]
Use dictionary-style comparison
col l ec tionl
Specifies the collection to be sorted.
criteria
Specifies a l ist of one or mo re application or user -de fined attributes to use
as sort k e ys .
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swap_cell
swap_cell
Swaps one or more c e lls wi t h a new design or library cell.
Renames and possibly moves a cell in the netlist hierarchy without changing the layout, that is, without
changing the cell, its location, or its connectivity.
This operation is mostly used during a metal-only ECO when a placed spare cell , in the logic hierarchy
typically located in the top module, is used to make a logic change in some module.
SYNTAX
Syntax
i nt swap_cell c ell_l ist swap_in
swap_cell cell \
-rename name \
[-dont_preserve_constraints]
[ - file file_name]
[ - forma t file_format]
l ist cell list
string swap_in
stringfile_name
string file_format
ARGUMENTS
where the arguments have the following meaning:
ce l l _ list
Specifies a list of cells to be swapped out .
cell
Cell, that is, library cell instance or module instance you want to
rename.
- rename name
New hierarchical name for the cell. If you use the hierarchy
separator, this cell effectively moves in the logic hierarchy.
swap_in
Specifies the name of the design or library cell to be swapped in.
- dont_preserve_constraints
Indicates that swap_ cell is not to reapply the current design constraints
after the swap.
-file file_name
Specifies the name of a fi le tha t contains a design that is to be swapped in .
- format file_format
Specif i es the format for file_name . Allowed va l ues are db (the default),
Verilog, EDIF, and VHDL.
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update_noise
Performs stat ic crosstalk noi se analysis fo r the current design.
SYNTAX
int update_ noise [-full]
ARGUMENTS
- full
Command: update_noise
update functional noise
option:
--license
list required licenses
--help
display command help
license: AP
Command: update_rlc_model
update all RLC models to ensure data consistency
option:
-rlc_model string
only update specified RLC-model
--get_option arg
get option value
-- set_option ...
set option value
--get_default arg
get default value
--set_default ...
set default value
--system_default
use system default values
--list_options
list current option values
--load_options
load current option values
--license
list required licenses
--help
display command help
description:
This should be the last command in the rlc_model file.
By default, update_noise performs the noise analysis only if the design is
not up to date for noise analysis. Using -full , forces the update_ noise to
perform the noise analysis regardless whether the design is out of date or
not.
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156
update_timing
Upda t e s t imi n g i n f o r ma ti on on the curre nt de sign .
update_ti ming
Invokes the timing simulator on the design. The simulator can run in regular or incremental mode. A
regular analysis ignores all current analysis information . An incremental simulation uses the results of
the previous analysis and the changes made to the design since the last analysis. By default, AP
knows when it can run in incremental mode and when it needs a fu ll analysis. However, you can force
a complete analysis.
This command also determines whether a new parasitic extraction is needed , and whether the
extraction and timing information of its hard partitions need to be updated as well.
For MCMM designs, the timing information is updated for all scenarios, unless you specify a scenario.
SYNTAX
Syntax
string update_timing [-full]
update_timing [-full] \
[ -scenario scenario_name]
ARGUMENTS
where the arguments have the following meaning :
- full
Indicates that t he entire timi ng ana l y s i s is to be per formed from the
begi nn i ng . The def au l t is t o perform an i nc r ementa l a na l ysis, which update s
only out-of-date i nforma t ion a nd runs more qu i c k ly.
[ - f u ll]
Run a complete timing analysis. By default, an incremental
timing analysis is performed.
[ - scen a ri o s cen ario_ name]
Name of scenario for which to update the t iming
infonmation . By default, the timing information is updated
for all scenarios. If you specify the -scenario argument,
you can only update one scenario at a time.
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157
write_parasitics
Writes out a nnotated parasitics information for the c u rrent design.
write_parasitics
Wr~es
parasitic information to a user-specified file. By default, the parasitic data is written in SPEF
format.
SYNTAX
Syntax
Boolean write_parasitics
- fo r mat file_fmt
write_parasitics file \
[-use_name_map] \
[-no_coupling_c a p] \
[-mi n] \
file_name
string file_fmt
string file_ name
ARGUMENTS
-format tile_fmt
Specifies the format of the output parasitics file. Currently, the only
allowed values are SPEF (Standard Parasitic Exchange Format) and SBPF
(Synopsys Binary Paras itics Forma t ) .
[-max ] \
[-flat] \
[- forma t SPEF I DSPF]
where the arguments have the following meaning :
file
Name of the output file with parasitic information.
[ - u se_name_map ]
Use a name map when generating an SPEF file. The name
map is part of the SPEF standard: it reduces the file size by
translating names into numeric IDs.
[ -no coupling cap]
Do not include coupling capacitance
[ - min ]
Write parasitic data for the minimum PVT condition, that is, the
condition that results in minimum parasitic resistance and
capacitance.
[ - max]
Write the parasitic data for the maximum PVT condition , that
is , the condition that results in maximum parasitic resistance
and capacitance .
( -flat]
Flatten the nellis!, then write parasitic data .
[-format SPEF I DSPF]
Fonmat of the file. The default value is SPEF.
fi l e _ name
Specifies the name of the output parasi t ics file.
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158
write sdc
wnte sac
Writes out a script in Synopsys Des ign Constraints (SOC) format.
Writes design constraints to a user-specified file using the standard SOC format. SDC constraints
typically contain information on the following:
•
Clocks-Clock. definitions, clock latency, clock. uncertainty, and clock transition times
•
Ports-Minimum and maximum arrival times of signals on input ports, and minimum and maximum
required arrival times of signals at output ports
•
Signals-Minimum and maximum transition times, maximum allowed output load ,
•
Paths-Maximum and minimum allowed delay on signal paths, false paths, and multi-cycle paths.
These design constraints are used by both construction tools (such as placement/optimization, routing,
and clock-tree synthesis) and analysis tools (such as timing analysis and the DRC checker). You can
write all SOC constraints or select types of design constraints.
Syntax
SYNTAX
i n t write_ sdc file_name [-version s dc_ver sion ]
[ -compress compression] [- i nclude categories list]
[-nosplit ]
s t r i n gversi on
string f i 1 e_name
stri n gcompression
list
categories list
ARGUMENTS
write sdc file \
[ -p ort_latency] \
[ -p ort_latency_only] \
[-pin_latency_only] \
[ -latency_offset only] \
[-balanced_source_latency_only]
[ -cancel_out } \
[ -ex tension ] \
[ -group_path_only] \
[-scena rio scenario_list ]
\
where the arguments have the following meaning:
f.ile_narne
Sp ecifies the name of the file to which the SDC script is t o be wri t ten .
-version sdc_ version
Sp ecifies the ver sion o f SDC to write . Allowed values are 1 . 2, 1.3 , 1 . 4, 1.5 ,
1.6 and latest (the default).
-compress compression
Specify that the script should be compressed . The on ly valid value for
compression is gzip.
file
Name of the output file with the SOC constraints.
[ -port_late ncy]
Include the clock latency of each module port of the current
design.
[- port la te ncy_o n l y )
Only w rite out the clock latencies of the ports.
-include include_list
Write specified command categories on l y . The only valid value f or
include_list is exceptions.
- no spli t
The - nosplit opti on preven ts l i ne-sp l i tting . This is most us eful for doing
diff on previous scripts, or for post - processing the script .
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159
[ - pi n l at e ncy_ on ly]
Only write out the clock latencies of the pins.
[-latency_ offset_ only ]
Only write clock latency offsets. The latency of the clock at the
various clock pins does not vary much during minor design
changes. Instead of recalculating these latencies after every
design change, they can be written to a file once and read
during successive iterations of the design. Besides cutting
down on run-time, designs typically converge faster with this
approach .
[-ba l anced_ source l a t ency
on l y ]
Identify the clocks that have the longest average latency, then
add source latency constraints to all other clocks so that their
average clock latency matches that of the longest clock. It
does so to minimize the timing slack on inter-clock paths .
[ -can cel_out]
Set the clock source latency so that it cancels out the average
clock network latency. First, the average clock arrival time of all
clock sink pins is calculated. Then , the clock source latency is
set to the negative value of that average clock network latency.
This way, the average clock source latency and the network
latency will cancel each other out.
[ - exte n s ion ]
Write all SDC constraints including SDC extensions.
[-group_p ath_ on l y]
Only write group path constraints.
[ - scen ario scenar io list ]
Write seperate SDC files for the listed scenarios. This
argument is only applicable in multi-scenario mode. Each SDC
file name will have the scenario name as suffix.
By default, all constraints of all scenarios in the
current_ session are written.
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write_sdf
Writes a Standa rd Delay Format (SDF ) back- anno t a tion fi l e .
write sdf
Wr~es
timing data calculated by AP's timing analyzer to a user-specified file using the Standard-Delay
Format (SDF, version 3.0) format. This information typically includes:
•
Environment and technology conditions for which these results are valid
•
Minimum and maximum pin and path delays
•
Setup and hold slacks on inputs of memory elements
•
Timing constraints
•
Skew information
The runtime fa parameter, write_sdf_tmcheck_allow_neg_val, controls whether negative values are
allowed in the TIMINGCHECK section . Note that, this feature is strictly speaking not supported by the
SDF 3.0 standard , but it is supported by some third-party tools .
By default, derated delays are reported, but you have the option to get underated delays.
If Sl analysis is enabled during timing analysis , the write_sdfTcl command merges both the non-S I
net-edge delay and 51-induced delta delay in the interconnect delay value written in the SDF file.
If you only want the non-SI net-edge delay in the interconnect delay value in the SDF file , you must
disable Sl analysis before using the update_timing and write_sdtTcl commands.
You can control the precision with which the results are printed out, and you can filter out disabled arcs
and arcs with invalid delays.
Aprisa's SDF writer also supports condition labels and the CONDELSE statement needed for
conditional paths.
Note that this command uses the current setting of theta parameter propagate_ clocks. If th is
parameter is set to false, then , regardless their current values, clock-tree delays and transition times
are set to zero in the SDF file .
SYNTAX
s tr ing write_ sdf [ -version sdf_ version]
[ -no_ ce l l _ delays]
[ - no_ timing_ checks]
[ - no_ net_ de lays]
[ -input_port_ n ets ]
[ - outpu t _p ort_ ne ts ]
[ - signif i can t_digits digits ]
[- enabled_ arcs_ on ly]
[ -no_ internal_pins]
[ - instance inst_ name ]
[ -context sdf_ context ]
[ - map sdf_ map_ file_ list ]
[ - annotated ]
[ -l eve l s l eve l]
[ -no_ edge ]
Syntax
write sdf file \
[-significant digits number]
[-increment] \
[-enabled_arcs_only]
[-no_derated_delays]
\
\
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161
[ - compress compression]
[ -i nc l ude include_ li st]
[ - exclude exclude_ li st]
[ - n o_ negativ e _ de lays)
[ - n o_e dge_merg ing arc_type_ list]
file_name
s trings d f _version
int digi ts
string inst_name
string f i 1 e_ name
s tringsdf _ context
list sdf_ map_ f il e_ list
in t level
s tr ingcompression
ARGUMENTS
-version sdt_ version
Selects which SDF version t o use. Supported SDF version s are 1 . 0 , 2 . 1, and
3.0. SDF 2.1 is t he defaul t .
-no_ cell_ delays
Indicates that no cell delays are be written in the SDF file. By default, all
cell pin-to-pin delays are written to the SDF file. Cell delays include the
load delay of the cell . Following the SDF conventions, only cell input pin
where the arguments have the following meaning:
file
Name of the SDF file to write.
[ -signifi cant_dig i ts number]
Number of digits to include after the decimal point. The
default value is 3.
[-i ncrement ]
Generates an incremental SDF file.
[-enabled_ arcs _ only ]
Skip disabled arcs and other arcs with invalid delays .
[- no_derated_delays ]
Report the non-derated delay values in the SDF file.
to cell output pin delays are written. In case one cell output is unbuffered,
delays are usually represented in libraries by a delay from an ou tput pin to
another output pin. Because this is not allowed by the SDF convention , the
SDF delay for an unbuffered output is specified from ce l l inputs .
-no_ tirning_checks
Indicates t hat no cell timing checks are to be written in the SDF file. By
default, all cell timing checks (for example, setup, hold , recovery, and
removal) are written to the SDF file.
-no_ net _ delays
Indicates that no net delays are to be written in the SDF file. By default,
all net pin-to-pin delays are written to the SDF file.
NOTE: The following standard arguments to the write_sdfTcl command are not yet supported:
- no_cell_delays, - no_ t iming_ c h ec ks, -no_n et_ delays, - input_ port_nets,
-output_ port_ nets , - no_internal_pins, -no_edge, -annotated,
-no negative_delays , -levels , -instance , -context , -version,
-compression , -map, -no_ edge_ merging
- input_port_nets
Indicates that the SDF file is to include delays of nets connected to input
ports of the current design. By default, these delays are not written to the
SDF file because the external connectivity information for ports is not
available. If -instance is specified, then all net delays across the instance
boundary leading to a pin inside the ins tance are included ins t ead. The pin
must be be found on any of levels 1 to level of hierarchy if - levels level
is specified .
-output_port_ nets
Indicates that the SDF file is to include delays of nets connected to output
ports of the cu rrent design. By defau lt, these delays are not written to the
SDF file because t h e extern al connectivity in formation for ports is not
available. If -instance is specified, then all net delays across the instance
boundary leading from a pin i n side the instance are included instead. The pin
must be be found on any of levels 1 to level of hierarchy if -levels level
is specified .
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162
-significant_digits digits
Specifies t he number of digits to the right of t he decimal point that are to
be written in SDF delay triplets. Allowed values are 0-13; the default is 3.
-enabled_arcs_only
Indicates that the SDF file is to contain delays only of enabled timing arcs,
and is not to include delays of currently-disabled timing arcs. By default,
delays of al l timing arcs in the design are written to the SDF file, whether
they are disabled or enabled.
- n o_ internal_p ins
Indicates that the SDF file is no t to include delay timing arcs f rom or to
internal pins . Timing arcs to or from i n ternal pins are expanded into delays
from and to primary input and output of the given cell .
-instance inst_name
Specifies that the SDF file is to be written onl y for the instance named
inst_name. By default, all pin names are relative to the inst_name. However,
if boundary net delays are inc l uded {-input_port_nets or -output_port_ nets )
all pin names are relative to the top design. Note that i n general, if input_port_ nets or -output_port_ nets is specif i ed, boundary nets are written
leaf-to-leaf and do n ot start or end on hierarchical pins. If boundary nets
are required to star t or end on hierarchical pins, refer to the
write_physical_ annotations command.
-context sdf_ context
Specifies the context for writing bus names i n SDF. Valid values are verilog,
vhdl, or none {the default) . In the verilog context, when pin names are
disp layed,
t he l ast two square bracket characters ( '' [" and
11
]
11
)
are not
escaped. In t he vhdl context, t he last two parenthesis character s ( " {" and
")" ) in a pin name are not escaped. In t he default context none, all busde l imiting characters are escaped with a backslash character {"always
escap ed . When used with t he - map option, - context also af fec ts the way names
are printed in mapped SDF fi les . In t h e verilog context, names are printed
in %s[%d] f ormat; in the vhdl context, names are printed in %s{%d) format .
Note: Names are affected only if they are mapped u s ing the
bus{name_ to_ be_ changed) function in the mapping file.
-map sdf_map_ file_ list
Specifies a list of mapping fi les the SDF wr iter is to use when writing out
the SDF file. A mapping file contains a user-specified format for printing
SDF cell delays and constraints. When writing out SDF f or a cell, the SDF
writer takes the user-spec ifi ed mapping, if presen t, to print out SDF for the
ce ll . If no user-specified mapp ing i s present for a cell, the SDF writer
\'Jr ites out SDF in the normal way .
-annotated
Indicates that the SDF is to include only timing arcs that have been annotated
with the read_ sdf , set_annotated_ delay , or set_ annotated_ check commands .
- levels level
Specifies the number of leve ls of hierarchy for which the SDF is written out .
Level 1 means only the top design or inst_ name. Value of N means all levels
of hierarchy, 1 t o N. By default, all levels o f hierarchy are writ ten out .
Note t hat boundary net delays ( -input_port_ nets , - output_port_ nets )
typically have some net arcs from or to pins outs ide the inst_ name . The
location of such outside pins i s not limited by -levels . That i s, the -levels
and - instance options let you choose which boundary arcs are included, but
do not restr ict where the a r cs lead outside of inst_ name.
-no_ edge
Indicates that the generated SDF i s n ot to inc l ude any edges {posedge or
negedge) for both combinational and sequential IOPATHs.
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file_name
Specifie s the name of the SDF file to be wr i tten.
- comp r e ss compr ession
Specifie s a for mat to be used to compress t he file . The on ly va lid val ue for
compres sion is gz i p . By def au l t, files a re not compressed .
-incl ude i ncl ude_ lis t
Specifie s a list of con struc t s to i ncl ude in t he SDF file ; these replace o ne
o r more c on structs f rom the set of default con structs . Allowed va l ues are one
or more of t he follow ing :
• SETOPHOLD , which i ndica t e s t ha t a ll SETUP and HOLD cons t r uc ts a re t o be
replac ed by SETO PHOLD con structs . If a pa i r of s e t up an d hold a rcs are fo und
between the s ame pi n edges , t i ming in fo rmat i on for t he/both a rc / ar cs i s
written i n a single SETUPHOLD construct . If a si ng l e setup / hold arc is fo und
then t he arc will be wr itten i n a si ngle SETUPHOLD c on str uc t with no timing
i n formation for the hold/setup port i on . SETOPHOLD s uppo rt s nega tive val ues
a nd ca n be wr itten onl y fo r version s 2 . 1 a nd 3 . 0 .
• RECREM, which indica t es that al l RECOVERY and REMOVAL cons t ructs are to be
rep laced by RECREM construc t s . If a pair of recovery and removal arcs are
f ound between the same p in edges, timing information for both arcs is written
in a single RECREM construct .I f a si ng le recovery/ removal arc is found then
the arc will be written in a single RECREM construc t wi t h no timing
information f or the removal / recover y portion. RECREM supports negat ive values
and c a n be written only f o r vers ion 3.0 .
-exclude exclude_ list
Specifies a list of timing values of cons t ruc t types t o be either e x cluded
f rom the SDF file i n order to reduce its size, or to be replac ed by another
construct, as in the case of condelse . Al l owed values are one or mor e of the
f ollowing :
• constant_ nets, which indicates that ne ts are to be omitted from the SDF
fi l e if t hey propagate a cons t ant.
• constan t_delay_arcs, wh ich indicates t hat delay arcs are to be omitted from
t h e SDF fi l e if they propagate a constant,
l ogical inputs .
eith er from case analysis or
• default_cel l_delay_arcs, which indicates that all defaul t cel l delay arcs
are t o be omit ted from the SDF file if conditional delay arcs are presen t.
If there are no conditional delay arcs, the default cell delay arcs are
wri t t en to the SDF file .
• wlm_ load_de l ay, which indicates that net delays and cell de l ays calculated
using WLM are to be ornrnit t ed from t he SDF.
• checkpins, when library compiler finds both combina t iona l and sequential
arcs between pins, a checkpin is created so that all arcs are expanded in the
db so t hat a sin gle ar c pinA-pinB is rep l aced by the combina t ion of a positive
una t e arc p inA-pinAcheckpinl with zero delay and an arc pinAcheckpinl -pinB
with the same sense and val ues as t he or i g ina l arc. W
hen this option is set
t he SDF is wr i t t en out as i f a l l checkpins were neve r created .
• no_ condelse, indicates that PrimeTime will not use t he condelse statemen t
to write ou t defau lt iopaths. By defau l t PrirneTirne will replace default
iop aths with t h e condelse construct . Spec ifying this option will result the
condelse statement being replaced by a default iopath . This option should be
used for generating simu l ator compa t ibl e SDF.
- no_negati ve_delays
Specifies t hat PrirneTime will generate an sdf file wi thout negative delays .
Any del ay values which are negative prior to writing the sdf file wi l l be
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represented as a zero in the sdf file. This option should be used when the
sdf file is intended for simulator use. Using this option leads to inaccruate
delay estimation in PrimeTime, so the user should use caution with this
option.
-no_ edge_ rnerging
Specifies a list of arc types which are not to be compressed in the SDF file
through edge merging. Allowed values are one or more of the following
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wrlte_spice
write_spice_deck
W
rites to a SPICE deck t he paths or ar cs generated by
get_ timing_ arcs.
get _ t~ing_paths
or
Generates a nellis! in Spice format of a set of paths in a clock tree. You specify the paths to include by
specifying the source pins and sink pins.
By default, the order of pins of all cells is assumed to be the order of those pins in the LEF library.
However, if you provide a list of Spice subcircuits , then the pins are ordered according to the Spice
subcircuil definitions .
Sources pins can be:
•
ports
•
SYNTAX
in t write_ spice_deck
[- a l ign_ aggressors ]
[- a n a l ysis_ type type ]
[ - c _ effecti v e_ l oad ]
[ - fu ll_ c l ock_ cone ]
[- ground_coup ling_ capac i tor s ]
[ - header header_ fi l e_ name ]
[ - i n i tial _ delay delay ]
[-l ogi c_o ne_na rne vl name ]
[ - l ogic_ one_ vo l tage vl ]
[ -l ogi c_z e ro_narne vOn ame ]
[-l ogic_ zero_vol t age vO ]
[ - margin margin_value ]
[-rninirnurn_t ransition_ t irne trans ]
[ - n o_ clock_ t r ee]
[ - output file_ name ]
[-pre_ d river]
[- sub_ circu it_f i l e spice_sub_circuit_file]
[-s weep_ size number_o f_points ]
[- sweep_ step num ]
[-t irne _pr e ci s i on p r eci s i on ]
[- t r a n s i ent _ s i ze t ran_s i ze ]
[-t ran s i ent_s t ep tran_ step ]
[-u se_p robe ]
[- u ser_rneasures user_ measure_list ]
[-sarnp l e_ s i ze number_of_ samples]
clock meshes
•
ECK pins of ICG cells
Syntax
write_spice \
-from_pins fromPins \
-to_pins toPins \
[-subcircuit sub_circ uit_file] \
output_ file
pa t hs_ arcs_ lis t
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stringheader_file_ name
float delay
stringvlname
float vl
stringvOname
float v O
float margin_value
float trans
stringpaths
stringfile_name
s tring spice_ sub_circ uit_fil e
unsignednumber_ of_points
float num
unsignedprecision
f l oat tran_ size
floa t tran_step
int
number_of_samples
ARGUMENTS
where the arguments have the following meaning:
-align_aggressors
Apply only to a net t iming arc. Indica t es tha t t he relative switch i ng time
of t h e active a g gress or s o f the net ar c compu t e by t h e cross ta l k de l a y o r
noise bump are wr it ten out the correspondi ng PWL statement. It is effect i v e
i f the ne t has a coupled RC network annotated. The v ictim wi ll s wi t ch a f ter
t h e ini tia l _ de lay a n d the active a ggressors wi ll swi tch relative t o t ha t .
Spice uses t he ca l cul at i on eng ine t o get the worst case a lignment, and uses
simi ll ar se t up so t hat a l ignment stays val i d. i.e. the fi l tered aggressors
a r e not c ons i dered as ef f e c tive d u r ing c a l culati on so t h ey are c oupling
capaci t ance is grounded.
-ana l ysis _t ype type
Specifies the type of cross talk/noise analysis for the spice deck generated.
The possible cros st al k delay t ypes are max~rise 1 ma x _ f a ll min_rise and
mi n_ fa ll . The possibl e n o ise types are above_ high , above_ l ow, bel ow_ h i gh and
below_low. This option has no e ff ect on t he timing path . The defaul t value
i s max_ rise f or a t iming arc.
-f rom_pins
Start pin for which to generate a netlist in Spice
format
fromPins
End pin for which to generate a nellis! in Spice
format.
- t o _ p i ns toPins
[-subcircuit sub circuit
1
output_ file
file ]
If specified, the pins of the cells are ordered
according to the port positions in the
sub_ circuit_ file. Otherwise , they are
ordered based on port positions in the LEF file .
sub_ circuit_ file must be in spice format.
Name ofthe file to create.
-c_effec t ive_load
I ndica t es t hat the e f fective capaci t ors computed by t he PrimeT i me during the
de l ay c al cul ation are connected t o some d river pi ns i n t he SPICE d eck . Th ese
d r iver pins are not driving any victim nets and aggressor nets.
- fu l l _ clock_ cone
Indicates that the ful l fan - in cone of the c l ock tree is to be genera t ed . By
defaul t , i f the clock is propagated , a singl e cha in o f c l ock tree ga t es is
gener a t e d ; other wi se, a piecewise linear waveform ( PWL ) is c onnec t ed to the
c lock pin. No t e that us i ng t his opt i on could generate a very l arge spi ce deck,
because write_spice_ deck must de t e r mine a l l vol t age lev els or waveforms of
every i nput port o f these input c o nes. An e r ro r message is issued i f no_clock_tree is also set .
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-ground_coupling_capacitors
Indicates that the aggressors of the timing path or timing arc are not
written. The associated coupling capacitors are grounded with the factor one.
-header header_file_name
Specifi es the path to the user header fi l e whose content is copied to the
spice deck generated. User can use this file to identify the spice deck, to
include the library file (s), or to copy text to spice deck for any o t her
purposes to f acili tate t he sp i ce run.
-initial_delay delay
Specifies the ini t ial de l ay , in lib rary un i t, added to al l PWL statements.
The de f ault value i s the longest clock per i od, or 1.0 l ibrary unit for
asynchronous designs. Note that setting delay to zero makes generating a ramp
difficult and is not recommended.
-logic_one_narne v1name
Specifies name of the default upper rail voltage source.
-logic_one_voltage vl
Specifies the upper rail of the vol t age swi ng of the gate input pins. This
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is used in t he PWL and power rail vdd generated by the command . The default
value i s ma in library vol tage . This option will be effecti ve on l y if t he
variab l e l ibrary_th resholds_use_main_lib is set to TRUE.
-logic_ zero_name vOname
Speci fies name of the default l ower rail vo l tage source.
- logic_zero_voltage v O
Specifies the lower rail of vo l tage swing of the gate input pins. Th is is
used in the PW and t he ground vo l tage vss generated by t he command . The
L
default val ue is 0 volts . This option wi l l be e ffect ive only if t he variable
library_ thresholds_use_main_lib i s set to TRUE.
-margin margin_value
Specifies t he va lue in time to be reduced from the swit ching time o f the data
pin of the l unching sequen t ia l cell of the timing path or timing arc.
-minimum_transition_time trans
Spe c i fies the min imum transition time in nanoseconds , to be used in al l
generated PWL i f t he t r ansition time computed by PrimeTime is s mal l er than
trans. The de faul t value i s 0.001 n s; trans ition times l ess than 0.000 1 n s
are n ot recommended.
-no_ clock_tree
Indi cates no clock path is traced . A c l ock pul s e s t atement is connec t ed
direct l y t o t h e clock pin of a sequential gate. An error i s issued if the ful l_c l ock_cone is set. If the delay type of t he t i ming path i s max (max_r i se
or max_ fa ll) the pul se statement of the lunching cl ock is computed from the
l ate edges of the clock arriva l wi ndows and t he maximum s l ew of the c l ock
pin. The pul se statement of t he capturing clock is compu ted fr om the earl y
edge of the clock arrival windows and the minimum slew . For t he min (min_ rise
or min_fa l l ) delay type, the ear ly edges are u sed for t he lunching clock and
the l ate edges are used f or the capturing c l ock .
- output name
If -sample_size opti on is not used , this op tion specifies the na me o f the
SPICE deck f i le to be writ t en f or the f irst t i ming pa t h. SPICE deck files
related to subsequent timing paths are also based on t hi s name . This is
required. If t he -sample_size option is used, then t his op ti on specif ies the
name of the directory to be created for writing the sampled spice deck f il es.
-pre_d river
The PWL vol tage s ources are r eplced by the equ i v e l ent synopsys pre-driver.
The pr e - driver is a smooth wavefrom which is more realas ti c t ha n the ramp.
Use t his op t ion only if t he library is characteri zed by the s tandard synopsys
pre - dr i ver.
-sub_ c i rcu i t _fi le spice_ sub_ circuit_file
Spec i fies t he path to the fi le that contain s all the SP ICE . subckt d efini tions
of all gates in the timing paths. By defaul t, a subcircuit cal l uses the pin
order in the Synops ys . l ib f ile. Use this option if the SPICE subci rcuit has
a different pin order from that of the .lib fi le.
-sweep_ size number_ o f_points
Used in conjunction with the - a li gn_ aggressors option. Indi cates the number
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of sweep point generated for each active aggressors of the ne t arc. The number
o f simulation will increase geometrically with the number of the active
aggressor
-sweep_s tep num
Used in conjunction with the -align_ aggressors opt i on and -sweep_size.
Indicates the maximum time interval between sweep points generated for each
active aggressors of the net arc . The unit is in nanosecond. The default is
O. lns.
-time_preci s ion precision
Speci f ies the number of prec 1 s1on digits for t ime in the PWL generated. The
default va lue is 6 . The range is from 1 to 20.
-trans1ent size tran
s~ze
Specifies the total t ransient time used in the SPICE .tran sta t ement. The
unit is in the largest clock period. The defau l t is 4 c l ock periods. If there
is no clock in the design, 10ns is used.
-transient_step tran_size
Specifies the transient step size used in the SPI CE . tran statement . The unit
is in nano second . The defaul t is O. OO ln s.
-use_probe
Use .probe statement to output t he node vo ltage instead of .prin t sta t ement.
-user_measures user_measure_ list
Us e this option to add you'r own measures instead of the ones genera t ed by
the spice deck automatically . The empty user_measure_list could be used as a
way to remove all auto generated .measure and . print from spice deck .
-sample_si z e
Spec if ies the number of spice deck f iles t hat have to be created whi l e
performing variation-aware timing analysis . This option takes the name of the
directory via -o~tp~t option and crea t es multiple spice deck fi l es that
correspond to var i ous samples o f t he variations defined.
paths_arcs_ list
Spec if ies the col l ection of timing paths or timing arcs that the ir circuits
are writ t en o ut.
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case_analysis_propagate_through_icg
case_analysis_propagate_through_icg
Determi n es whether case analys i s is propagated through integrated clock gating
cel ls .
Persistent parameter that controls whether case analysis propagation should be enabled through ICG
cells. This parameter is only relevant if the value of theta parameter,
case_analysis_sequentiaf_propagation is ALWAYS.
TYPE
Syntax:
Boolean
case_ ana lysis_ propagate_ through_ icg t r ue I f alse
DEFAULT
where the values have the following meaning:
false
true
Enable case analysis propagation through ICG
cells.
f alse
Do not perform case analysis propagation through
ICG cells . This is the default value .
DESCRIPTION
When false (the defa u lt ) , constants propagating throu ghout the design will stop
propagating when an integrated c lock g a ti n g cell is encoun tered. Regardless of
whether t h e integrated clock gating cell is enabled or disabled , n o logic values
wil l propagate in the fano u t of the cell .
When true , con stan ts propag ated throu ghout the design will propagate thro ugh a n
i n tegrated clock gating cell provided the cell is enabled . An i n tegrated clock
gating cell is enabled when its e n able pi n (or test enable pin) is se t to a hi logic
value. If the ce l l is disabled, the n the disable logic value for the cell is
propagated in its fanout . e . g . for a latch_posedge ICG, when i t is disabled , it will
propagate a logic 0 in its fa n out .
Since all latch based i n teg rated clock gatin g cells are sequ ential in nature , these
cells will only be considered for logic propagation if the
case_analysis_sequential_propagation variable i s set to always
To activate logic propagation through all i n tegrated clock gating cells,
must set the following prior to performing an update_timin g.
the user
set case_analysis_sequential_propagation a l ways set
case_analysis_propagate_through_icg true
To determine the current value of this var i able, type printvar
case_ analysis_propagate_ through_ icg or echo $case_ analysis_propagate_ through_ icg .
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case_analysis_sequential_propagation
case_analysis_sequential_propagation
Determines whether case analysis is propagated across sequentia l cells .
Persistent parameter that controls whether Aprisa propagates constants specified for a case analysis
across sequential cells.
TYPE
Syntax:
fistringfP
case_analysis_sequential propagation never 1 always
DEFAULT
where the values have the following meaning:
never
never
DESCRIPTION
Determines
va lue s are
propagated
propagated
whether case a nalysis is propaga ted across sequential cells . Allowed
never (the default) or always. When set t o never, case analysis is not
across the sequentia l cells. When set to always , case a nalysis is
across the sequent ia l cells.
Do not propagate conditions on conditional arcs across sequential
cells.
always
Propagate conditions on conditional arcs across sequential cells.
The defauH value is never.
To determine the current value of this variable , type printvar
case_ analysis_ sequential_propagation or echo $case_ analysis_ sequentia1_propagation .
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collection_result_display_limit
collect ion_resu It__ di splay_ mit
_li
Sets t he maximum number of objects that can be displayed by any command that
displays a col lection.
Runtime parameter that specifies for commands returning the maximum number of objects in a
collection to display on the screen and in the command log.
TYPE
Syntax:
int
coll e ction_ result _ d ispl a y_l i mit i n teger
where integeris the maximum number of objects to display on the screen and to write in the log file.
DEFAULT
The default value is 100.
100
DESCRIPTION
Thi s variable sets the ma ximum number of o b j ects tha t can be displayed by any
command that d isplays a collection . The default is 100 .
When a command ( f or exampl e , add_ to_ collection ) is i ssued at t he command prompt , its
res u lt is implici t ly queried, as thou gh query_objects h ad been called . You can limit
t h e numbe r of objec ts displayed by setting t his variable to an appropria te integer .
A val u e o f -1 display s al l obj ects; a value o f 0 displ ays the co llec t ion handle id
instead o f t he names of any objects in the collection .
To d etermine the current value of this v ar iable , use printvar
collection_ result _display_ limit .
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default_oc_per_lib
default_oc_per_lib
Enables the use o f a default operating condi t ion per i ndividual li brary .
Persistent parameter that controls whether Aprisa uses for each library the defauH operating condition
as set in the library as opposed to using one operating condition for all cells of all libraries.
TYPE
Syntax:
Boolean
de f aul t _oc_pe r _ li b tru e
DEFAULT
I f a l se
where the values have the following meaning :
t r ue
t r ue
Use the default operating condition as specified in a library for all
instances from cells in that library.
false
Use the same default operating condition for all instances used in
the design . The default operating condition is the operating
condition from the first library listed in the link path .
DESCRIPTION
Enables t he us e of a de f a ul t opera t ing cond ition per i ndividual li brary . When the
default_oc_per_ lib variabl e i s s e t to true ( the default value) , each cel l that does
not have a n explicitly-set oper ating condi tion (on the cell itself, on any of its
paren t cells , or on the design ) is assign ed the default operati ng condit i on of the
li brary to wh ic h the cel l be l ongs . When set to f als e all cells t hat do not ha ve any
expl icitly-set operating condition are assigned the default operating condi tion of
the mai n lib rary (the first l ibrary in the link_path) .
The default value is false.
The recommended flow is to explicitly set operating cond ition s on t he design or on
each hierarchical block that is power ed by t he same voltage {a lso called t he voltage
is land ). Thi s va riabl e i s mainly for obta i ni ng backward compa tibility f or th e corn e r
case of use of de f a u l t conditions in releases prior t o 20 02 . 09 .
To dete rmi ne t he current value of this variable , use printvar default_oc_per_lib.
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delay_calc_waveform_ana lysis_mode
delay _calc___waveform_analysis _mode
__
_
Controls usage of CCS - based waveform analysis for uncoup led and signal integrity
calculation.
Persistent parameter that enables a more accurate delay calculation mode that takes into account the
shape of the signals. You can enable this mode for clocl
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