Elan Microelectronics Corporation v. Apple, Inc.

Filing 214

Declaration of Jennifer Liu in Support of 212 MOTION for Partial Summary Judgment of Infringement of U.S. Patent 5,875,352 [Public Version] MOTION for Partial Summary Judgment of Infringement of U.S. Patent 5,875,352 [Public Version] filed byElan Microelectronics Corporation. (Attachments: # 1 Exhibit 1, # 2 Exhibit 2, # 3 Exhibit 3-6 MFN, # 4 Exhibit 7, # 5 Exhibit 8, # 6 Exhibit 9, # 7 Exhibit 10, # 8 Exhibit 11, # 9 Exhibit 12, # 10 Exhibit 13, # 11 Exhibit 14, # 12 Exhibit 15, # 13 Exhibit 16, # 14 Exhibit 17, # 15 Exhibit 18, # 16 Exhibit 19, # 17 Exhibit 20, # 18 Exhibit 21, # 19 Exhibit 22, # 20 Exhibit 23-25 MFN, # 21 Exhibit 26, # 22 Exhibit 27 MFN, # 23 Exhibit 28, # 24 Exhibit 29-33 MFN, # 25 Exhibit 34, # 26 Exhibit 35-37 MFN, # 27 Exhibit 38 Part 1, # 28 Exhibit 38 Part 2, # 29 Exhibit 38 Part 3, # 30 Exhibit 39-45 MFN, # 31 Exhibit 46, # 32 Exhibit 47 MFN, # 33 Exhibit 48)(Related document(s) 212 ) (Liu, Jennifer) (Filed on 5/24/2011)

EXHIBIT 28

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blocks

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the

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emulation

in-circuit

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Overview

or

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link

compiled

modules

software

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get

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of

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keypad

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HIGHLY

to

worked
to

you

in

the

create

available

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family

devices

complete

before

the

programs

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for

devices
compiler

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the

PS0C

architecture

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and

PSoC

Microsystems

never

allows

compiler

langLiage

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display

support

port

and

and

It

bus

extended

2004

CONFIDENTIAL

all

provides

comes

operations

math

the

features

PSoC Development

standard

Tool

Kit

functionality

Document

ATTORNEYS

with

complete

No

38-12011

Rev

EYES ONLY

CONFIDENTIAL

APCYOO1 25530

ATTORNEYS

EYES ONLY

APE

LOOl 3305

CY8C24x23

Data

Final

PS0CTM

Sheet

User Modules

PS0C

and the

device

the

module

The development
traditional

and

analog

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change

to

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has

block

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of

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the

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design

requirements
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of

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provides

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functions

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clock

values

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generate

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to

are

by
ready

developing

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source

code

set

with

pins

test

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linker

HIGHLY

2004

CONFIDENTIAL

ATTORNEYS

ROM

file

errors

the

source

image

error

code

suitable

as

all

nec

strategies

are

in

displayed

message takes you
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for

programming

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loads
runs

hardware

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at

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full

ROM

image

speed

to

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provides

large

trace

events

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breakpoint

38-12011

memory

the

Debugger

many times more

costing

you

configures

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of

line

offending

assembler

optimization

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clicking

profes
analyze

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linker

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employs

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compiler and

options

simple

from

values

June

the

builds

to

include

patterns

The last step in the development
inside the
process takes place
PSoC Designers
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down
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subsystem

project

causes

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and

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modules

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process

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grated

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addition

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locations

rival

to

and

and

traditional

allows

monitoring
external

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of

where

define

and

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systems

single

the

address

step

Debugger
complex
data

bus

signals

Rev

EYES ONLY

CONFIDENTIAL

those

features

watch-variable

include

ICE

Emulator

In-Circuit
capabilities

APCYOO1 25531

ATTORNEYS

EYES ONLY

APE

LOOl 3306

CY8C24x23

Data

Final

PS0CTM

Sheet

Document Conventions

The

table

following

For an

the

that

acronyms

are

used

in

this

ence

doc

into

ument
Acronym
altcrwitifi

ADC

aiiaIo-to-dirjitriI

API

ar

Cpu

ceiriral

PSoC

the

Manual

This

the

document

Signal

Array

on your
Technical

encompasses and

and

chapters

following

information

more

Mixed

is

P8cC
Refer

organized

sections

urnnt

1.1

Pinouts

programming

drita-toanaIog

DC

direct

EEPP.OM

eectrcaily

FSR

tull

con

dci

Pinout

28-Pin

Part

Pinout

10

32-Pin

Part

Pinout

11

2.1
erasable

scale

pO1JrfliPMOie

read-crily

2.2

ruipos- 10

Electrical

ii

er

po
cant

least-sign

MSLi

POR

Dvvor

PPOR

precsiol

PSoC

Operating

DC

Procjramrnable

DC
DC
DC
DC

3.3.2

counter

3.3.3
3.3

esut

1iuse

RArnI

random

Cl

Ci

ROM

read

SC

3.3.6

Systom-oii-Ch

noiiiilaioi

iciiii

access

ons

memory

memory

AC

General

17

Analog

17

Specifications

Purpose

IC

Specifications

..

17

Amplifier

Operational

Specifications

18

Buffer

Specifications

20

Output

itch

mrs

ViTi

3.4

3.4.7

AC
AC
AC
AC

3.4.8

AC

3.4.4

Measure

Units of

3.4
4.6

units

of

section

Table

measure

to

table

measure

3-1

is

on

located

in

15

page

the

Electrical

lists

the

all

25

AC
AC
AC

3.4.1

SMP

21

Specifica

abbreviations

numbers
an

prefix

the

appended

Numbers

are

appended

Hexidecimal

represented

coding

indicated

with

lowercase

numbers

lowercase
not

Block

10

26

Amplifier

28

Specifications
Specifications

External

Buffer

Output
Clock

Programming

29
31

Specifications
Specifications

32
33

Specifications

33

Specifications

34

Specifications

may

convention

e.g
by an

for

also

letters

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are

in

numbers
or

upper

14h

example

be represented

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orb

all

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have

an

5.1

ATTORNEYS

Crystal

40
40

Pins

OlOOOOllb

Sales

decimal

Information

Ordering
and

Code

No

38-12011

41

Definitions

Company

Revision

6.2

CONFIDENTIAL

on

or

by

Document

35

Impedances

6.1

2004

35

Dimensions

Packaging

4.2

with

Purpose

Analog

12C

26

Specifications

Operational
Digital

24

Specifications

acteristics

Chip-Level
General

23

Information

4.1

Naming

Hexidecimal

Cha

22

PSoC devices

the

Packaging

Numeric

Programming

Electrical

caacitor

stitched

June

Chip-Level

DC Switch Mode Pump Specifications
DC Analog Reference Specifications
DC Analog PSoC Block Specifications
DC FOR and LVD Specifications

reset

3.3

3Ah

16

Characteristics

DC

CCV

3.3.7

PW1

case

16

Ratings

Temperature

Electrical

3.3.1

bit

el

Maximum

rese

oil

bit

mosl...siijiilicanl

pograrn

used

15

Specifications

Absolute

intact

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PC

tions

12

it

precise

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12

Tables

Mapping

Register

3.2

LVI

12

Abbreviations Used

3.1

LSb

12

Conventions

Register

11

memory

ranac

ii ptit/oiitrr

IPOP

Pinout

Reference

Register

curleni

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10

Part

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DAC

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Part

Unit

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20-Pin

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interface

8-Pin

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con

Iicatioi

1.1

1.1.3

CT

HIGHLY

and

discussion

depth

obtain

Pin Information

Description

/C

in

device

lists

of Contents

Table

Acronyms Used

Overview

Information

42

Copyrights

42

1-listory

42

Rev

EYES ONLY

CONFIDENTIAL

41

APCYOO1 25532

ATTORNEYS

EYES ONLY

APE

LOOl 3307

.CpREss MICROSYSTEMS
This

chapter

describes

The CY8C24x23
labeled

PS0C device

with

the

illustrates

CY8C24x23

PS0C device

and

pins

pinout

configurations

is

available

is

of

capable

in

variety

10

Digital

packages

which

are

Vss Vdd

of

However

SMP

and

and

listed

XRES

illustrated

are

not

in

capable

the
of

following
Digital

tables

Every

port

10

8-Pin Part Pinout

1.1.1

Table

and

Pinouts

1.1

pin

lists

I-I 8-Pin

Part

Pinout

Type

PDIP

SOIC
CY8C24123

ri

8-Pin

PS0C Device

rsciiption

Fb

Analog

Digital
10

10

P0

Analog

column

mlix

input

and

column

output

10

10

P013

Anuloci

column

Inna

input

and

column

oulput

J0Pc4
J0 Ft

10

D1
Po.ver

CrysLil

Vus

Groind

P1

10

Cryctal

nput

XTALnt

12C

Sei

itI

Cloult

OCU

l2CSt1

XThlJti

connecton
0utut

P1
Vim

XIAL0uI

l2C

Send

VckJ

3SLC6

Pq2
p1lp.xrALcI2csDk

Onto

DA
10

pcp

Anxlo

OOlLImIl

nun

Ilput

10

D0

mnolog

column

mua

input

Vdd

3uppiy

ioltae

Power

LEGEND

Analog

Input

and

Output

June 2004

HIGHLY

CONFIDENTIAL

Document

ATTORNEYS

No

38-12011

Rev

EYES ONLY

CONFIDENTIAL

APCYOO1 25533

ATTORNEYS

EYES ONLY

APE

LOOl 3308

CY8C24x23

Final

1.1.2

20-Pin

Table

1-2 20-Pin

Data

Pad

Part

Pin

Information

Pinout

Pinout

PDIP SSOP

SOIC
CY8C24223

Rn

Type

Pin

Sheet

20-Pin

PSoC Device

scnption
Analog

Digital

PO

10

10

10

10

10

10

Power

Analog

column

man

input

ALPC7J

20

VCU

FOES

Analog

column

man

input

and

column

output

PJQFt

19

6PJ

Analog

column

mux

input

and

column

output

PJORt3

18

FO
PO

Analog

SMP

column

Modu

Switch
external

mux

Pump

components

10

P1

12C

Serial

Clock

10

PIES

120

Serial

Data

ID

10

Power

11

l2CSD8P1
P1E3

Vaa

Ground
Crystal

Input

XTALin

12C

Serial

SCL

Clock

16

2M
0M

15

XIS
P16

13

I2CSaP1

required

SCL
SDA

17

14

to

Vun
Crystal

Fl

10

connuction

I2CSOLCOAJJnP1

Fl
P1

10

PDIP

sso

AR1j

input

SMP

Pl4EXIOJ

12
10

11

Pl2
PlqflPLuitlXSD4

connection
Output

QTALout

120

Serial

Data

SDA
12

ID

14

PI
P1

10

13

10

15

Optional

External

Clock

Input

EXTCLK

PIES
Input

XRES

Active

high

esternal

reset

with

internal

pall

down
16

10

18

10

19

PO
P0
PO
PO

10

17

10

20

Power

LEGEND

June

HIGHLY

Analog

Analog

Inpat

max

input

column

man

input

Analog

column

max

input

Analog

Vdd

column

Analog

column

max

input

Sapply voltage

and

Output

Document

2004

CONFIDENTIAL

ATTORNEYS

No

38-12011

Rev

EYES ONLY

CONFIDENTIAL

APCYOO1 25534

ATTORNEYS

EYES ONLY

APE

LOOl 3309

CY8C24x23

Final

1.1.3

28-Pin

Table

1-3 28-Pin

Rn

Data

Sheet

Pad

Part

Pin

Information

Pinout

Pinout

PDIP SSOP

SOIC
CY8C24423

Type

28-Pin

PSoC Device

cescriptton

Analog

Digital
10

Analog

10

10

10

10

P0
P0

column

mux

input

Analog

POF7

10

column

mux

input

Analog

column

mux

Analog

column

mux

and column

input

Pq6

Al

AlOPO
AlRJ

output

input

P2
P2

10

Vdd

FOES

Ft4

Al

R2

Al

oulput
AlO

POLl

10

PWI

Al

und column

P2
P2

10

P2L3

Diruct

switchud

capacitor

block

input

AL

P23

10

P2FI

Diruct

switchud

capacitor

block

input

Al

P2

SMP

Switch

Mode

Power

external

10
11

P1
P1
P1

10
10

12

10

13

10

14

12C

to

I2CSCL

I2CSQ

SCL
SDA

Clock

Serial

connection

required

Data

Crystal

Vss

Input

Ground

XTALin

12C

Serial

SCL

Clock

XTAUn

Extmnal

Vtt

Extsmal

AD

P2
P2

P1

XRES

PIES

Pl

P1
Pl

Pl

Van

I2CSGL

P1

10

Serial

12C

PILl
Power

15

SMP

Pump

components

Al

P2
P2

Pl

EX1tLK

Pl
XFALOLIt

I2CSD

connection
Output

Crystal

XTAL0ut

12C

Serial

Data

SDA
16

10

18

P1
P1
P1

10

17

10

19

Input

XRES

Clock

External

Optional

Active

high

external

Input

reset

EXTCLK

with

internal

pull

down
20

10

22

10

23

10

24

10

25

10

26

10

27

P2
P2
P2

10

21

10

28

capacitor

block

input

switched

capacitor

block

input

External
External

P0
P0
P0

Analog
Voltage

AGND

Ground

Reference

Analog

Analog

column

mux

Analog

column

mos

input

Analog

column

mux

input

Analog

column

mux

input

Vdd

Supply voltage

Input

and

Output

Document

2004

CONFIDENTIAL

VReI

input

POF6

LEGEND

HIGHLY

switched

Direct

P2L6

Power

June

Direct

ATTORNEYS

No

38-12011

Rev

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

10

APCYOO1 25535
APELOO1 3310

CY8C24x23

Final

1.1.4

32-Pin

Table

1-4 32-Pin

Data

Sheet

Pad

Part

Pinout

MLF

Pinout

CY8C24423

10

P2
P2

10
10

PSoC Device

00

P2L7

10

Direct

capacitor

block

switched

capacitor

block

NNN
EEESD

input

CCC

CS

Vss

Ground

Power

SMP

Switch

connection

Mode

external

Pamp

components

P1
P1

10

10

Power

12

13

Serial

Clock

120

Serial

Data

No

P1
P1

10

11

12C

NC

10

connection

to

reqaired

Al

SCL
SDA
Do

connection

not

Al

Crystal

Inpat

Ground

PILO

Crystal

TALin

P2
P2
P2
P2
Vss

120

SCL

Clock

Serial

SCL

I2CSDA

Pl
Pl

XTALoat

120

Serial

Data

10

P1

15

10

PIL4

lop View

Al
Al
External

VRef

External

AGND

Al
Al

XRES

00W-N

0t5

P1
CQ

III

57750
SC

No

Clock

External

Optional

NC

16

PO
PO
P2
P2
P2
P2

MLF

07777

SDA
14

I-CC

CCC

05 aaa
tSSz
aa

connection
Output

5-

CO

SMP

use
120

Vss

10

SMP

ocO
CD

liii

input

Direct

P2L1

switched

Power

10

Information

Pin

Do

connection

not

Input

EXTCLK
SC

use

F-

SC

SC
-J

17

P1

10

18

CD

XRES

Input

Active

external

high

reset

with

internal

pull

down
ig

P2
P2
P2
P2

10

Direct

switched

Direct

switched

block

capacitor

20

10

21

10

22

10

23

10

POLO

Analog

column

max

24

10

POL2

Analog

column

mas

NC

No

POL4

Analog

column

max

column

max

input

inpat
inpat

25
26

10

27

10

28

Estemal Analog
Estemal

Voltage

POL6

Analog

Vdd

Power

input

AOND

Groand

Reference

Do

connection

block

capacitor

IReO

inpat
inpat
not

use

Supply voltage

29

10

POL7

Analog

column

max

inpat

30

10

IC

POL5

Analog

column

max

inpat

and

colamn

oatpat

31

10

IC

POL3

Analog

column

max

iepat

and

colamn

oatpat

32

10

POLl

Analog

column

max

inpat

samn

ground

LEGEND
The

MLF

the

Vss

us

June

HIGHLY

Analog
package

Input

has

center

and
pad

Ontpnt
that

mast

bn connected

to thn

pin

Document

2004

CONFIDENTIAL

ATTORNEYS

No

38-12011

Rev

11

EYES ONLY

CONFIDENTIAL

ATTORNEYS

EYES ONLY

APCYOO1 25536
APELOO1 3311

Cyppss

This

chapter

mation

lists

reference

the

registers

of the

CY8C27xxx

PS0CTM

Mixed

Signal

the

PS0C device

Array

by

Register Conventions

2.1

of

way

2.2

The

register

following

PS0C

to

specific

this

section

are

listed

in

register

two

into

mines

which

bank

user

set

RbJ

ReaJ

arid

ik

register

regisk

rcisior

Write

configuration

01cc

rabia

Accari

May 2004

CONFIDENTIAL

is

reg

Liii

ii

Note

hil

In

Reserved

itci

or

cr

iister

Logical

HIGHLY

For

detailed

infor

register

Tables

is

The
user

the

said

to

be

X0l
is
in

address

register

also

referred

to

in

the

currently

in

the

bit

extended

as
Flag

space

register

When

the

address

512

of

space
10

and

is

deter

XCI

bit

space

is

or

registers

Description

Road
Vs

the

the
Convention

order

total
is

space

parts

the

table

offset

in

has

device

The

bytes

broken

conventions

tables

Register Mapping

The

Used

Abbreviations

2.1.1

mapping

Manual

Reference

Technical

the

following

and

should

register

mapping

tables

blank

fields

are

be accessed

not

bits
oi

tar

biIs
or

bits

s1reiiic

Cypress MicroSystems

ATTORNEYS

Inc

2003

Document

No

38-12011

Rev

EYES ONLY

CONFIDENTIAL

ATTORNEYS

EYES ONLY

12

APCYOO1 25537
APELOO1 3312

CY8C24x23

Final

Data

Sheet

Map Bank

Register

XD
Ia
ea

DC

CD

PRTODR

00

PRTOIE

01

PRTOGS

02

PRTODM2

03

PRT1DR

04

PRTIIE

05

PRTICS

06

PRT1DM2

07

PRT2DR

08

PRT2IE

09

PRT2GS

OA

PRT2DM2

OB

Register

Table

User Space

ia
ma

CD

CD

RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW

IC
ma

CC

CD

CC

DC

40

ASC1OCRO

80

41

ASCIOCRI

81

42

ASC1OCR2

82

43

ASC1OCR3

83

44

ASD11CRO

84

45

ASDIICRI

85

46

ASDIICR2

86

47

ASD11CR3

87

CD

RW
RW
RW
RW
RW
RW
RW
RW

IC
DC

CC
CD

Co
Cl
C2

C3
C4
CS
C6
CT

48

88

CC

49

89

C9

4A

8A

CA

4B

SC

CB

OC

4C

SC

CC

OD

4D

SD

CD

OF

4E

8E

CF

OF

4F

CF

10

SO

ASD2OCRO

90

11

51

ASD2OCRI

91

12

52

ASD2OCR2

92

13

53

ASD2OCR3

93

14

54

ASC21CRO

94

15

55

ASC2ICRI

95

16

56

ASC2ICR2

96

17

57

ASC21CR3

97

18

58

19

59

CF

RW
RW
RW
RW
RW
RW
RW
RW

DO
Dl
D2
D3
D4
DS
12C

CFG

DC

12C_SCR

98

12C_DR

D8

99

12C_MSCR

D9

1A

SA

9A

INT_CLRO

DA

SB

9C

INT

DC

1C

SC

9C

1D

SD

9D

INT_CLR3

DD

iF

SF

9F

INT_MSK3

DC

iF

DCCOODRO
DBBOODR1

21

DBBOODR2

22

DCCOOCRO

23

DCCOIDRO
DCCOIDRI
DCCOIDR2

26

DBBO1CRO

27

DCCO2DRO
DCCO2DR1
DCCO2DR2

2A

DCCO2CRO
DCBO3DRO

SF

20

AMX

RW
RW
RW

DC

RW
RW

DF

AO

El

RW
RW

INT_VC

E2

RC

A3

RW

INT_MSK1

A2

62

INT

Al

61

RW

CLRI

9F

RW

60

IN

RW

D7

lB

RES_WDT

E3

MSKO

CO

ARF_CR

63

24

CMP_CRO

64

A4

DEC_DH

E4

RC

25

ASY_CR

65

AS

DEC_DL

ES

RC

CMP_CRI

66

A6

DEC_CRO

E6

87

AT

DEC_CR1

E7

RW
RW

28

68

AC

MUL_X

E8

29

69

A9

MUL_Y

E9

CA

PA

MUL_DH

CA

2C

CC

AC

MUL

DL

EC

2C

SC

AC

ACC_DR1

EC

DCCO3DR1

2D

6D

AD

ACC_DRO

ED

DCCO3DR2

2E

CE

AC

ACC_DR3

FE

DCCO3CRO

2F

CF

AF

ACC_DR2

CF

RW

RW

RW
ACCOOCR3

30

RW

RW
RW
RW
RW
RW
RW
RW
RW

70

31

71

32

72

33

AI.OUUI.rL

73

34

ACCOICR3

74

35

ACCOICRO

76

36

ACCOICRI

76

37

ACBO1CR2

77

38

RDIORI

CO

RDIOSYN

Bi

RDIOIS

C2

RDIOLTO

C3

RDIOLTI

C4

RDIOROO

CS

RDIOROI

C6

RW
RW
RW
RW
RW
RW
RW

B7

El

F2
F3
F4
FS
F6

CPU_F

FT

78

CC

F9

CA

FA

7C

CC

FC

7C

BC

EC

3D

7D

CD

3E

7E

CE

CPU_SCR1

FE

3F

June

C9

3C

are

79
7A

3C

fields

RL

F8

39

Blank

RW
RW
RW
RW

FO

3A

HIGHLY

Reference

7F

CF

CPU_SCRO

FF

Reserved

and

should

not be accessed

Document

2004

CONFIDENTIAL

Access

ATTORNEYS

is

bit

No

FD

specific

38-12011

Rev

13

EYES ONLY

CONFIDENTIAL

ATTORNEYS

EYES ONLY

APCYOO1 25538
APELOO1 3313

CY8C24x23

Final

Data

Sheet

Map Bank

Register

PRTODMO

00

PRTODMI

01

PRTOICO

02

PRTOIC1

03

PRT1DMO

04

PRTIDMI

05

PRTIICO

06

PRT1IC1

07

PRT2DMO

OS

PRT2DM1

09

PRT2ICO

OA

PRT2ICI

OB

Register

Table

RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW

Configuration

Space

40

ASCIOCRO

80

41

ASCIOCRI

81

42

ASC1OCR2

82

43

ASC1OCR3

83

44

ASD11CRO

84

45

ASOIICRI

85

46

ASDIICR2

66

47

ASD11CR3

87

RW
RW
RW
RW
RW
RW
RW
RW

Co
Cl
C2

C3
C4
CS
CS
CT

48

88

CS

49

89

C9

4A

CA

CA

4B

SB

CB

OC

4C

SC

CC

OD

4D

SD

CD

OF

4F

SF

CF

OF

4F

SF

10

SO

90

11

51

91

12

52

ASD2OCR2

92

13

53

ASD2OCR3

93

14

54

ASC21CRO

94

15

55

ASC2ICRI

95

16

56

ASC2ICR2

96

17

57

ASC21CR3

97

18

58

98

DS

19

59

99

D9

1A

SA

9A

DA

lB

SB

9C

DC

1C

SC

9C

1D

SD

9D

CSC_CC_FN

DD

iF

SF

9F

OSC_CR4

DC

9F

OSC_CR3

DF

AO

OSC

CO

Al

OSC_CR1

El

A2

OSC_CR2

E2

A3

VLT_CR

F3

64

A4

VLT_CMP

E4

65

AS

ES

AC

CC

iF

DCCOOFN

20
21

22

SF

RW
RW
RW

CLK

DBCOIFN

24

DBCOIIN

25

DCCOIOU

26

28

DCBO2IN

29

DCCO2OU

2A

51
62

AMD_CRO

RW
RW
RW

63

AMD_CRI
ALT_CRO

DCBO3FN

2C
2D

DCCO3OU

2F

RW
RW

66
67

RW
RW
RW

CF

RW
RW
RW
RW
RW
RW
RW
RW

CDL

OIN

DO

CDI_F_IN

Dl

CDI_O_OU

D2

CDI_F_CU

D3

DS
DC
D7

DC

CR0

AT
IMO_TR

A9

ILO_TR

E9

CA

AA

BDC_TR

CA

CC

AC

ECOTR

EC

SC

AC

EC

CD

AD

CD

SF

AC

CF

CF

2F

AF

30

ACCOOCR3
ACBOOCRO

71

32

ACCOOCR1

72

33

ACCOOCR2

73

34

ACCOICR3

74

35

ACCOICRO

75

36

ACCOICRI

76

37

ACBO1CR2

RW
RW
RW
RW
RW
RW
RW
RW

70

31

77

RDIORI

CO

RDIOSYN

Bi

RDIOIS

C2

RDIOLTO

C3

RDICLTI

C4

RDIOROO

CS

RDIOROI

CC

CS

B7

FO
El

F2
F3
F4
FS
F6

CPU_F

FT

79

C9

F9

7A

CA

FA

7C

CC

FC

3C

7C

BC

EC

3D

7D

CD

3E

7E

CE

CPU_SCR1

FE

3F

7F

CF

CPU_SCRO

RL

FS

3C

HIGHLY

CS

3A

June

78

39

are

RW

CF

RW
RW
RW
RW
RW
RW
RW

38

fields

RW
RW
RW
RW
RW
RW
RW

E7

AS

69

RW
RW
RW

RW
RW
RW
RW

D4

68

2C

DCCO3IN

RW
RW
RW
RW

60

ABF_CRO

27

DCBO2FN

CR0

CLK_CR1

23

Blank

Reference

FF

Reserved

and

should

not be accessed

Document

2004

CONFIDENTIAL

Access

ATTORNEYS

is

bit

No

FD

specific

38-12011

Rev

14

EYES ONLY

CONFIDENTIAL

ATTORNEYS

EYES ONLY

APCYOO1 25539
APELOO1 3314

This

DC

presents

the

specifications

confirm

that

Specifications

are

chapter

than

MHz

12

are

valid

valid

for

for

AC

and

you have

electrical

specifications

most

recent

data

85C

and

the

-40C

TA

-40C

TA

70C

and

TJ

of

100C

TJ

CY8C24x23

the

sheet by

to the

going

where

except

PS0C device

web

at

noted

http

Iwvw

Specifications

For

most

the

cypress

for

to

up

date

electrical

com/pscc

devices

running

at greater

82C

4.75

Sb

Sb

3.00

93kHz

3-1 Voltage

Figure

The

following

Table

3-1

versus

table

lists

the

Hz

Unit

kHz
k_I

MHz

MU

of

Measure

in

this

chapter

Unit

Symbol

uW

farad

micro

1024

nnifli-cocond

bvis

nano

bin

ri

is

tV

era

id

ihrn

11c0

pF

rub-ri-i

or

miiiron

pa
vi

spa

jits

CONFIDENTIAL

pm

PitiTl

herv

Dim

farad

plu

tarad

rluiusecs

ampee

pico

hariz

megnohm

micro

arni

os000r

nanovolts

kiichrn

nsr

Measure

miSvolts

kiiohertz

mecj

of

nits

niHirrpere

eriz

..ur

iv

rootn

ou

sgrna

Document

ATTORNEYS

icr

re

oie

reuouud

stair

lard

de

anon

nciiz

cciuare

June 2004

HIGHLY

used

ma

crc
Vruric

are

irA

rilicro

US

that

fomio

iriii.iir

ii

measure

decior.is

1024
Kuit

Frequency

Ceisirs

dejree

tF

of

MHz

Measure

Units of

Symbol

dB

Operating

units

24

12MHz

CPUFrequency

No

38-12011

Rev

15

EYES ONLY

CONFIDENTIAL

ATTORNEYS

EYES ONLY

APCY0O1 25540
APELOO1 3315

CY8C24x23

Sheet

Absolute

3.1

Table

Data

Final

3-2

Electrical

Maximum

Maximum

Absolute

Symbol

Ratings

Ratings
Mm

Description
Tat

Sloinga

Max

Typ

55

iperntLire

Notes

Units

30

Hiher
rCCiiijon

Antjont
Jdd

Supely

V1

DC

Temperature
Voitaje

Realise

-0

pplied
to

Vsc

oiiacle

Maxuririr

Caunirl

mb

any

Maximum

Curreirt

into

any

Pod

Pin

3.5

Vtht

ContiqureJ

as Alaboq

data

05

VdrJ

--

05

50

25

Pi

Port

-05

\ss

Tri-stte

reiuce

viii

tune

60

Vas
to

Applier-

temoaratLires

vloreJe

5n

-i-85

-0.5

Voilutie

lilpLil

DC

Porer

iiith

on Vdd

Specifications

etA

50

-50

nA

Dri Jnr

Stitic

Disc

Latchjr

3.2
Table

argo

Operating

Temperature

Mn

Description
Airbiei

tinction

etA

Temperature

Symbol
T5

--

200

Operating
3-3

2000

Voltage

Current

Temperate

Max

Typ

--65

cc

40

ro

Notes

Units

-40

Temperature

too

CC

The tompetalure
aecka tc socci
ic
Tie
sirmption

June

HIGHLY

2004

CONFIDENTIAL

Document

ATTORNEYS

No

38-12011

IC corn

rise

from ambie

user

iy

Rev

EYES ONLY

CONFIDENTIAL

It

to jrinctron

is

Ccc

-ATTORNEYS EYES ONLY

niui
lii

11110

iiiiri

ii

JO

ci

cue

requirement

16

APCY00125541
APELOO1 3316

CY8C24x23

DC

3.3

The

following

and

-40C
for

Table

3-4

lists

85C

Specifications

3.OV

maximum

chip-Level

3.6V

to

or unless

only

minimum

and

-40C

and

otherwise

TA

Mm

voitage

bc

Supply

respectively

voltage

Typical

and

temperature

parameters

Max

Typ

3.00

mA

Conditions

Current

3.3

mA

6.0

MHz
Cerrent

POR LvD

with

Timer

Sieep

and

Q1ode
at

Sleep

1S5XTL

end

Cerrent

POR LvD

with

Sieep

and

Timer

25

pA

Cerrent

f\æode
external

tor

POR LvD

with

WDT

Timer

Sieep

pA

7.5

Conditions

kHz

slow speed

internal

with

slow speed

oscilla

85

TA

pw max

loaded

properly

Vdd

crystai

oscilla

55

TA

internal

55C

are

32.758

crystal

with

3.3V

MHz Vc2

1.5

kHz

-40C

are

Vdd

DC CPU

25

TA

93.75

with

3.3V

Conditions

temperetere

high

are

Vdd

MHz Vc2

1.5

vci

Disabled

kHz VC3

Conddions

pA

6.5

tor

Sleep

WDT

and

kHz

3.3

Vdd

are

93.75

Mode

5.25v

Cpu

25

Vci

93.75

MHz

48

5.OV

disabled

kHz VC3

Conditions

WDT

Vdd

are

MHz

48

93.75

Sleep

to

25C

at

5.25

MHz
Supply

3.3V

Notes

Units

current

1oca

4.75V

ranges

5V and

to

apply

specified

Description
Supply

for the

specifications

85C

Specifications

Symbol
Vdd

Specifications

Characteristics

guaranteed
or

guidance

DC

Electrical

Chip-Level

table

TA

design

Sheet

Electrical

DC

3.3.1

are

Data

Final

3.3V

-40C

TA

55

Mode

Sleep

1S5XTLH

and

external

Cerrent

POR LvC

with
at high

crystal

WDT

Timer

Sieep

26

Conddions

pA

32.768

temperature

are

kHz

with

pw max

loaded

properly

Vdd

crystai

55C

3.3

TA

85
Reference

VREF

Stardby
enabled

current

The

following

and

-40C
for

are

Table

irdudes

DC

3.3.2

3-5

lists

85C

DC GPIO

PO LVD

Purpose

3.OV

only

to

WJT

10

3.6v

or unless

and

Seep

mn-a

needed

and

-40C

otherwise

minimum
TA

up

R0

Pail

down

vOH

High

for reliatie

orerat

ion

for the

respectively

This

should

La mrrered

Wth

voltage

Typical

and

Low

Mm

Max

Typ

to

apply

shillar

furdions

3.3V

at

to

5.25\f

25C

and

Notes

k12

5.6

Vdd

Level

kQ
ICH

-1.0

Level

ViL

Inpet

Low

ViH

Inpet

High

VH

10

mA

Vdd

combinod

ICL

0.75

25

mA

4.75

IOH
Vdd

4.75

Inpet

Hyateriais

Inpet

Leakage

Vdd

0.8

Level

2.1

nA

Value

Capacitive

Load

on

Pins

as

Input

3.5

10

pb

COUT

Capacitive

Load

on

Pins

as Oetpet

3.5

10

pF

Document

2004

CONFIDENTIAL

ATTORNEYS

No

tested

38-12011

5.25v

150 mA

IOL badget

to

cA

Package

aed

pin

depeedent

Temp

25C

Package

and

pin

dependent

Temp

25C

Rev

EYES ONLY

CONFIDENTIAL

to

to 5.25

Cross

80 mA max

to 5.25

3.0

5.25V

mV

60
Abaoiete

3.0

to

bedgot

combined

Vdd

Level

CiN

HIGHLY

Leve

4.75V

ranges

maximum

June

fret

5V and

Units

5.6

Resistor

Cutpet

devices

temperature

parameters

imum
VOL

Vdd

tor appropriate

specified

Resistor

Oatpat

istem

specifications

85C

Description
Pail

Trimmed

1.325

Specifications

Symbol

Rp

1.3

Specifications

maximum

guaranteed
or

guidance

1.275

frirctions

all

General

table

TA

design

Bandgap

voltage

-ATTORNEYS EYES ONLY

17

APCYOO1 25542
APELOO1 3317

CY8C24x23

Final

3.3.3

DC

The

following

and

-40C
for

are

The

tables

25C
Table

and

3-6

or

guidance

Amplifier

for

maximum
3.6V

to

guidance

5V DC Operational

Symbol

of

the

both

EBOA

respectively

Continuous

Analog
in

the

Analog

Offset

Voltage

absolute

value

Low

Offset

Voltage

absolute

value

Mid

Power

Offset

Voltage

absolute

value

Leakage

Input

Current

Capacitance

Port

Poll

1.6

temperature

4.75V

ranges

5V and

to

apply

3.3V

5.25V

to

25C

at

and

blocks

PS0C

and

the

block

Switched

Analog

parameters

Typical

PSoC

Cap

5V

to

apply

at

Analog

VCMOA

Common

Mode

Voltage

Mode

Voltage

Range

35.0

pA

0.0

power

or

high

Vdd

Package

Vdd

05

Gross

pF

95

4.5

Pins

high

mV

7.5

20

Pins

Range

Common

mV

1.2
7.0

Analog

Input

Notes

Units

mV

10

1.3

Power

High

Drift

Voltage

CINOA

opamp

Time

Max

Typ

Power

Offset

PSoC

Time

Continuous

Miri

Input

Input

and

parameters

Amplifier Specifications

Descriptior

Average

voltage

Typical

only

Input

TCV0s0A

for the

specifications

85C

TA

measured

are

Input

VOSOA

minimum

specified

component

specifications

design

and

-40C

and

otherwise

or unless

is

Specifications

Amplifier Specifications

3.OV

only

guaranteed

are

Electrical

guaranteed

list

85C

Operational

The

Sheet

Operational

TA

design

blocks

Data

The

by

pin

the

an

through

dependent
input

analog

includes

specification

bias

iA

to

and

common-mode

sured

0.5

tested

characteristics

the

25C

Temp
voltage

output

analog

mea

The

buffer

limitations

of the

is

range

imposed
output

buffer

GOLOA

Open

Loop

Gain

dB

Power

Low

Power

Medium
High

opamp

Output

High

Swing

Voltage

worst

case

internal

Vdd
Vdd
Vdd

all

bias

0.5

Low

Output

Swing

Voltage

worst

case

internal

load

Low

0.2

Power

Medium

0.2

05

PowerHigh
Supply

Current

AGND

associated

including

Power

Low

Power

Medium

Power

Medium Opamp

Power

High

Power

High

buffer

Low

Power

HIGHLY

For
high

0.2

High

Power

June

power

0.2

Medium

Power

PSRROA

at high

except high
power
minimum
is
60 dB

load

Low

Power

SOA

applicable

modes

80

Power

V0LOW0A

bias

60

Power
VOHIGHOA

is

Specification
other

60

Supply

Voltage

150

Opamp
Rejection

Bias

Bias

High

CONFIDENTIAL

Document

ATTORNEYS

1600

pA

3200

pA

6400

pA

60

Ratio

2004

800

4600

High

400

1200

High

200

2400

Bias

300
600

Opamp

No

iA

dB

38-12011

Rev

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

18

APCYOO1 25543
APELOO1 3318

CY8C24x23

Table

3-7

Final

Data

DC

3.3V

Sheet

Electrical

Operational

Symbol

Amplifier Specifications
Mm

Description

1saOA
CINOA

VCMOA

Offset

Votage

absolute

value

Low

Power

Offset

Votage

absolute

value

Mid

Power

High

TCVOSOA

Input
Input

VosoA

Power

is

Input

Inpet

Offset

Votage

Current

Pod

Pod

Capacitance

Input

Common

Max

Typ

Notes

Units

mV

10

1.65

mV

1.32

Vot Only

Leakage

Average

Mode

Analog

Analog

Votage

7.0

Drift

35.0

20

Pins

pA

Gross

4.5

Pins

pF

Package

Vdd

0.2

Range

The

0.2

tested

The

Loop

Gain

dB

Low

Power

Medium
High

Output

High

worst

case

internal

Vdd

of the

analog

heifer

is

bias

applicable

modes

at

esoept
minimum
60

high
high

power
power

For
high

bius

dB

Low

Output Votage

-0.2

Vdd-0.2

Swing

worst

case

internal

load

Power

Low

0.2

Power

Medium

0.2

Power

High

Sepply

0.2

Current

AGND

associated

including

Powar

Low

Pownr

Medium

Powar

Medium Opamp

Powar

High

Power

High

buffer

Low

Powar

HIGHLY

limtations

Vdd-0.2

Medium

PownrHighis5Vonly

June

the

characteristics

is

buffer

output

load

Powar

PSRROA

includes

range

voltage

an analog

80
Swing

Voltage

PowarLow

VQLOwQA

the

input

25C

Temp

60

Power

other

opamp

V0HiGH0A

by

Specitcation
all

60

dependent

through

specitcation

output

Power

pin

common-mode

imposed

Open

IA

to

and

measured

0OLOA

Specifications

Supply Votage

150

Rejection

Biss

Bias

High

CONFIDENTIAL

Document

ATTORNEYS

1600

pA

3200

pA

6400

pA

50

Ratio

2004

pA

800

4600

High

pA

400

1200

High

200

2400

Opamp

Bias

300
600

Opamp

No

iA

dB

38-12011

Rev

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

19

APCYOO1 25544
APELOO1 3319

CY8C24x23

Final

3.3.4

DC

The

following

and

-40C
for

are

Table

Sheet

Electrical

list

85C

guidance

maximum

guaranteed
or

3.OV

3.6V

to

or unless

only

5V DC Analog Output

Symbol

and

and

otherwise

Buffer

minimum

-40C

TA

Input

TCV0506

Average

VCMOB

Common-Mode

ROUTOB

Output

Absolute

Voltage

Input

Offset

respectively

and

voltage

apply

to

ranges

5V and

4.75V
3.3V

at

to

5.25V

25C

and

specified

Specifications
Mm

Max

Typ

Units

Notes

mV

12

Value

kVIC
Vdd

0.5

Range

Voltage

temperature

parameters

Typical

Drill

Voltage

Input

for the

specifications

85C

Description
Offset

VOSOB

Power

Specifications

Analog Output Buffer Specifications

tables

TA

design

3-8

Data

1.0

Resistance

Low

PowerHigh
VOHIGHOB

Output

High

ohms

32

Load

Swing

Voltage

to

Vdd/2

PowerLow
Power

Low

VoLowoB

0.SxVdd1.1

High

Output

OSxVdd1.1
32

Load

Swing

Voltage

ohms

to

Vddf2

Power

Low

O.SxVdd

1.3

Fower

High

O.5xVdd

1.3

Supply

180B

Current

Including

Bias

Cell

No Load

Power

PSRROB

Table

Low

1.1

5.1

Power

High

2.6

8.8

Supply

3-9

Voltage

DC Analog

3.3V

Output

Symbol
Offset

Input

Average

VCMOB

Common-Mode

Input

Offset

Specifications

Mm

Power

Voltage

Swing

ohms

Load

to

Vdd/2

Low

0.SxVdd

High

0.5xVdd

Low

Output

Power

Voltage

Swing

Load

-f

1.0

1.0

lKohmstoVdd/2

Low

O.SxVdd

PowerHigh
Supply

Current

Power

HIGHLY

Including

Bias

Cell

No Load
0.8

Voltage

Rejection

CONFIDENTIAL

Document

ATTORNEYS

mA

4.3

mA

50

Ratio

2004

2.0

2.0

High

Supply

1.0

O.SxVdd-1.0

Low

Power

June

1.0

High

Output

High

Power

PSRRQB

Notes

IiVIC
Vdd

0.5

Range

Voltage

Power

130B

Units

mV

12

Low

Power

VoLowoB

Max

Typ

Value
Drift

Voltage

Input

dB

Resistance

Output

VOHIGHOB

Absolute

Voltage

TCV0306

ROUTOB

Buffer

Description

V005

mA

60

Ratio

Rejection

mA

No

dB

38-12011

Rev

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

20

APCYOO1 25545
APELOO1 3320

CY8C24x23

Final

3.3.5

DC

The

are

40
for

Table

10

lists

Mode

Pump

OV

6V and

only

or unless

to

Symbol

and

SMP

minimum

40

otherwise

Mode Pump

Switch

5V

5V

Output

3V

3V

Output

Available

BUn

5V

.8V VPUMP

input

Voltage

Range

In

Voltage

Range

from

AVPUMP

Loud

Load

AVPUMP

Ripple

Input

over

neglecting

Voltage

to

5.25V

25

and

ripple

3.25

3.60

Average

neglecting

ripple

tor

which
implementation
uF cap and Schottky

includes

uH

induc

diode

mA
1.6

1.0

Battery

Battery

VeAl

Battery

to Start

Pump

5.0

3.3

1.1

range

Regulation

Output

at

Notes

Units

mA

from

Voltage

Regulation

4.75V

3V

Average

5.Ov

VSAT3V

Line

ranges

5V and

5.25

25V

VPUMP

VBATSV

Line

Max

Typ

For

from

AVOUMP

to

5.0

Current

V6AT

VSATSTART

apply

3.00

Output

Minimum

temperature

parameters

4.75

VBAT

put

and

voltage

Typical

Specifications

voltage

PUMP

respectively

specified

voltage

VPUMP

for the

specifications

85

TA

Description

VPUMP

Specifications

Specifications

maximum

or

guidance

DC

Electrical

guaranteed

85C

TA
design

Sheet

Switch

table

following

and

Data

%V0e
depends

Ripple

on cap/load
35

Efficiency

Configuration

mVpp

50

of note

load

is

5mA

Configuration

25

of note

load

is

5mA

Vout

is

3.25V

Fpup

Switching

DCPUMP

Switching

V0

lethe

Vdd

\Iue

Duty

for

MHz

1.3

Frequency

50

Cycle

PUTrI

spedfied

by

the

VM2O

setng

in

the

LX2

PCR

ard

LVD

Spedfication

Table

3-14 on pege

24

Dl

Vdd

SMP
PS0CTM

Vs

Figure

June

HIGHLY

3-2 Basic

Switch

Mode

Pump

Circuit

2004

CONFIDENTIAL

Document

ATTORNEYS

No

38-12011

Rev

21

EYES ONLY

CONFIDENTIAL

ATTORNEYS

EYES ONLY

APCYOO1 25546
APELOO1 3321

CY8C24x23

Final

3.3.6

DC

The

following

and

-40C
for

are

Data

tables

or

guidance

3.OV

specifications

Analog

register

Table

The

3-11

5V DC Analog

CT

Continuous
levels

error

AGND

Ref

Power

Ref

Ref
RefHi

Ref
RefHi

Ref
RefLo
Ref
RefLo
Ref

Column

Ref

Ref
RefLo
Ref

PSoC blocks
RefLo

to the

local

The

refer to

Analog

Mm

5.25V
and

levels

power
the

Continuous

for

AGND

Reference

Analog

refer to
Control

PSoC block

Time

Max

Typ
1.30

Units

1.326

0.043

Vdd/2

Vdd/2

0.025

0.003

2xBG-O.048

BG0.024

2xBG-0.030

2x

P44

P2

Vddf2a
0.013

P2L41

BC

High

BC

0.009

Coiumn

to

Vdd/2

0.014

BC

0.008

0.016

AGND

Variation

-0.022

1.6x

BC-0.010

1.6xBC-f

0.018

Vdd/28
0.000

-0.034

0.034

High

BandGap
Power

Control

BC

1.6x
High

Power

Block

BC

Vdd/2

High

0.140

BG

Vdd/2

0.018

BG

Vdd/2

0.103

BandCap
Power

Control

P2 P2

Power

Control

P2

3.2

0.076

P26

BC

0.113

P46

BC

0.018

P26

0.077

Vdd/2

P2

BC

P2

Vdd/2

P2

P2

0.130

EG

P2

P2

0.016

P2

BG

P2

P2

0.098

1.3V

High

-0.133

0.016

0.100

BandOap
Power

Control

Vddf2
Control

BC

0.018

P2

P2

Power

Control

BC

P2

High

P2 P2

0.112

.3V

High

BanciGap
Power

Control

BO

High

BandGap

BG

3.2

High

0.112

BG

3.2

BO

3.2

0.076

BandOap
Power

BG

Vdd/2

High

BO

Vdd/2

0.051

0.024

BC

Vdd/2

098

BandCap
Control

RefLo

RefLo

to

25C

Bandcapa

RefHi

RefHi

at

Bandoapa

Block

RefHi

Ref

buffer

1.274

High

CTBlockPower

RefHi

3.3V

Specifications

High

Power

AGND

CT

4.75V

ranges

5V and

to

High

P2

P2

Block

AGND

apply

BandGapa

ACND

CT

Time

RefHi and

for

AGNO

of the

Vdd/2

Power

CTBlockPower

CT

temperature

parameters

Vdd/2a

Block

AGND

Power

Control

P2

Power

P2

Control

P2

BC

P2

Power

P2

Power

Vdd/2

P2

offtsofthe

P2
BG

P2 P2
local

butler

in

the

PsoCblock

Document

2004

CONFIDENTIAL

0.129

BG

0.084

P2

0.025

BC

P2

0.134

ATTORNEYS

P2

0.056

BG

0.026

P2

BG

107

.3V

High

indudesthe

50

0.023

Vdd/2

High

P24

BG

0.052

.3V

High

BandGap

P2

Control

EG

High

BandGap

AGNDtoIerar

HIGHLY

offset

Analog

Reference

Voltage

and

voltage

Typical

The power

the

Description
Bandgap

AGND

June

the

respectively

specified

through

include

for the

specifications

85C

TA

PSoC block

Reference

Symbol

BG

minimum

Time

AGND

for

and

-40C

measured

are

Continuous

stated

limits

and

otherwise

or unless

only

the

of the

3.6V

to

Specifications

Specifications

maximum

guaranteed

list

85C

The guaranteed
power

Electrical

Analog Reference

TA

design

Sheet

Bandgapvoltage

No

38-12011

0.057

is

.3V

P2 P2

0.026

P2 P2

Rev

EYES ONLY

CONFIDENTIAL

0.110

2%

-ATTORNEYS EYES ONLY

22

APCYOO1 25547
APELOO1 3322

CY8C24x23

Table

Data

Final

3-12

Sheet

DC Analog

3.3V

Electrical

Reference

Symbol

Specifications
Mm

Description

BC

Bandgap

AGNO
CT

1.30

VddI2

Power

AGND

BandCap

P2

ACND

Not

P2

Power

Block

0.037

Power

Block

ACND
CT

0.001

P2

Allowed

P2

to

0.008

BC

o.oog

BC

1.6x
High

Column

ACND

Variation

-0.027

oo

0.000

Allowed

Not

Allowed

Not

Allowed

High

Power

Control

P2

RefHi

Ref

Ref
RefHi

3.2

Vdd/2

High

P2 P2
Power

Control

Q2

BendCap

P2

RefHi

0.5V

High

Power

Control

P2

P2

BandCap

Ref

P2

Vdd/2

0.5V

High

P2

P2141

Ref

Vdd/2

Ref
RefLo

Allowed

Allowed

Not

Allowed

Not

P2

P216

Power

P44

Allowed

O.S5

High

P2

BandOap

P2 P2
Power

Control

Power

Vdd/2

High

High

AGNDtolerarca

DC
table

TA

indudesthe

Analog
lists

85c

guidance

Symbol

to

butler

local

PSoC

3.OV

only

0.5V

P24

Block

3.6V

the

PCblook

and

-40C

otherwise

or unless

Block

and

in

Reaiator

Cac

Capacitor

Unit

Unit

WIne
Value

Continaoaa
Switch

.3V

P26

P2

0.022

P26

0.092

2%

minimum
TA

for the

specifications

85C

Voltage

respectively

Typical

Typ

and

temperature

parameters

Max

apply

to

4.75V

ranges

5V and

3.3V

at

to

5.25V

25C

and

specified

Specifications
Mm

Time

80

Document

ATTORNEYS

Units

Notes

12.24

Cup

2004

CONFIDENTIAL

is

Banclgapvoltage

Description

Rci

P2

Specifications

maximum

guaranteed
or

P2

Vdd/2

offestsofthe

DC Analog PSoC

3-13

P2

0.057

High

Control

RefLo

design

0.048

P2

High

BandCap

RefLo

Ref

Not

BnndCnp

Power

Control

Ref

P2

o.oog

BandCap
Control

Ref

P216

High

Power

Control

RefLo

P2

Allowed

Not

Power

Control

RcfLo

0.075

BandCap
Not

Ref

following

mV

0.034

High

Power

Control

RefHi

-40C

0.O1B

Allowed

Not

and

BC

BandCap

Ref

The

1.6x

0.010

Vdd/2

Not

3.3.7

BC

BandCap
Power

Control

RcfHi

0.015

High

Vdd/2

Ref

BC

0.005

1.6x

-0.034

Power

Block

BC

High

Power

Colemn

RefHi

HIGHLY

P2

0.002

BandCap

1.6

CTBlock

June

Vddf2

BandCap

ACND

Table

0.020

Vdd/2

High

CT

for

Vdd/2

High

AGNO

are

Units

1.326

High

Power

Block

CT

Max

Typ

1.274

Vdd/2

Block

CT

Reference

Voltage

Specifications

No

38-12011

11

Rev

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

23

APCYOO1 25548
APELOO1 3323

CY8C24x23

Final

3.3.8

DC POR

The

following

and

-40C
for

are

Note

The

Table

table

bits

Sheet

lists

for

3.OV

maximum
3.6V

and

-40C

VM

and

table

in

the

information

more

and

otherwise

DC POR and LVD

3-14

to

or unless

only

PCRLEV

Symbol

on

value

for

PPOR

PORLEV
PORLEV
PORLEV

VPPOROR
vPPOR1R
vPPOR2R

Vdd
vPPORO

Value

refer

VLT_CR

VPPOR2

PPOR

and

voltage

Typical

to

bits

in

the

VLT_CR

register

See

apply

to

4.75V

ranges

5V and

3.3V

at

to

5.25V

25C

and

the

PSoC Mixed

Signal

Array

Technical

Specifications

Trip

positive

Mm

Typ

Max

units

Notes

ramp
2.908
4.394

lOb

PPOR

4.548

Trip

negative

ramp

DUb

2.816

Olb

4.394

lOb

4.548

92

Hysteresis

VPHD

PORLEV

DUb

VpH1

PORLEV
PORLEV

01b

mV

lOb

mV

VPH2

Vdd

Value

VM
VM
VM
VM
VM
VM
VM
VM

VLVDO
VLVD1
VLVD2
VLVD3
VLVD4
VLVD5
VLVD6
VLVD7

Vdd

Vpupi
VPUMP2
VpuMp3
VPUMP4

Vpup5

Vu6
VPUMP7

for

LVD

Trip
2.863

2.921

2.979

OOlb

2.963

3.023

3.083

01Db

3.070

3.133

3.196

011b

3.920

4.00

4.080

10Db

4.393

4.483

4.573

10Th

4.550

4.643

4736b

liOb

4.632

4.727

4.718

4.814

00Db

2.963

3.023

3.083

001b

3.033

3.095

3.157

01Db

3.185

3.250

3.315

OlIb

4.110

4.194

4.278

10Db

4.550

4.643

4.736

lOib

4.632

4.727

4.822

IlOb

4.719

4.815

4.911

ilIb

4.900

5.000

5.100

IlIb

for

PUMP

greater

tn

53

mVabove PPOR FCRLEV

Mays

greater

tln

53

mVabove PPOR FCRLEV

for

10

falling

4.910

supy

falling

supy

for

Document

2004

CONFIDENTIAL

4.822

Trip

Aays

June

mV

00Db

Value

VM
VM
VM
VM
VM
VM
VM
VM

VPUMPO

HIGHLY

temperature

parameters

register

Olb

PORLEV
PORLEV
PORLEV

VppoRl

respectively

DUb

for

for the

specifications

85C

TA

specified

below

the

minimum

Description
Vdd

Specifications

and LVD Specifications

or

guidance

Manual

Electrical

guaranteed

85C

TA

design

Reference

Data

ATTORNEYS

No

38-12011

Rev

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

24

APCYOO1 25549
APELOO1 3324

CY8C24x23

Final

Data

3.3.9

DC

Programming

The

following

and

-40C
for

are

Table

table

lists

85c

TA

design

Sheet

3.OV

Input

Low

voltage

vIHP

Inpat

High

voltage

Input

current

1ILP

11HP

Input

Applying

when

current

Low

votaga

High

voltage

Daring

Endurance

FlashaNi

Flash

Endurance

FlashDR

HIGHLY

vihp

During

Output

Flash

Data

of

36

per

fttII

Flash

industrial

or

to

4.75V

ranges

5V and

3.3V

at

5.25V

to

25C

and

or

P1

Notes

Units

0.8

2.2

verify

0.2

mA

Driving

internal

pull-down

resistor

1.5

During

to

P1

or

P1

During

Programming
Programming

mA

Driving

internal

pull-down

resistor

vss

or verify

or

Vdd

vedfy

5010

rame

0.75

Vdd

1.0

Erasa/wrtte

50000

totaO

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ATTORNEYS

balanced

each

user

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httpf/wm.cprese.com

2004

be

nay

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under

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cycles

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10

and

voltage

Typical

specified

Mm

Programming

During

vOLV

Flash

respectively

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Programming

FlashuNpa

for the

specifications

85C

TA

or verify

Programming

During

when

Programming

June

otherwise

Programming

During

vILP

For

minimum

Description
current

Supply

the

and

-40C

and

Specifications

Symbol
1DDP

sees

3.6V

or unless

only

DC Programming

3-15

to

Specifications

Specifications
maximum

guaranteed
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guidance

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forth

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EYES ONLY

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AC

3.4

The

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Table

table

lists

85C

Specifications

3.OV

maximum

chip-Level

3.6V

to

and

minimum

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and

otherwise

or unless

only

Oscillator

Fcpui

CPU

Frequency

SV

Fcpu2

CPU

Frequency

and

voltage

temperature

parameters

Typical

Mm

apply

Digital

4.75V

ranges

5V and

to

3.3V

at

to

5.25v

25C

and

MHz

24

246ab

MHz

0.93

Nominal

24.6

0.93

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Notes

units

24

12

1235c

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492abd

MHz

48

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AC

to

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trim

factory

utilizing

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F48M

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Max

Typ

23.4

Frequency

3.3v

Psoc

respectively

specified

Description
Main

internal

for the

specifications

85C

TA

Specifications

Symbol
FIMO

Specifications

Characteristics

guaranteed
or

guidance

3-16

Electrical

Chip-Level

TA

design

Sheet

Electrical

AC

3.4.1

are

Data

Final

cyde

Digital

Block

Specifications

below

P3cc

F24M

Digital

F32K1

Biock

Frequency

Low

Speed

Oaciilator

internal

External

F32K2

PLL

FPLL

24

Jitter24M2

24

kHz
kHz

MHz

23.986

Frequency

MHz

MHz

64

32.768

Oscillator

Crystal

246bsd

32

15

Frequency

Period

PLL

Jitter

TpLLSL5w

PLL

Lock

PLL

Lock

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for

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10

x732

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of

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600

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to

1%

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to

100

32

Jitter32k

kHz

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DC24M

100

Jitter

Reset

External

TXRST

700
2800

ppm

Width

Palse

24

MHz

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24

MHz

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Fout48M

48

MHz

Output Frequency

Jitter24Ml

24

MHz

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FM

Maximum

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50

46.8

of

kHz

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48.0

IMO

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50

Size

frequency

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pa

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Step

as

10

MHz

600

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row output

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end

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properly

loaded

rrexirrum

drive

level

IASS

PLL
Enable
TPLLSLEw

24

iii

MHz

EPLL

PLL
Gain

Figure

June

HIGHLY

3-3

PLL Lock

Timing

Diagram

Document

2004

CONFIDENTIAL

ATTORNEYS

No

38-12011

Rev

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

26

APCY00125551
APELOO1 3326

CY8C24x23

Final

Data

Sheet

Electrical

Specifications

PLL
Enable

14

24

TPLLSLEWLOW

MHz

FPLL

PLL
Gain

Figure

3-4

PLL Lock

Low

for

Gain

Setting

Timing

Diagram

32K
32

Select

14

kHz

To3

F32 K2

Figure

3-5

External

Crystal

Oscillator

Startup

Diagram

Timing

Jitter24Ml

________
F24M

_______
Figure

3-6 24

__________________
MHz

Period

Jitter

IMO

Timing

_______

Diagram

Jitter32k

14

_________
F32K2

_______
Figure

June

HIGHLY

3-7 32

__________________
kHz

Period

Jitter

ECO

Timing

CONFIDENTIAL

Diagram

Document

2004

ATTORNEYS

_______

No

38-12011

Rev

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

27

APCYOO1 25552
APELOO1 3327

CY8C24x23

Final

3.4.2

AC

The

following

and

-40C
for

are

Table

Sheet

Electrical

General Purpose

table

lists

85C

TA

design

3-17

Data

guidance

AC GPIO

3.OV

only

to

Specifications

maximum

guaranteed
or

10

3.6V

and

-40C

otherwise

or unless

minimum
TA

respectively

Typ

TRiseF

Rise

TFaIIF

Fall

TRiseS

Rise

TFaIIS

Fall

Normal

Time

Normal
Slow

Time
Time

to

apply

4.75V

ranges

5V and

3.3V

Slow

Strong

Strong
Strong

Strong

Max

at

to

5.25V

25C

and

Notes

Units

12

Mode
Mode
Mode

Mode

Cload
Cload
Cload

Cload

ns

Vdd

4.5

to

5.25V

10%

18

50 pF
50 pF

MHz

18

Frequency

Operating

Time

temperature

parameters

specified

Description

GPIO

and

voltage

Typical

Specifications

Symbol
FGpIo

for the

specifications

85C

Mm

and

Specifications

ns

Vdd

4.5

to

5.25v

10% -90%

90%

10

27

ns

Vdd

to

5.25v

10%

90%

10

50 pF
50 pF

22

ns

Vdd

to

5.25V

10%

90%

ziiii
TRiseF

Figure

June

HIGHLY

3-8

TFaIIF

TRiseS

TFaIIS

GPIO Timing

Diagram

Document

2004

CONFIDENTIAL

ATTORNEYS

No

38-12011

Rev

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

28

APCYOO1 25553
APELOO1 3328

CY8C24x23

Final

3.4.3

AC

The

following

and

-40C
for

are

Data

Note

Settling

Table

3-18

Electrical

Operational

tables

guidance

maximum
3.6V

and

rates

5V AC Operational

Symbol
TROA

to

and

minimum

and

-40C

otherwise

or unless

only

slew

times

3.OV

or

load

Time

Settling

respectively

and

voltage

Typical

based

are

on

the

Analog

Continuous

Time

apply

80%

from

Power

Mm

of

0.1%

to

10

of

Max

Typ

Specification

Power

Medium

Power

Medium Opamp

Power

High

Power

High

3.9

TSOA

Falling

load

Bias

Bias

0.72

High

Time

0.62

High

20%

from

Low

of

to

0.1%

of

SV 10

Bias

Specification

High

Rate

Bias

Bias

Opamp

High
Slew

Rising

Power

20%

to

high

power

bias

levels

levels

maximums

for low

bias medium
opamp
medium
power and high
between

low

and

power

opamp

high

power

and

power
and
bias

levels

levels

is

0.92

High

pF

load

Unity

Gain

Specification
0.15

Low

Power
Power

Medium Opamp

Power

High

Power

High

V/Ms

Medium

Slew

Falling

Power

Opamp

Bias

V/Ms

High

Bias

1.7

High

power

are

between

low

and

opamp

high

power

and

power
and
bias

levels

levels

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20%

to

6.5

High

8O%1O

pE

load

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Specification

High

Power

High

V/Ms

Gain

Medium

Power

V4is

0.01

Rate

Bias

Power

Gain
Power

Opamp

Bias

V/Ms

High

Bias

0.5

High

for low

power

are

between

low

and

opamp

high

power

and

power
and
bias

levels

levels

V/Ms
V/Ms

Bias

4.0

V/Ms

0.75

High

Low

MHz

Product

Specification

Power

Low

Power
Power

Medium Opamp

Power

High

Power

High

MHz

Medium

kHz

minimums

bias medium
opamp
medium
power and high

high

V/Ms

Opamp

Bandwidth

Opamp

Bias

High

minimums

for low

opamp
bias medium
medium
power and high

high

are

between

low

and

high

power

opamp
power

and

power
and
bias

levels

levels

MHz
Bias

MHz

3.1

High

MHz
Opamp
Power

Bias

Medium Opamp

Bias

200

High

Document

ATTORNEYS

MHz

5.4

High

2004

CONFIDENTIAL

for low

V/Ms

Opamp

Low

at

minimums

opamp
bias medium
medium
power and high

high

V/Ms

Power

Noise

is

0.72

High

80%10

Low

Power

HIGHLY

opamp

high

and

High

Power

June

and

and

power
and

Medium

Medium Opamp

Power

ENCA

low

power

is

pF

5.9

Opamp

Power

BWOA

power

between

for low

bias medium

high

Power

SRFOA

maximums

is

are

SRROA

and

is
Bias

Low

Power

5.25V

to

25C

is

High

Gain

Power

at

is

Opamp

Settling
Unity

opamp

medium
is
are

Opamp

3.3V

Notes

Units

pF

Low

Low

4.75V

ranges

5V and

PSoC block

high

Power

to

Amplifier Specifications

Gain

Unity

temperature

parameters

specified

bandwidth

gain

for the

specifications

85C

TA

Description
Rising

Specifications

Amplifier Specifications

guaranteed

list

85C

TA

design

Sheet

No

38-12011

nV/rt-Hz

Rev

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

29

APCYOO1 25554
APELOO1 3329

CY8C24x23

Table

Data

Final

3-19

AC

3.3V

Sheet

Electrical

Operational

Symbol
TROA

Amplifier Specifications
Mm

Description
Rising

load

Time

Settling

80%

from

of

AM

0.1%

to

of

AM 10

Max

Typ

Notes

Units

pF

Specification

Low

Power

Low

322

Powar

Medium

Power

Medium Opawp

Power

High

Powar

High

are

TaoA

Falling

load

Bias

Opamp

Volt

Bias

Power

not

Time

Bias

Bias

not

Operation

3.3 Vot

High

Low

20%

from

of

AM 10

0.1%

to

pF

Specification

Bias

High

Power
High

3.3

Bias

Slew

Rate

Rising

Low

not

Bias

High

power

between

low

and

opamp

high

power

and

power
and
bias

levels

levels

Bias

Bias

0.72

High
not

Operation

3.3 Vot

High

sapported
Power

High

sapported

20%

to

80%10

pF

load

Unity

Gain

Specification
0.31

Opamp

Bias

Power

High

Power

High

V/Ms

High

Medium Opamp

Power

V/Ms

Medium

Power

High

Opamp
Slew

Falling

Power

3.3

Volt

Opamp
Bias

not

Rate

Low

High

Bias

Bias

2.7

High
not

Operation

3.3 Vat

High

to

pF load

Unity

Gain

Specification

Power

High

Power

High

V/Ms
V/Ms

High

Medium Opawp
Volt

Opamp

Bandwidth

Bias

High

1.8

High

Bias

Bias

High

not

Operation

Bias

3.3 Vot

High

not

Opamp

Bias

Power

High

Power

High

MHz

High

Volt

Opamp
Bias

not

Power

Bias

High

Bias

for low

power

are

between

low

and

opamp

high

power

and

power
and
bias

levels

levels

minimams

for low

bias mediam
opamp
wediaw
power aed high

high

are

between

low

and

high

power

opamp
power

and

power
and
bias

levels

levels

Bias

High

not

Operation

3.3

MHz

2.8

High

Volt

High

sappoded

MHz

Power

MHz

sappoded

Medium Opamp

Bias

ATTORNEYS

200

High

Document

2004

CONFIDENTIAL

levels

levels

MHz

3.3

kHz

minimams

bias mediam
opamp
mediam
power and high

high

Specification

MHz

Medium

at

bias

V/Ms

0.67

Medium Opamp

Noise

power

V/Ms

sapported

Power

Opamp

opamp

high

Power

Product

Power

High

and

V/Ms

sapported

Low

Low

low

V/Ms

3.3

Power

between

V/Ms

Medium

Power

Power

are

and

power
and

V/Ms

80%10

Bias

Powar

Opamp

power

Power

High

sapported

20%

Opamp

Gain

for low

V/Ms

sappoded

0.24

High

minimams

opamp
bias mediam
wediaw
power aed high

high

V/Ms

Bias

Low

Power

HIGHLY

for low

High

Low

Power

Volt

Opamp

High

Opamp

Power

June

levels

levels

Medium

Medium Opawp

Power

ENCA

maximums

bias mediam
opamp
wediaw
power aed high

5.41

Opamp

Power

BWOA

hias

is

AM

of

high

Powar

SRFOA

power

Power

sapported

are

SRROA

opamp

high

sapported

High

Low

Power

and

0.72

High

Gain

Unity

low

and

power
and

is

High

Bias

High

Opamp

Settling

between

power

is

3.3

Opamp

for low

high

Power

High

maximums

bias mediam
opamp
mediem
power and high

Gain

Unity

Specifications

No

38-12011

nV/rt-Hz

Rev

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

30

APCYOO1 25555
APELOO1 3330

CY8C24x23

Final

3.4.4

AC

The

following

and

-40C
for

are

Table

Sheet

table

lists

85c

AC

3.OV

only

Block

Digital

Function

to

and

and

-40C

otherwise

or unless

minimum
TA

Frequency

No

Frequency

With

Enable

Pulse

Mm

apply

to

ranges

5V and

MHz

24.6

4.75V
3.3V

at

to

5.25V

25C

and

No

Frequency

Enable

Enable

Notes

MHz

4.75v

Vdd

4.75v

Vdd

5.25v

ns

50

Frequency

Units

49.2

Width

49.2

MHz

24.6

Input

Input

MHz

25v

Width

Pulse

Mode

Restart

Asynchronous

Restart

Synchronous

20

ns

50

Mode

Mode

Disable

ns

50

Maximum
Maximum

Input

Clock

Maximum

Input

SPIM

Maximum

SPIS

Maximum

ns

Frequency

CRCPRS

temperature

ns

capture

Maximum

Kill

and

parameters

Max

Typ

capture

Maximum
Band

voltage

Typical

50

Maximum
coaster

respectively

specified

Width

Pulse

Capture

for the

specifications

85C

Specifications

Maximum

Dead

maximum
3.6V

Description

Timer

Specifications

Specifications

guaranteed
or

guidance

Electrical

Block

Digital

TA

design

3-20

Data

49.2

MHz

4.75v

Vdd

5.25v

Frequency

49.2

MHz

4.75v

Vdd

5.25v

Clock

Frequency

24.6

MHz

Input

Clock

Frequency

8.2

MHz

Input

Clock

Frequency

4.1

ns

4.75v

Vdd

525

PRS Mode
CRCPRS

CRC Mode

Width

Maximum

Receiver

Sins

HIGHLY

SS_

Maximum

Transmitter

June

of

ninitmm

Negated

Input

Input

input

pulse

Between

clock

ns
16.4

Frequency

width

is

tased on

the

input

synchrorizers

Document

ATTORNEYS

running

No

at

24

MHz 42

38-12011

ns

MHz

49.2

16

2004

CONFIDENTIAL

50

Frequency

Clock

Transmissions

MHz

norriral

pehod

Rev

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

31

APCYOO1 25556
APELOO1 3331

CY8C24x23

Final

3.4.5

AC

The

following

and

-40C
for

are

Table

Data

tables

list

85C

guidance

3.OV

or

3.6V

to

and

minimum

-40C

and

otherwise

or unless

only

TA

Time

Settling

0.1%

to

for the

specifications

85C

voltage

Mm

IV Step

Max

Units

Typ

Low

2.5
2.5

Time

Settling

0.1%

to

IV

Step

lOOpF

2.2
2.2

Rate

20%

80%

to

IV

Step

Low
High

Slew

Falling

0.65

80%

to

20%

1V

Step

V/us

0.65

V/ps

High

0.65

VIis

Small

20mV

Bandwidth

Signal

3dB

BW

Load

lOOpF

0.8

Large
Power

BW

High

3.3V

AC Analog

Symbol

kHz

Load

lOOpF

Low

3-22

kHz

300

1V 3dB

Bandwidth

Signal

MHz

300

High

MHz

0.8

Low

Power

Buffer Specifications

Output

Mm

Description
Rising

Time

Settling

to

0.1%

1V

Step

Max

Typ

Units

Power

Low

3.8

High

3.8

Falling

Time

Settling

to

0.1%

IV Step

is

Load

lOOpF

Power

Low

2.6

Power

High

2.6

Slew

Rising

Rate

Power

20%

80%

to

IV Step

High

Slew

Falling

is

IOOpF Load

Low

Power

0.5

Rate

80%

to

20%

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V/ps

0.5

VJs

Load

lOOpF

Power

Low

0.5

V/ps

Power

High

0.5

VJs

0.7

MHz

0.7

MHz

200

kHz

200

kHz

Small

Bandwidth

Signal

Power

Large

Bandwidth

Signal

Power

HIGHLY

3dB

BW

lOOpF

Load

High

1V

3dB

BW

lOOpF

Load

Low

Power

June

20mV

Low

Power

BWOB

Notes

Load

OOpF

Power

BWOB

Notes

Load

lOOpF

Low

Power

SRFOB

and

V/ps

0.65

Rate

Power

SRROB

5.25V

Load

lOOpF

Power

TsoB

to

25C

is

Slew

Rising

Power

TROB

at

is

High

Power

Table

4.75V
3.3V

Load

Low

Power

BWOB

ranges

5V and

is

Falling

Power

BWOB

to

iS

High

Power

SRFOB

apply

Load

lOOpF

Power

SRROB

temperature

parameters

Power

TSOB

and

Typical

respectively

specified

Description
Rising

Specifications

Buffer Specifications

Output

Symbol
TROB

maximum

guaranteed

5V AC Analog

3-21

Electrical

Analog Output Buffer Specifications

TA

design

Sheet

High

Document

2004

CONFIDENTIAL

ATTORNEYS

No

38-12011

Rev

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

32

APCYOO1 25557
APELOO1 3332

CY8C24x23

Final

3.4.6

AC

The

following

and

-40C
for

are

Table

Data

Electrical

tables

maximum

guaranteed

list

85C

or

guidance

3.0V

Symbol

Max

Table

3.3V

3-24

AC

External

Clock

with

CPU

Clock

divide

by

FOSCEXT

Frequency

with

CPU

Clock

divide

by

Low

Period

Power

drrum CPU
If

the

cent

of the

cyde

The

following

and

-40C
for

3-25

Clock

table

is

lists

guidance

24.24

greaterb

is

dock

3.OV

Wth

3.3V

is

greater

CPU

the

than

dock

12 Fv1-

the

divider

CPU

set

dock

to

maximum
3.6V

and

and

-40C

otherwise

minimum
TA

TFSCLK

Fall

TSSCLK

Data

THSCLK

Data

FSCLK

Frequency

Set

of

of

Flash

Erase

TWRITE

Flash

Block

TDSCLK

Data

Out

be

to

Write

Delay

adhere

or greater

for the

specifications
respectively

In

nxirmJm
the

case

Falling

and

ard thy

frecliery

CPU

dock

temperature

parameters

divider

vill

cyde
erisre

requirenents
that the

fifty

per

apply

to

ranges

5V and

4.75V
3.3V

at

to

5.25V

25C

and

specified

Specifications
Mm

Max

Typ

Units

Edge
Edge

of

of

SCLK

ns

40

ns

40

SCLK

Notes

ns

20
to Falling

ns

MHz

lock

Falling

ms

15

Time
from

to the
this

voltage

Typical

SCLK

Time

30
Edge

of

ms

SCLK

45

Document

2004

CONFIDENTIAL

set

niist

20

Time from

TERASEB

nu

SCLK

up Time

Hold

divider

dock

exterrI

SCLK

of

Time

is

the

to

85C

Description
Time

Rise

ns

.7

Specifications

or unless

only

Symbol

ns

41

nt

AC Programming

TRSCLK

MHz

41

by

at

guaranteed
or

MHz

150

12MW

external

85C

or

Notes

Units

12.12

by

divide

Programming

TA

design

divide

Max

Typ

1a

Switch

requirerrnt

AC

3.4.7

to

freqery

freqncy
cUy

IMO

Up

Clock

CPU

with

and

ns

Mm

Frequency

CPU

5.25V

Specifications

FOSCEXT

with

to

25C

ns

Description

Period

at

150

Switch

Symbol

High

3.3V

Notes

Units

206
to

4.75V

ranges

5V and

to

MHz

20.6

IMO

apply

Specifications

Period

Up

temperature

parameters

24.24

Power

HIGHLY

Typ

and

voltage

Typical

specified

Period

Low

June

respectively

Frequency

High

Table

for the

specifications

85C

TA

Desrtptian

FOSCEXT

are

-40C

and

otherwise

or unless

only

minimum

and

Mm

3.6V

to

5V AC External Clock

3-23

Specifications

Clock Specifications

External

TA

design

Sheet

ATTORNEYS

No

38-12011

ns

Rev

EYES ONLY

CONFIDENTIAL

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33

APCYOO1 25558
APELOO1 3333

CY8C24x23

Final

Data

3.4.8

AC

12C

The

following

and

-40C

are

for

Table

table

lists

maximum

guaranteed
or

guidance

AC

3-26

Electrical

3.OV

to

3.6V

otherwise

or unless

only

Characteristics

of the

SDA

12C

minimum

and

-40C

and

Symbol

respectively

THDSTAI2C

Clock

and

SCL

Time

repeated

the

period

Mode

TLOWI2C

LOW

THIGHI2C

HIGH

TSuSTAI2c

Set-up

THDDATI2C

Data

Hold

TSUDATI2C

Data

Set-up

TsusToI2c

Set-up

TBUFI2C

Bus

T8120

Pulse

Period

for

Condition

After

this

Max

Time

Width

4.75V
3.3V

at

to

5.25V

25C

and

Notes

kHz

4.0

0.6

is

4.7

1.3

is

4.0

0.6

is

4.7

0.6

is

boa

4.0

START

0.6

4.7

Condition

1.3

is

Time
for

STOP

Condition

STOP

Between

of

ranges

5V and

Units

400

Time

Free Time

to

generated

Clock

Repeated

apply

ode

Mm

250

is

Clock

SCL

of the

Time

START
pulse

SCL

of the

Period

Fast

Max

Miri

100

clock

first

temperature

parameters

Pins

Frequency

Hold

and

voltage

Typical

specified

Description

SCL

for the

specifications

85C

TA

Standa

FSCLI2C

Specifications

Specifications

85C

TA

design

Sheet

spikes

are

and

suppressed

START
by

the

Condition

input

ns

is

is

50

fil-

ns

ter

Fa-Mxle
the
bit

12C-bus

if

to the

device

SDA

line

device

cs

can Le used

retcht

tj-

1CXL

in

Standard-ibde

LCW4erkxi
250

of

l2C-bJssysten

SCL

gml

ns accordim

If

to the

it

the

sh vic

requirerrent

cbesretdi

Standard-Wbde

tj

2E0 ns

ri
of the

LGNenod

before

12C-busspeaflcation

then

Le rrt

SCL grHl
SCL
the
line

This
it

is

ill

aLtorrtically

rii outpjt

next

be
data

released

SDA

SCL

Figure 3-9

June

HIGHLY

Definition

Timing

Document

2004

CONFIDENTIAL

for

ATTORNEYS

No

for

Fast/Standard

38-12011

Mode

on

the

12C

Bus

Rev

34

EYES ONLY

CONFIDENTIAL

APCYOO1 25559

ATTORNEYS

EYES ONLY

APE

LOOl 3334

Cyppss

This

chapter

package

4.1

illustrates

and

the

typical

the

packaging

package

Packaging

specifications

on

capacitance

for the

CY8C24x23

PS0C device

along

with

the

thermal impedances

for

each

pins

crystal

Dimensions

PIN

ri ri

LD

ri

DIMENSIDNS

IN

INCHES

MIft

o24c1

JLJ
SEATING

PLZ

MO8

MTN

0014

5185075A
Figure

May 2004

HIGHLY

CONFIDENTIAL

Cypress MicroSystems

ATTORNEYS

4-1 8-Lead

Inc

2003

300-Mu PDIP

Document

No

38-12011

Rev

EYES ONLY

CONFIDENTIAL

35

APCY0O1 25560

ATTORNEYS

EYES ONLY

APE

LOOl 3335

CY8C24x23

Final

Data

Sheet

Packaging

DIMENSIONS

IN

INCHES

Information

MINI

MAX
OPTIONAL
ROUND ON SINGLE
LEADFRAME
RECTANGULAR
ON MATRIX
LEADFRAME
PIN

ID

IS

REFERENCE
PACKAGE

JEDEC
WEIGHT

MS012
O.O7gns

PART
50615

STANDARD

SZOS.15

LEAD

PKG

FREE

P16

D.OhlIII4

SEATN

PLANE

4r

rc.19D1
C9O249J

Oflfl4OG

aatn

51-85066-0C

UJJ1Lt487

4-2 8-Lead

Figure

150-Mu SOIC

1D

nil

nit

nttl

ntt

rtt

nttl

rttl

nit

nit

ntt

DIMENSIONS

ON

INCHES

.ML
MAX

oaso
0270

/1

20

it

0130
5.070

PLANE

0280
0.3DD

MON

51-85011

Figure

June

HIGHLY

Document

2004

CONFIDENTIAL

4-3 20-Lead

ATTORNEYS

No

300-Mil

38-12011

Molded DIP

Rev

36

EYES ONLY

CONFIDENTIAL

APCYOO1 25561

ATTORNEYS

EYES ONLY

APE

LOOl 3336

CY8C24x23

Final

Data

Sheet

Packaging

74

1.14

Information

710

711

174

T5

7iMNoJuicot

111

O1ILL1

M17
71411

.H

770
7/10

74471010

77

0774

5185O77C

Figure

4-4 20-Lead

PLN

210-Mil

SSOP

ID

INCHES

DNENSIDNS

IN

REFERENCE

JEDEC MD119

ilL41

MAX

PACKAGE

WEIGHT

OS5gms

PART

sat3

STANDARD

SZC3

LEAD

PKG

FREE

Nc

Pt.AC

flZLJ

DaDaEOSTi

tOU27

6185O24
Figure

June

HIGHLY

2004

CONFIDENTIAL

4-5

20

Document

ATTORNEYS

Lead

No

300 Mu

38-12011

Molded SOIC

Rev

37

EYES ONLY

CONFIDENTIAL

APCYOO1 25562

ATTORNEYS

EYES ONLY

APE

LOOl 3337

CY8C24x23

Final

Data

Sheet

Information

Packaging

14

EDIENSIENS

IN

INCFESE

pw
FED1CE
IPUC71I

-Lr

NDU5

LUEC
PAPT

PE3

S5

STNIEARD

PZ3

is

LEAD

FREE

PKG

P6

5185O14C
Figure 4-6

28-Lead

300-Mu Molded

DIP

114

fl4-

1ELE
uLMLLL1

LfL lN

LLLt14L

LIII

MIN
NI1I.XL

.H

4E441144

.H

15

ILlill

JL55

111
LtNIJNN

M1.Nh

NI1t

VLANH

nn
45

N1

54O

5135D79C
Figure

June

HIGHLY

2004

CONFIDENTIAL

4-7 28-Lead

Document

ATTORNEYS

No

210-Mu SSOP

38-12011

Rev

38

EYES ONLY

CONFIDENTIAL

APCYOO1 25563

ATTORNEYS

EYES ONLY

APE

LOOl 3338

CY8C24x23

Final

Data

Sheet

Information

Packaging

PIN

10

14

DIMENSIONS

INCHES 11Bi

IN

MAX
3g4EiD.t1i

15

REFERENCE

JEDEC MEJ119

0419L1Q.4I

0.917591

PACKAGE

WEIOHT

0B5gris

21

SZ

5.03210.81J

EATIN0

P10

STANDARD
LEAD

FREE

PNG

PLANE

Ofl2.3D1

Jl

a1RDcas7

00130.33

iii1

o.DD4oio

001

0010.35

Figure

51-85D26-C

4-8 28-Lead

300-Mu Molded SOIC

DIMENSIONS

IN

mm

MIN

I0.05lC
1.00

510

MAX
0.05

0.20

MIL

REF

MIL

MAX

0.80

485

0.50

31
38

MAX

DIA
510
4.85

01T
SEA11NO
PLANE

TOP

VIEW

SIDE

VIEW

BO1TOM

VIEW
51-85188

Figure 4-9

June

HIGHLY

2004

CONFIDENTIAL

Document

ATTORNEYS

32-Lead

No

5x5

38-12011

mm MLF

Rev

39

EYES ONLY

CONFIDENTIAL

APCYOO1 25564

ATTORNEYS

EYES ONLY

APE

LOOl 3339

CY8C24x23

Sheet

Packaging

4-1

Thermal

Impedances

per

Package

Package

Oj

Typical

8PDIP

123CW

8SOIC

185CM

2OPDIP

1o9ciw

2OSSOP

117C/W

20 SOIC

81

CIW

28

69

C/W

PDIP

28SSOP

lolciw

28301C

74C/W

32MLF

22C/W

POWER

TA

9JA

Capacitance on

4.3

Table

4-2

Typical

Package

Package

Crystal

Capacitance

on

Package

Pins

Capacitance

2.8

pF

SOIC

2.0

pF

20 PDIP

3.0

pF

SSOP

2.6

pF

20 SOIC

2.5

pF

28 PDIP

3.5

pF

SSOP

2.8

pE

28 SOIC

2.7

pF

MLF

2.0

pE

20

28

32

HIGHLY

Pins

Crystal

PDIP

June

Information

Thermal Impedances

4.2
Table

Data

Final

Document

2004

CONFIDENTIAL

ATTORNEYS

No

38-12011

Rev

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

40

APCYOO1 25565
APELOO1 3340

.S

Ciss MIcKSYTMs

The

following

Table

table

lists

CY8C24x23

5-1

the

CY8C24x23

PS0C Device

PSoC Device

Family

familys key package

Key Features

and

Ordering

features

and

ordering

codes

Information

Pin

150 Mu SOIC

CY8C24123-24S1

256

Yes

-40C

to

850

No

Pin

150 Mu SOlO

CY8C24123-24S1T

256

Yes

-400

to

85C

No

CY8C24223-24Pl

256

Yes

-400

to

850

16

Yes

CY8C24223

256

Yes

400

to

550

16

Yes

CY8C24223-24PVIT

256

Yes

-400

to

850

16

Yes

CY8024223-24S1

256

Yes

-400

to

55C

16

Yes

CY8C24223

256

Yes

400

to

85C

16

Yes

CY8C24423-24P1

256

Yes

-400

to

85C

24

10

Yes

CY8C24423-24PVI

256

Yes

-400

to

850

24

10

Yes

CY8C24423-24PVIT

256

Yes

-400

to

550

24

10

Yes

CY8C24423

24Sl

256

Yes

400

to

850

24

10

Yes

0Y8C24423

24S1T

256

Yes

400

to

850

24

10

Yes

256

Yes

-400

to

850

24

10

Yes

Tape

and Reel

20

Pin

300 Mu DIP

20

Pin

210

20

Pin

210 Mu SSOP

Tape

Miii

SSOP

and Reel

20

Pin

300 Mu SOlO

20

Pin

300

Tape
28

Pin

28

Pin

28

Pin

Tape
28

Pin

28

Pin

Tape
32

Pin

5.1

CY

24PV1

and

Miii

SOlO
24S1T

Reel

300 Mu

DIP

210 Mu SSOP
210 Mu SSOP
and Reel

300 Mu SOlO
300

Mu

SOlO

and Reel

5x5

mm MLF

CY8C24423-24LF1

Code

Ordering

Definitions

24 xxx-SPxx
Package

Thermal

Type

PDIP
SOlO

PV

Industrial

SSOP

Extended

MLF
TQFP

LF

Speed
Part

MHz

24

Number

Family

Code

Marketing

HIGHLY

CONFIDENTIAL

Code

Company

ID

Document

2004

ATTORNEYS

CMOS

Code

Technology

June

Rating

Commercial

CY

No

Cypress

MicroSystems

Cypress

38-12011

Rev

41

EYES ONLY

CONFIDENTIAL

ATTORNEYS

EYES ONLY

APCYOO1 25566
APELOO1 3341

5/i

5/

5/

CyPRESs

To

obtain

the

about

information

section

Cypress

Started

Getttng

titled

page

and

sales

technical

reference

support

the

information

following

or

go

to

document

this

in

PS0C

or

Microsystems

on

Cypress MicroSystems
2700

SW

Street

162nd

Building

WA

Lynnwood

98037

Phone

800.669.0557

Facsimile

425.7874641

Web

Company

Sites

Information

http//www.cypress.ccm

Sales
Technical

Revision

6.1

Table

CY8C24x23

6-1

Document

Number

Document

Data

comiaboulus/sa

Sheet

Revision

CY8C24223

History

CY8C24423 PSoC

and

Issue Date

of

Origin

127043

05

2003

Ne

l2

08

32003

Mixed

Signal

MW

09 26 2003

130123

and

NWJ

ard

204

document

Au

docui.iei

reliminar1

Chaiirjrs

NWJ

Reaised

2003

NWJ

hariges

223

NWJ

2003

the

10

229413

ECN

See

data

tiara

ExternaliP

IL

registered

Inc

for

trademarks

information

embodied
use as

contained

critical

against

applications

All

components

unless

all

in

is

Elcctricnl

net

cr

prod

vj

protctcietaili

Dala

Register

Is

an

chanter

chapter

Pevision

Miscellaeeos

section

chenges

l2C

Ic

GD1

RDI

chapters
cid

icatiors

Spoci

miscollancous

smoll

throuerhont

ciangon

lhc

foniat

and

Mania

sheet

efeience

for

Reference

olcianizatica
ajcitonvl

information

P5cC

the

Mieii

Signal

Tech-

.4ray

charge

Title

None

charges
pursuant

CONFIDENTIAL

are

of the

property

Programmable

respective

to
without
notice
change
or
product Nor does
convey
it

life

support

systems where
systems

Cypress MicroSystems
to

PSoC

reserved

an express

written

imply

malfunction

application

products

are

agreement

wth

trademarks

of

Inc

Cypress MicroSystems

All

trademarks

other

failure

that

the

warranted

assumes
patent

no

or other

may reasonably
manufacturer assumes

nor

responsibility
rights

be expected

intended

to

be

all

used

risk

for

for the

use

of

Cypress MicroSystems
to result
of

such

in

significant

use and

medical

life-support

38-12011

in

any circuitiy
does not

injury to the
doing

so

other

indemnifies

Rev

life-saving

than

authorize
user

critical

The

its

circuitry
products

inclusion

of

Cypress Micro
control

or

safety

Cypress MicroSystems

Cypress MicroSystems

ATTORNEYS

or

implies
not

are

System-on-ChipM

corporations

Cypress MicroSystems
under
any license

subject

life-support
in

products

rights

herein

herein

June 2004

HIGHLY

2004

referenced

Cypress MicroSystems

in

Cypress Microsystems
Systems

Posting

srrtion

Specificaticns
Clock

303

Copyrights

Cypress MicroSystems

The

hr

Sheet

change

age

secton

Icr Silicon

Digital

tic

sheul

Neu

SF\j

10

Sheet

Data

System

Elertrcal
di

Data

prcifications

Anlla9

document

Chaitqco
tila

anced

Eleticel

to
in

egistcrs
131302

of

Description

Nm

NWJ

2033

10

131673

or

Sheet

Nerj

Silic3n

nhcncje

6.2

Data

Final

Array

Change

NuJ

779

i297S

Distribution

cfm

ocatlons

es

com/suprortlogincfm

38-12011

ECN

Revision

cypress

http//xNcypress

History

CY8C24123

Title

/fw

http

Support

Inc

2004

Document

No

EYES ONLY

CONFIDENTIAL

-ATTORNEYS EYES ONLY

42

APCYOO1 25567
APELOO1 3342