Apple Inc. v. Samsung Electronics Co. Ltd. et al
Filing
925
Administrative Motion to File Under Seal Apple's Motion for Summary Judgment of NonInfringement of U.S. Patent Number 7,362,867 and Invalidity of U.S. Patent Numbers 7,456,893 and 7,577,460 filed by Apple Inc.(a California corporation). (Attachments: #1 Declaration of Erica Tierney in Support of Apple's Administrative Motion to File Documents Under Seal, #2 Declaration of Mark D. Selwyn in Support of Apple's Administrative Motion to File Documents Under Seal, #3 Proposed Order Granting Apple Inc.'s Administrative Motion to File Documents Under Seal, #4 Plaintiff and CounterclaimDefendant Apple Inc.'s Notice of Motion and Motion for Summary Judgment of NonInfringement of U.S. Patent Number 7,362,867 and Invalidity of U.S. Patent Numbers 7,456,893 and 7,577,460, #5 Declaration of Mark D. Selwyn in Support of Apple's Motion for Summary Judgment of NonInfringement of U.S. Patent Number 7,362,867 and Invalidity of U.S. Patent Numbers 7,456,893 and 7,577,460, #6 Exhibit 1, #7 Exhibit 2, #8 Exhibit 3, #9 Exhibit 4, #10 Exhibit 5, #11 Exhibit 6, #12 Exhibit 7, #13 Exhibit 8, #14 Exhibit 9, #15 Exhibit 10, #16 Exhibit 11, #17 Exhibit 12, #18 Exhibit 13, #19 Exhibit 14, #20 Exhibit 15, #21 Exhibit 16, #22 Exhibit 17, #23 Exhibit 18, #24 Exhibit 19, #25 Exhibit 20, #26 Exhibit 21, #27 Exhibit 22, #28 Exhibit 23, #29 Exhibit 24, #30 Exhibit 25, #31 Exhibit 26, #32 [Proposed] Order Granting Apple Inc.'s Motion for Partial Summary Judgment)(Selwyn, Mark) (Filed on 5/17/2012) Modified on 5/21/2012 attachment #1 and 2 sealed pursuant to General Order No. 62 (dhm, COURT STAFF).
EXHIBIT 6
3GPP TS 25.213 V6.0.0 (200312)
Technical Specification
3rd Generation Partnership Project;
Technical Specification Group Radio Access Network;
Spreading and modulation (FDD)
(Release 6)
The present document has been developed within the 3rd Generation Partnership Project (3GPP TM) and may be further elaborated for the purposes of 3GPP.
The present document has not been subject to any approval process by the 3GPP Organisational Partners and shall not be implemented.
This Specification is provided for future development work within 3GPP only. The Organisational Partners accept no liability for any use of this Specification.
Specifications and reports for implementation of the 3GPP TM system should be obtained via the 3GPP Organisational Partners' Publications Offices.
Release 6
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3GPP TS 25.213 V6.0.0 (200312)
Keywords
UMTS, radio, modulation, layer 1
3GPP
Postal address
3GPP support office address
650 Route des Lucioles  Sophia Antipolis
Valbonne  FRANCE
Tel.: +33 4 92 94 42 00 Fax: +33 4 93 65 47 16
Internet
http://www.3gpp.org
Copyright Notification
No part may be reproduced except as authorized by written permission.
The copyright and the foregoing restriction extend to reproduction in all media.
© 2004, 3GPP Organizational Partners (ARIB, CCSA, ETSI, T1, TTA, TTC).
All rights reserved.
3GPP
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Contents
Foreword ............................................................................................................................................................ 5
1
Scope ........................................................................................................................................................ 6
2
References ................................................................................................................................................ 6
3
Symbols and abbreviations....................................................................................................................... 6
3.1
3.2
Symbols ................................................................................................................................................................... 6
Abbreviations .......................................................................................................................................................... 7
4
Uplink spreading and modulation ............................................................................................................ 7
4.1
Overview ................................................................................................................................................................. 7
4.2
Spreading ................................................................................................................................................................. 7
4.2.1
DPCCH/DPDCH/HSDPCCH ........................................................................................................................... 7
4.2.2
PRACH .............................................................................................................................................................. 9
4.2.2.1
PRACH preamble part ....................................................................................................................................... 9
4.2.2.2
PRACH message part ........................................................................................................................................ 9
4.2.3
PCPCH............................................................................................................................................................. 10
4.2.3.1
PCPCH preamble part ...................................................................................................................................... 10
4.2.3.2
PCPCH message part ....................................................................................................................................... 10
4.3
Code generation and allocation ............................................................................................................................. 11
4.3.1
Channelisation codes ....................................................................................................................................... 11
4.3.1.1
Code definition ................................................................................................................................................ 11
4.3.1.2
Code allocation for DPCCH/DPDCH/HSDPCCH ......................................................................................... 12
4.3.1.3
Code allocation for PRACH message part ....................................................................................................... 12
4.3.1.4
Code allocation for PCPCH message part ....................................................................................................... 12
4.3.1.5
Channelisation code for PCPCH power control preamble ............................................................................ 12
4.3.2
Scrambling codes ............................................................................................................................................. 12
4.3.2.1
General............................................................................................................................................................. 12
4.3.2.2
Long scrambling sequence............................................................................................................................... 13
4.3.2.3
Short scrambling sequence .............................................................................................................................. 14
4.3.2.4
DPCCH/DPDCH/HSDPCCH scrambling code.............................................................................................. 15
4.3.2.5
PRACH message part scrambling code ........................................................................................................... 15
4.3.2.6
PCPCH message part scrambling code ............................................................................................................ 16
4.3.2.7
PCPCH power control preamble scrambling code........................................................................................... 16
4.3.3
PRACH preamble codes .................................................................................................................................. 16
4.3.3.1
Preamble code construction ............................................................................................................................. 16
4.3.3.2
Preamble scrambling code ............................................................................................................................... 16
4.3.3.3
Preamble signature........................................................................................................................................... 17
4.3.4
PCPCH preamble codes ................................................................................................................................... 17
4.3.4.1
Access preamble .............................................................................................................................................. 17
4.3.4.1.1
Access preamble code construction ........................................................................................................... 17
4.3.4.1.2
Access preamble scrambling code ............................................................................................................. 17
4.3.4.1.3
Access preamble signature ......................................................................................................................... 18
4.3.4.2
CD preamble .................................................................................................................................................... 18
4.3.4.2.1
CD preamble code construction ................................................................................................................. 18
4.3.4.2.2
CD preamble scrambling code ................................................................................................................... 18
4.3.4.2.3
CD preamble signature ............................................................................................................................... 18
4.4
Modulation ............................................................................................................................................................ 19
4.4.1
Modulating chip rate ........................................................................................................................................ 19
4.4.2
Modulation ....................................................................................................................................................... 19
5
Downlink spreading and modulation ..................................................................................................... 19
5.1
Spreading ............................................................................................................................................................... 19
5.2
Code generation and allocation ............................................................................................................................. 21
5.2.1
Channelisation codes ....................................................................................................................................... 21
5.2.2
Scrambling code .............................................................................................................................................. 22
5.2.3
Synchronisation codes ..................................................................................................................................... 23
5.2.3.1
Code generation ............................................................................................................................................... 23
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5.2.3.2
Code allocation of SSC .................................................................................................................................... 24
5.3
Modulation ............................................................................................................................................................ 26
5.3.1
Modulating chip rate ........................................................................................................................................ 26
5.3.2
Modulation ....................................................................................................................................................... 26
Annex A (informative):
A.1
Generalised Hierarchical Golay Sequences ................................................. 27
Alternative generation ............................................................................................................................ 27
Annex B (informative):
Change history ............................................................................................... 28
3GPP
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Foreword
This Technical Specification (TS) has been produced by the 3rd Generation Partnership Project (3GPP).
The contents of the present document are subject to continuing work within the TSG and may change following formal
TSG approval. Should the TSG modify the contents of the present document, it will be rereleased by the TSG with an
identifying change of release date and an increase in version number as follows:
Version x.y.z
where:
x the first digit:
1 presented to TSG for information;
2 presented to TSG for approval;
3 or greater indicates TSG approved document under change control.
y the second digit is incremented for all changes of substance, i.e. technical enhancements, corrections,
updates, etc.
z the third digit is incremented when editorial only changes have been incorporated in the document.
3GPP
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3GPP TS 25.213 V6.0.0 (200312)
Scope
The present document describes spreading and modulation for UTRA Physical Layer FDD mode.
2
References
The following documents contain provisions which, through reference in this text, constitute provisions of the present
document.
• References are either specific (identified by date of publication, edition number, version number, etc.) or
nonspecific.
• For a specific reference, subsequent revisions do not apply.
• For a nonspecific reference, the latest version applies. In the case of a reference to a 3GPP document
(including a GSM document), a nonspecific reference implicitly refers to the latest version of that document in
the same Release as the present document.
[1]
3GPP TS 25.201: "Physical layer  general description".
[2]
3GPP TS 25.211: "Physical channels and mapping of transport channels onto physical channels
(FDD)."
[3]
3GPP TS 25.101: "UE Radio transmission and Reception (FDD)".
[4]
3GPP TS 25.104: "UTRA (BS) FDD; Radio transmission and Reception".
[5]
3GPP TS 25.308: "UTRA High Speed Downlink Packet Access (HSDPA); Overall description".
[6]
3GPP TS 25.214: "Physical layer procedures (FDD)".
3
Symbols and abbreviations
3.1
Symbols
For the purposes of the present document, the following symbols apply:
Cch,SF,n:
Cpre,n,s:
Ccacc,n,s:
Cccd,n,s:
Csig,s:
Sdpch,n:
Srpre,n:
Srmsg,n:
Scacc:
Sccd:
Scmsg,n:
Sdl,n:
Cpsc:
Cssc,n:
n:th channelisation code with spreading factor SF
PRACH preamble code for n:th preamble scrambling code and signature s
PCPCH access preamble code for n:th preamble scrambling code and signature s
PCPCH CD preamble code for n:th preamble scrambling code and signature s
PRACH/PCPCH signature code for signature s
n:th DPCCH/DPDCH uplink scrambling code
n:th PRACH preamble scrambling code
n:th PRACH message scrambling code
n:th PCPCH access preamble scrambling code
n:th PCPCH CD preamble scrambling code
n:th PCPCH message scrambling code
DL scrambling code
PSC code
n:th SSC code
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Abbreviations
For the purposes of the present document, the following abbreviations apply:
16QAM
AICH
AP
BCH
CCPCH
CD
CPCH
CPICH
DCH
DPCH
DPCCH
DPDCH
FDD
HSDPCCH
HSDSCH
HSPDSCH
HSSCCH
Mcps
OVSF
PDSCH
PICH
PRACH
PSC
RACH
SCH
SSC
SF
UE
16 Quadrature Amplitude Modulation
Acquisition Indicator Channel
Access Preamble
Broadcast Control Channel
Common Control Physical Channel
Collision Detection
Common Packet Channel
Common Pilot Channel
Dedicated Channel
Dedicated Physical Channel
Dedicated Physical Control Channel
Dedicated Physical Data Channel
Frequency Division Duplex
Dedicated Physical Control Channel (uplink) for HSDSCH
High Speed Downlink Shared Channel
High Speed Physical Downlink Shared Channel
Shared Control Physical Channel for HSDSCH
Mega Chip Per Second
Orthogonal Variable Spreading Factor (codes)
Physical Dedicated Shared Channel
Page Indication Channel
Physical Random Access Channel
Primary Synchronisation Code
Random Access Channel
Synchronisation Channel
Secondary Synchronisation Code
Spreading Factor
User Equipment
4
Uplink spreading and modulation
4.1
Overview
Spreading is applied to the physical channels. It consists of two operations. The first is the channelisation operation,
which transforms every data symbol into a number of chips, thus increasing the bandwidth of the signal. The number of
chips per data symbol is called the Spreading Factor (SF). The second operation is the scrambling operation, where a
scrambling code is applied to the spread signal.
With the channelisation, data symbols on socalled I and Qbranches are independently multiplied with an OVSF code.
With the scrambling operation, the resultant signals on the I and Qbranches are further multiplied by complexvalued
scrambling code, where I and Q denote real and imaginary parts, respectively.
4.2
Spreading
4.2.1
DPCCH/DPDCH/HSDPCCH
Figure 1 illustrates the principle of the uplink spreading of DPCCH, DPDCHs and HSDPCCH. The binary DPCCH,
DPDCHs and HSDPCCH to be spread are represented by realvalued sequences, i.e. the binary value "0" is mapped to
the real value +1, the binary value "1" is mapped to the real value –1, and the value "DTX" (HSDPCCH only) is
mapped to the real value 0. The DPCCH is spread to the chip rate by the channelisation code cc. The n:th DPDCH
called DPDCHn is spread to the chip rate by the channelisation code cd,n. The HSDPCCH is spread to the chip rate by
the channelisation code chs. One DPCCH, up to six parallel DPDCHs, and one HSDPCCH can be transmitted
simultaneously, i.e. 1 ≤ n ≤ 6.
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cd,1
βd
cd,3
3GPP TS 25.213 V6.0.0 (200312)
βd
DPDCH1
Σ
DPDCH3
cd,5
I
βd
DPDCH5
Sdpch,n
chs
I+jQ
β hs
HSDPCCH
S
(If Nmaxdpdch mod 2 = 0)
cd,2
βd
cd,4
βd
cd,6
βd
cc
βc
chs
βhs
DPDCH2
DPDCH4
DPDCH6
Σ
Q
j
DPCCH
HSDPCCH
(If Nmaxdpdch mod 2 = 1)
Figure 1: Spreading for uplink DPCCH, DPDCHs and HSDPCCH
After channelisation, the realvalued spread signals are weighted by gain factors, βc for DPCCH, βd for all DPDCHs
and βhs for HSDPCCH (if one is active).
The βc and βd values are signalled by higher layers or calculated as described in [6] 5.1.2.5. At every instant in time, at
least one of the values βc and βd has the amplitude 1.0. The βc and βd values are quantized into 4 bit words. The
quantization steps are given in table 1.
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Table 1: The quantization of the gain parameters
Signalling values for
βc and βd
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Quantized amplitude ratios
βc and βd
1.0
14/15
13/15
12/15
11/15
10/15
9/15
8/15
7/15
6/15
5/15
4/15
3/15
2/15
1/15
Switch off
The βhs value is derived from the power offset ΔACK , ΔΝACK and ΔCQI, which are signalled by higher layers as described
in [6] 5.1.2.5A.
The relative power offsets Δ ACK, ΔΝACK and ΔCQI are quantized into amplitude ratios as shown in Table 1A.
Table 1A: The quantization of the power offset
Signalling values for
Δ ACK, ΔΝACK and ΔCQI
Quantized amplitude ratios for
10
8
7
6
5
4
3
2
1
0
⎛ Δ HS − DPCCH ⎞
⎜
⎟
20
⎠
⎝
30/15
24/15
19/15
15/15
12/15
9/15
8/15
6/15
5/15
After the weighting, the stream of realvalued chips on the I and Qbranches are then summed and treated as a
complexvalued stream of chips. This complexvalued signal is then scrambled by the complexvalued scrambling code
Sdpch,n. The scrambling code is applied aligned with the radio frames, i.e. the first scrambling chip corresponds to the
beginning of a radio frame. HSDPCCH is mapped to the I branch in case that the maximum number of DPDCH over
all the TFCs in the TFCS (defined as Nmaxdpdch) is even, and mapped to the Q branch otherwise. The I/Q mapping of
HSDPCCH is not changed due to framebyframe TFCI change or temporary TFC restrictions.
4.2.2
4.2.2.1
PRACH
PRACH preamble part
The PRACH preamble part consists of a complexvalued code, described in section 4.3.3.
4.2.2.2
PRACH message part
Figure 2 illustrates the principle of the spreading and scrambling of the PRACH message part, consisting of data and
control parts. The binary control and data parts to be spread are represented by realvalued sequences, i.e. the binary
value "0" is mapped to the real value +1, while the binary value "1" is mapped to the real value –1. The control part is
spread to the chip rate by the channelisation code cc, while the data part is spread to the chip rate by the channelisation
code cd.
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3GPP TS 25.213 V6.0.0 (200312)
βd
Srmsg,n
PRACH message
data part
I
PRACH message
control part
Q
I+jQ
cc
βc
S
j
Figure 2: Spreading of PRACH message part
After channelisation, the realvalued spread signals are weighted by gain factors, βc for the control part and βd for the
data part. At every instant in time, at least one of the values βc and βd has the amplitude 1.0. The βvalues are quantized
into 4 bit words. The quantization steps are given in section 4.2.1.
After the weighting, the stream of realvalued chips on the I and Qbranches are treated as a complexvalued stream of
chips. This complexvalued signal is then scrambled by the complexvalued scrambling code Srmsg,n. The 10 ms
scrambling code is applied aligned with the 10 ms message part radio frames, i.e. the first scrambling chip corresponds
to the beginning of a message part radio frame.
4.2.3
4.2.3.1
PCPCH
PCPCH preamble part
The PCPCH preamble part consists of a complexvalued code, described in section 4.3.4.
4.2.3.2
PCPCH message part
Figure 3 illustrates the principle of the spreading of the PCPCH message part, consisting of data and control parts. The
binary control and data parts to be spread are represented by realvalued sequences, i.e. the binary value "0" is mapped
to the real value +1, while the binary value "1" is mapped to the real value –1. The control part is spread to the chip rate
by the channelisation code cc, while the data part is spread to the chip rate by the channelisation code cd.
cd
βd
Scmsg,n
PCPCH message
data part
I
PCPCH message
control part
Q
I+jQ
cc
βc
S
j
Figure 3: Spreading of PCPCH message part
After channelisation, the realvalued spread signals are weighted by gain factors, βc for the control part and βd for the
data part. At every instant in time, at least one of the values βc and βd has the amplitude 1.0. The βvalues are quantized
into 4 bit words. The quantization steps are given in section 4.2.1.
After the weighting, the stream of realvalued chips on the I and Qbranches are treated as a complexvalued stream of
chips. This complexvalued signal is then scrambled by the complexvalued scrambling code Scmsg,n. The 10 ms
scrambling code is applied aligned with the 10 ms message part radio frames, i.e. the first scrambling chip corresponds
to the beginning of a message part radio frame.
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4.3
Code generation and allocation
4.3.1
Channelisation codes
4.3.1.1
Code definition
The channelisation codes of figure 1 are Orthogonal Variable Spreading Factor (OVSF) codes that preserve the
orthogonality between a user’s different physical channels. The OVSF codes can be defined using the code tree of
figure 4.
C ch ,4 ,0 = (1 ,1 ,1 ,1 )
C ch ,2 ,0 = (1 ,1 )
C ch ,4 ,1 = (1 ,1 ,1 ,1 )
C ch,1,0 = (1 )
C ch ,4 ,2 = (1 ,1 ,1 ,1 )
C ch ,2 ,1 = (1 ,1 )
C ch ,4 ,3 = (1 ,1 ,1 ,1 )
SF = 1
SF = 2
SF = 4
Figure 4: Codetree for generation of Orthogonal Variable Spreading Factor (OVSF) codes
In figure 4, the channelisation codes are uniquely described as Cch,SF,k, where SF is the spreading factor of the code and
k is the code number, 0 ≤ k ≤ SF1.
Each level in the code tree defines channelisation codes of length SF, corresponding to a spreading factor of SF in
figure 4.
The generation method for the channelisation code is defined as:
Cch,1,0 = 1 ,
⎡Cch, 2,0 ⎤ ⎡Cch,1,0
⎢
⎥=⎢
Cch, 2,1 ⎦ ⎣Cch,1,0
⎣
Cch,1,0 ⎤ ⎡1 1 ⎤
=
− Cch,1,0 ⎥ ⎢1 − 1⎥
⎦
⎦ ⎣
⎡ C ch , 2 ( n+1), 0 ⎤ ⎡ C ch , 2n , 0
⎢ C
⎥ ⎢C
ch , 2 ( n +1 ),1
⎢
⎥ ⎢ ch , 2n , 0
⎢ C ch , 2 ( n+1), 2 ⎥ ⎢ C ch , 2n ,1
⎢
⎥ ⎢
⎢ C ch , 2 ( n+1), 3 ⎥ = ⎢ C ch , 2n ,1
⎢
⎥ ⎢ :
:
⎢
⎥ ⎢
⎢C ch , 2 ( n+1), 2 ( n+1)−2 ⎥ ⎢C ch , 2n , 2n −1
⎢ C ( n+1) ( n+1) ⎥ ⎢C n n
⎣ ch , 2 , 2 −1 ⎦ ⎣ ch , 2 , 2 −1
C ch , 2n , 0 ⎤
− C ch , 2n , 0 ⎥
⎥
C ch , 2n ,1 ⎥
⎥
− C ch , 2n ,1 ⎥
⎥
:
⎥
C ch , 2n , 2n −1 ⎥
− C ch , 2n , 2n −1 ⎥
⎦
The leftmost value in each channelisation code word corresponds to the chip transmitted first in time.
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Code allocation for DPCCH/DPDCH/HSDPCCH
For the DPCCH, DPDCHs and HSDPCCH the following applies:

The DPCCH is always spread by code cc = Cch,256,0.

The HSDPCCH is spread by code Cch written in table 1A.
Table 1A: channelization code of HSDPCCH
Nmaxdpdch (as defined in
subclause 4.2.1)
1
2,4,6
3,5
Channelization code Cch
Cch,256,64
Cch,256,1
Cch,256,32

When only one DPDCH is to be transmitted, DPDCH1 is spread by code cd,1 = Cch,SF,k where SF is the spreading
factor of DPDCH1 and k= SF / 4.

When more than one DPDCH is to be transmitted, all DPDCHs have spreading factors equal to 4. DPDCHn is
spread by the the code cd,n = Cch,4,k , where k = 1 if n ∈ {1, 2}, k = 3 if n ∈ {3, 4}, and k = 2 if n ∈ {5, 6}.
If a power control preamble is used to initialise a DCH, the channelisation code for the DPCCH during the power
control preamble shall be the same as that to be used afterwards.
4.3.1.3
Code allocation for PRACH message part
The preamble signature s, 0 ≤ s ≤ 15, points to one of the 16 nodes in the codetree that corresponds to channelisation
codes of length 16. The subtree below the specified node is used for spreading of the message part. The control part is
spread with the channelisation code cc (as shown in section 4.2.2.2) of spreading factor 256 in the lowest branch of the
subtree, i.e. cc = Cch,256,m where m = 16×s + 15. The data part uses any of the channelisation codes from spreading
factor 32 to 256 in the uppermost branch of the subtree. To be exact, the data part is spread by channelisation code
cd = Cch,SF,m and SF is the spreading factor used for the data part and m = SF×s/16.
4.3.1.4
Code allocation for PCPCH message part
For the control part and data part the following applies:

The control part is always spread by code cc=Cch,256,0.

The data part is spread by code cd=Cch,SF,k where SF is the spreading factor of the data part and k=SF/4.
The data part may use the code from spreading factor 4 to 256. A UE is allowed to increase SF during the message
transmission on a frame by frame basis.
4.3.1.5
Channelisation code for PCPCH
power control preamble
The channelisation code for the PCPCH power control preamble is the same as that used for the control part of the
message part, as described in section 4.3.1.4 above.
4.3.2
4.3.2.1
Scrambling codes
General
All uplink physical channels are subjected to scrambling with a complexvalued scrambling code. The
DPCCH/DPDCH/HSDPCCH may be scrambled by either long or short scrambling codes, defined in section 4.3.2.4.
The PRACH message part is scrambled with a long scrambling code, defined in section 4.3.2.5. Also the PCPCH
message part is scrambled with a long scrambling code, defined in section 4.3.2.6.
There are 224 long and 224 short uplink scrambling codes. Uplink scrambling codes are assigned by higher layers.
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The long scrambling code is built from constituent long sequences defined in section 4.3.2.2, while the constituent short
sequences used to build the short scrambling code are defined in section 4.3.2.3.
4.3.2.2
Long scrambling sequence
The long scrambling sequences clong,1,n and clong,2,n are constructed from position wise modulo 2 sum of 38400 chip
segments of two binary msequences generated by means of two generator polynomials of degree 25. Let x, and y be the
two msequences respectively. The x sequence is constructed using the primitive (over GF(2)) polynomial X25+X3+1.
The y sequence is constructed using the polynomial X25+X3+X2+X+1. The resulting sequences thus constitute
segments of a set of Gold sequences.
The sequence clong,2,n is a 16777232 chip shifted version of the sequence clong,1,n.
Let n23 … n0 be the 24 bit binary representation of the scrambling sequence number n with n0 being the least
significant bit. The x sequence depends on the chosen scrambling sequence number n and is denoted xn, in the sequel.
Furthermore, let xn(i) and y(i) denote the i:th symbol of the sequence xn and y, respectively.
The msequences xn and y are constructed as:
Initial conditions:

xn(0)=n0 , xn(1)= n1 ,

y(0)=y(1)= … =y(23)= y(24)=1.
… =xn(22)= n22 ,xn(23)= n23, xn(24)=1.
Recursive definition of subsequent symbols:

xn(i+25) =xn(i+3) + xn(i) modulo 2, i=0,…, 22527.

y(i+25) = y(i+3)+y(i+2) +y(i+1) +y(i)
modulo 2, i=0,…, 22527.
Define the binary Gold sequence zn by:

zn(i) = xn(i) + y(i) modulo 2,
i = 0, 1, 2, …, 2252.
The real valued Gold sequence Zn is defined by:
⎧+ 1 if z n (i ) = 0
Z n (i ) = ⎨
⎩− 1 if z n (i ) = 1
for i = 0,1, K ,2 25 − 2.
Now, the realvalued long scrambling sequences clong,1,n and clong,2,n are defined as follows:
clong,1,n(i) = Zn(i),
i = 0, 1, 2, …, 225 – 2 and
clong,2,n(i) = Zn((i + 16777232) modulo (225 – 1)),
i = 0, 1, 2, …, 225 – 2.
Finally, the complexvalued long scrambling sequence Clong, n, is defined as:
(
)
C long , n (i ) = clong ,1,n (i ) 1 + j (− 1) clong , 2,n (2 ⎣i / 2⎦)
i
where i = 0, 1, …, 225 – 2 and ⎣⎦ denotes rounding to nearest lower integer.
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clong,1,n
LSB
MSB
clong,2,n
Figure 5: Configuration of uplink scrambling sequence generator
4.3.2.3
Short scrambling sequence
The short scrambling sequences cshort,1,n(i) and cshort,2,n(i) are defined from a sequence from the family of periodically
extended S(2) codes.
Let n23n22…n0 be the 24 bit binary representation of the code number n.
The n:th quaternary S(2) sequence zn(i), 0 ≤ n ≤ 16777215, is obtained by modulo 4 addition of three sequences, a
quaternary sequence a(i) and two binary sequences b(i) and d(i), where the initial loading of the three sequences is
determined from the code number n. The sequence zn(i) of length 255 is generated according to the following relation:

zn(i) = a(i) + 2b(i) + 2d(i) modulo 4, i = 0, 1, …, 254;
where the quaternary sequence a(i) is generated recursively by the polynomial g0(x)= x8+x5+3x3+x2+2x+1 as:

a(0) = 2n0 + 1 modulo 4;

a(i) = 2ni modulo 4, i = 1, 2, …, 7;

a(i) = 3a(i3) + a(i5) + 3a(i6) + 2a(i7) + 3a(i8) modulo 4, i = 8, 9, …, 254;
and the binary sequence b(i) is generated recursively by the polynomial g1(x)= x8+x7+x5+x+1 as
b(i) = n8+i modulo 2, i = 0, 1, …, 7,
b(i) = b(i1) + b(i3) + b(i7) + b(i8) modulo 2, i = 8, 9, …, 254,
and the binary sequence d(i) is generated recursively by the polynomial g2(x)= x8+x7+x5+x4+1 as:
d(i) = n16+i modulo 2, i = 0, 1, …, 7;
d(i) = d(i1) + d(i3) + d(i4) + d(i8) modulo 2, i = 8, 9, …, 254.
The sequence zn(i) is extended to length 256 chips by setting zn(255) = zn(0).
The mapping from zn(i) to the realvalued binary sequences cshort,1,n(i) and cshort,2,n(i), , i = 0, 1, …, 255 is defined in
Table 2.
Table 2: Mapping from zn(i) to cshort,1,n(i) and cshort,2,n(i), i = 0, 1, …, 255
zn(i)
0
1
2
3
cshort,1,n(i)
+1
1
1
+1
cshort,2,n(i)
+1
+1
1
1
Finally, the complexvalued short scrambling sequence Cshort, n, is defined as:
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(
)
C short , n (i ) = c short ,1,n (i mod 256) 1 + j (− 1) c short , 2,n (2⎣(i mod 256 ) / 2⎦)
i
where i = 0, 1, 2, … and ⎣⎦ denotes rounding to nearest lower integer.
An implementation of the short scrambling sequence generator for the 255 chip sequence to be extended by one chip is
shown in Figure 6.
2
7
6
5
4
3
2
0
1
d(i)
mod 2
+
+
+
5
4
2
+
mod n addition
7
6
3
2
+
0
1
b(i)
multiplication
cshort,1,n(i)
zn(i)
Mapper
cshort,2,n(i)
mod 4
mod 2
+
+
7
6
5
+
4
3
2
1
0
a(i)
3
3
2
3
mod 4
+
+
+
+
Figure 6: Uplink short scrambling sequence generator for 255 chip sequence
4.3.2.4
DPCCH/DPDCH/HSDPCCH scrambling code
The code used for scrambling of the uplink DPCCH/DPDCH/HSDPCCH may be of either long or short type. When the
scrambling code is formed, different consituent codes are used for the long and short type as defined below.
The n:th uplink scrambling code for DPCCH/DPDCH/HSDPCCH, denoted Sdpch, n, is defined as:
Sdpch,n(i) = Clong,n(i),
i = 0, 1, …, 38399, when using long scrambling codes;
where the lowest index corresponds to the chip transmitted first in time and Clong,n is defined in section 4.3.2.2.
The n:th uplink scrambling code for DPCCH/DPDCH/HSDPCCH, denoted Sdpch, n, is defined as:
Sdpch,n(i) = Cshort,n(i),
i = 0, 1, …, 38399, when using short scrambling codes;
where the lowest index corresponds to the chip transmitted first in time and Cshort,n is defined in section 4.3.2.3.
4.3.2.5
PRACH message part scrambling code
The scrambling code used for the PRACH message part is 10 ms long, and there are 8192 different PRACH scrambling
codes defined.
The n:th PRACH message part scrambling code, denoted Srmsg,n, where n = 0, 1, …, 8191, is based on the long
scrambling sequence and is defined as:
Srmsg,n(i) = Clong,n(i + 4096), i = 0, 1, …, 38399
where the lowest index corresponds to the chip transmitted first in time and Clong,n is defined in section 4.3.2.2.
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The message part scrambling code has a onetoone correspondence to the scrambling code used for the preamble part.
For one PRACH, the same code number is used for both scrambling codes, i.e. if the PRACH preamble scrambling
code used is Srpre,m then the PRACH message part scrambling code is Srmsg,m, where the number m is the same for both
codes.
4.3.2.6
PCPCH message part scrambling code
The set of scrambling codes used for the PCPCH message part are 10 ms long, cellspecific, and each scrambling code
has a onetoone correspondence to the signature sequence and the access subchannel used by the access preamble part.
Both long or short scrambling codes can be used to scramble the CPCH message part. There are 64 uplink scrambling
codes defined per cell and 32768 different PCPCH scrambling codes defined in the system.
The n:th PCPCH message part scrambling code, denoted Scmsg,,n, where n =8192,8193, …,40959
scrambling sequence and is defined as:
is based on the
In the case when the long scrambling codes are used:
Scmsg,n(i) = Clong,n(i ),
i = 0, 1, …, 38399
where the lowest index corresponds to the chip transmitted first in time and Clong,n is defined in section 4.3.2.2.
In the case the short scrambling codes are used:
Scmsg,n(i) = Cshort,n(i),
i = 0, 1, …, 38399
The 32768 PCPCH scrambling codes are divided into 512 groups with 64 codes in each group. There is a onetoone
correspondence between the group of PCPCH preamble scrambling codes in a cell and the primary scrambling code
used in the downlink of the cell. The k:th PCPCH scrambling code within the cell with downlink primary scrambling
code m, k =16,17,…, 79 and m = 0, 1, 2, …, 511, is Scmsg, n as defined above with n = 64×m + k+8176.
4.3.2.7
PCPCH power control preamble scrambling code
The scrambling code for the PCPCH power control preamble is the same as for the PCPCH message part, as described
in section 4.3.2.6 above. The phase of the scrambling code shall be such that the end of the code is aligned with the
frame boundary at the end of the power control preamble.
4.3.3
4.3.3.1
PRACH preamble codes
Preamble code construction
The random access preamble code Cpre,n, is a complex valued sequence. It is built from a preamble scrambling code
Srpre,n and a preamble signature Csig,s as follows:

Cpre,n,s(k) = Srpre,n(k) × Csig,s(k) × e
π π
j ( + k)
4 2 ,
k = 0, 1, 2, 3, …, 4095;
where k=0 corresponds to the chip transmitted first in time and Srpre,n and Csig,s are defined in 4.3.3.2 and 4.3.3.3 below
respectively.
4.3.3.2
Preamble scrambling code
The scrambling code for the PRACH preamble part is constructed from the long scrambling sequences. There are 8192
PRACH preamble scrambling codes in total.
The n:th preamble scrambling code, n = 0, 1, …, 8191, is defined as:
Srpre,n(i) = clong,1,n(i), i = 0, 1, …, 4095;
where the sequence clong,1,n is defined in section 4.3.2.2.
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The 8192 PRACH preamble scrambling codes are divided into 512 groups with 16 codes in each group. There is a onetoone correspondence between the group of PRACH preamble scrambling codes in a cell and the primary scrambling
code used in the downlink of the cell. The k:th PRACH preamble scrambling code within the cell with downlink
primary scrambling code m, k = 0, 1, 2, …, 15 and m = 0, 1, 2, …, 511, is Srpre,n(i) as defined above with n = 16×m + k.
4.3.3.3
Preamble signature
The preamble signature corresponding to a signature s consists of 256 repetitions of a length 16 signature Ps(n),
n=0…15. This is defined as follows:

Csig,s(i) = Ps(i modulo 16), i = 0, 1, …, 4095.
The signature Ps(n) is from the set of 16 Hadamard codes of length 16. These are listed in table 3.
Table 3: Preamble signatures
Preamble
signature
P0(n)
P1(n)
P2(n)
P3(n)
P4(n)
P5(n)
P6(n)
P7(n)
P8(n)
P9(n)
P10(n)
P11(n)
P12(n)
P13(n)
P14(n)
P15(n)
4.3.4
4.3.4.1
4.3.4.1.1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Value of n
7
8
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
9
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
10
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
12
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
13
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
14
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
PCPCH preamble codes
Access preamble
Access preamble code construction
Similar to PRACH access preamble codes, the PCPCH access preamble codes Ccacc,n,s, are complex valued sequences.
The PCPCH access preamble codes are built from the preamble scrambling codes Scacc,n and a preamble signature Csig,s
as follows:
π π
j ( + k)
4 2 ,

Ccacc,n,s(k) = Scacc,n(k) × Csig,s(k) × e

where Scacc,n and Csig,s are defined in section 4.3.4.1.2 and 4.3.4.1.3 below respectively.
4.3.4.1.2
k = 0, 1, 2, 3, …, 4095;
Access preamble scrambling code
The scrambling code for the PCPCH preamble part is constructed from the long scrambling sequences. There are 40960
PCPCH access preamble scrambling codes in total.
The n:th PCPCH access preamble scrambling code, where n = 0, ..., 40959 is defined as:

Scacc,n (i) = clong,1,n(i), i = 0, 1, …, 4095;
where the sequence clong,1,n is defined in section 4.3.2.2.
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The 40960 PCPCH access preamble scrambling codes are divided into 512 groups with 80 codes in each group. There
is a onetoone correspondence between the group of PCPCH access preamble scrambling codes in a cell and the
primary scrambling code used in the downlink of the cell. The k:th PCPCH scrambling code within the cell with
downlink primary scrambling code m, for k = 0,..., 79 and m = 0, 1, 2, …, 511, is Scacc, n as defined above with n=16
×m+k for k=0,...,15 and n = 64×m + (k16)+8192 for k=16,..., 79.
The index k = 0,...,15 may only be used as a PCPCH access preamble part scrambling code if the same code is also used
for a PRACH.
The index k=16,..., 79 correspond to PCPCH access preamble scrambling codes which are not shared together with a
PRACH. This leads to 32768 PCPCH specific preamble scrambling codes divided into 512 groups with 64 elements.
4.3.4.1.3
Access preamble signature
The access preamble part of the CPCHaccess burst carries one of the sixteen different orthogonal complex signatures
identical to the ones used by the preamble part of the randomaccess burst.
4.3.4.2
4.3.4.2.1
CD preamble
CD preamble code construction
Similar to PRACH access preamble codes, the PCPCH CD preamble codes Cccd,n,s are complex valued sequences. The
PCPCH CD preamble codes are built from the preamble scrambling codes Sccd,n and a preamble signature Csig,s as
follows:

Cccd,n,s(k) = Sccd,n(k) × Csig,s(k) × e
π π
j ( + k)
4 2 ,
k = 0, 1, 2, 3, …, 4095;
where Sccd,n and Csig,s are defined in sections 4.3.4.2.2 and 4.3.4.2.3 below respectively.
4.3.4.2.2
CD preamble scrambling code
There are 40960 PCPCHCD preamble scrambling codes in total.
The n:th PCPCH CD access preamble scrambling code, where n = 0 ,..., 40959, is defined as:

Sccd,n(i) = clong,1,n(i), i = 0, 1, …, 4095;
where the sequence clong,1,n is defined in section 4.3.2.2.
The 40960 PCPCH scrambling codes are divided into 512 groups with 80 codes in each group. There is a onetoone
correspondence between the group of PCPCH CD preamble scrambling codes in a cell and the primary scrambling code
used in the downlink of the cell. The k:th PCPCH scrambling code within the cell with downlink primary scrambling
code m, k = 0,1, …, 79 and m = 0, 1, 2, …, 511, is Sccd, n as defined above with n=16×m+k for k = 0,...,15 and n = 64×m
+ (k16)+8192 for k=16,...,79.
The index k=0,...,15 may only be used as a PCPCH CD preamble part scrambling code if the same code is also used for
a PRACH.
The index k=16,..., 79 correspond to PCPCH CD preamble scrambling codes which are not shared together with a
PRACH. This leads to 32768 PCPCH specific preamble scrambling codes divided into 512 groups with 64 elements.
4.3.4.2.3
CD preamble signature
The CDpreamble part of the CPCHaccess burst carries one of sixteen different orthogonal complex signatures
identical to the ones used by the preamble part of the randomaccess burst.
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4.4
Modulation
4.4.1
3GPP TS 25.213 V6.0.0 (200312)
Modulating chip rate
The modulating chip rate is 3.84 Mcps.
4.4.2
Modulation
Modulation of the complexvalued chip sequence generated by the spreading process is shown in Figure 7 below:
cos(ωt)
Re{S}
Complexvalued
chip sequence
from spreading
operations
S
Split
real &
imag.
parts
Pulseshaping
Im{S}
Pulseshaping
sin(ωt)
Figure 7: Uplink modulation
The pulseshaping characteristics are described in [3].
5
Downlink spreading and modulation
5.1
Spreading
Figure 8 illustrates the spreading operation for the physical channel except SCH. The behaviour of the modulation
mapper is different between QPSK and 16QAM. The downlink physical channels using QPSK are PCCPCH, SCCPCH, CPICH, AICH, APAICH, CSICH, CD/CAICH, PICH, PDSCH, HSSCCH and downlink DPCH. The
downlink physical channel using either QPSK or 16 QAM is HSPDSCH. The nonspread downlink physical channels,
except SCH, AICH, APICH and CD/CAICH, consist of a sequence of 3valued digits taking the values 0, 1 and
"DTX". Note that "DTX" is only applicable to those downlink physical channels that support DTX transmission. In case
of QPSK, these digits are mapped to realvalued symbols as follows: the binary value "0" is mapped to the real value
+1, the binary value "1" is mapped to the real value –1 and "DTX" is mapped to the real value 0. For the indicator
channels using signatures (AICH, APAICH and CD/CAICH), the realvalued symbols depend on the exact
combination of the indicators to be transmitted, compare [2] sections 5.3.3.7, 5.3.3.8 and 5.3.3.9.
In case of QPSK, each pair of two consecutive realvalued symbols is first serialtoparallel converted and mapped to an
I and Q branch. The definition of the modulation mapper is such that even and odd numbered symbols are mapped to
the I and Q branch respectively. In case of QPSK, for all channels except the indicator channels using signatures,
symbol number zero is defined as the first symbol in each frame. For the indicator channels using signatures, symbol
number zero is defined as the first symbol in each access slot. The I and Q branches are then both spread to the chip rate
by the same realvalued channelisation code Cch,SF,m. The channelisation code sequence shall be aligned in time with the
symbol boundary. The sequences of realvalued chips on the I and Q branch are then treated as a single complexvalued
sequence of chips. This sequence of chips is scrambled (complex chipwise multiplication) by a complexvalued
scrambling code Sdl,n. In case of PCCPCH, the scrambling code is applied aligned with the PCCPCH frame boundary,
i.e. the first complex chip of the spread PCCPCH frame is multiplied with chip number zero of the scrambling code. In
case of other downlink channels, the scrambling code is applied aligned with the scrambling code applied to the PCCPCH. In this case, the scrambling code is thus not necessarily applied aligned with the frame boundary of the
physical channel to be scrambled.
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I
downlink physical
channel
S
→
P
Modulation
Mapper
Sdl,n
I+jQ
Cch,SF,m
S
Q
j
Figure 8: Spreading for all downlink physical channels except SCH
In case of 16QAM, a set of four consecutive binary symbols nk, nk+1, nk+2, nk+3 (with k mod 4 = 0) is serialtoparallel
converted to two consecutive binary symbols (i1= nk, i2= nk+2) on the I branch and two consecutive binary symbols (q1=
nk+1, q2= nk+3) on the Q branch and then mapped to 16QAM by the modulation mapper as defined in table 3A. The I and
Q branches are then both spread to the chip rate by the same realvalued channelisation code Cch,16,m. The channelisation
code sequence shall be aligned in time with the symbol boundary. The sequences of realvalued chips on the I and Q
branch are then treated as a single complexvalued sequence of chips. This sequence of chips from all multicodes is
summed and then scrambled (complex chipwise multiplication) by a complexvalued scrambling code Sdl,n. The
scrambling code is applied aligned with the scrambling code applied to the PCCPCH.
Table 3A: 16 QAM modulation mapping
i1q1i2q2
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
I branch
0.4472
0.4472
1.3416
1.3416
0.4472
0.4472
1.3416
1.3416
0.4472
0.4472
1.3416
1.3416
0.4472
0.4472
1.3416
1.3416
Q branch
0.4472
1.3416
0.4472
1.3416
0.4472
1.3416
0.4472
1.3416
0.4472
1.3416
0.4472
1.3416
0.4472
1.3416
0.4472
1.3416
Figure 9 illustrates how different downlink channels are combined. Each complexvalued spread channel,
corresponding to point S in Figure 8, is separately weighted by a weight factor Gi. The complexvalued PSCH and SSCH, as described in [2], section 5.3.3.5, are separately weighted by weight factors Gp and Gs. All downlink physical
channels are then combined using complex addition.
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Different downlink
Physical channels
(point S in Figures 8)
3GPP TS 25.213 V6.0.0 (200312)
G1
G2
Σ
Σ
PSCH
GP
(point T in
Figure 11)
SSCH
GS
Figure 9: Combining of downlink physical channels
5.2
Code generation and allocation
5.2.1
Channelisation codes
The channelisation codes of figure 8 are the same codes as used in the uplink, namely Orthogonal Variable Spreading
Factor (OVSF) codes that preserve the orthogonality between downlink channels of different rates and spreading
factors. The OVSF codes are defined in figure 4 in section 4.3.1.
The channelisation code for the Primary CPICH is fixed to Cch,256,0 and the channelisation code for the Primary CCPCH
is fixed to Cch,256,1.The channelisation codes for all other physical channels are assigned by UTRAN.
With the spreading factor 512 a specific restriction is applied. When the code word Cch,512,n, with n=0,2,4….510, is used
in soft handover, then the code word Cch,512,n+1 is not allocated in the cells where timing adjustment is to be used.
Respectively if Cch,512,n, with n=1,3,5….511 is used, then the code word Cch,512,n1 is not allocated in the cells where
timing adjustment is to be used. This restriction shall not apply in cases where timing adjustments in soft handover are
not used with spreading factor 512.
When compressed mode is implemented by reducing the spreading factor by 2, the OVSF code used for compressed
frames is:

Cch,SF/2,⎣n/2⎦ if ordinary scrambling code is used.

Cch,SF/2,n mod SF/2 if alternative scrambling code is used (see section 5.2.2);
where Cch,SF,n is the channelisation code used for noncompressed frames.
In case the OVSF code on the PDSCH varies from frame to frame, the OVSF codes shall be allocated in such a way that
the OVSF code(s) below the smallest spreading factor will be from the branch of the code tree pointed by the code with
smallest spreading factor used for the connection which is called PDSCH root channelisation code. This means that all
the codes for this UE for the PDSCH connection can be generated according to the OVSF code generation principle
from the PDSCH root channelisation code i.e. the code with smallest spreading factor used by the UE on PDSCH.
In case of mapping the DSCH to multiple parallel PDSCHs, the same rule applies, but all of the branches identified by
the multiple codes, corresponding to the smallest spreading factor, may be used for higher spreading factor allocation
i.e. the multiple codes with smallest spreading factor can be considered as PDSCH root channelisation codes.
For HSPDSCH, the spreading factor is always 16.
For HSSCCH, the spreading factor is always 128.
Channelisationcodeset information over HSSCCH is mapped in following manner: the OVSF codes shall be allocated
in such a way that they are positioned in sequence in the code tree. That is, for P multicodes at offset O the following
codes are allocated:
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3GPP TS 25.213 V6.0.0 (200312)
Cch,16,O … Cch,16, O+P1
The number of multicodes and the corresponding offset for HSPDSCHs mapped from a given HSDSCH is signalled
by HSSCCH.
5.2.2
Scrambling code
A total of 2181 = 262,143 scrambling codes, numbered 0…262,142 can be generated. However not all the scrambling
codes are used. The scrambling codes are divided into 512 sets each of a primary scrambling code and 15 secondary
scrambling codes.
The primary scrambling codes consist of scrambling codes n=16*i where i=0…511. The i:th set of secondary
scrambling codes consists of scrambling codes 16*i+k, where k=1…15.
There is a onetoone mapping between each primary scrambling code and 15 secondary scrambling codes in a set such
that i:th primary scrambling code corresponds to i:th set of secondary scrambling codes.
Hence, according to the above, scrambling codes k = 0, 1, …, 8191 are used. Each of these codes are associated with a
left alternative scrambling code and a right alternative scrambling code, that may be used for compressed frames. The
left alternative scrambling code corresponding to scrambling code k is scrambling code number k + 8192, while the
right alternative scrambling code corresponding to scrambling code k is scrambling code number k + 16384. The
alternative scrambling codes can be used for compressed frames. In this case, the left alternative scrambling code is
used if n = <1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1>
The PSC is generated by repeating the sequence a modulated by a Golay complementary sequence, and creating a
complexvalued sequence with identical real and imaginary components. The PSC Cpsc is defined as:

Cpsc = (1 + j) × ;
where the leftmost chip in the sequence corresponds to the chip transmitted first in time.
3GPP
Release 6
24
3GPP TS 25.213 V6.0.0 (200312)
The 16 secondary synchronization codes (SSCs), {Cssc,1,…,C ssc,16}, are complexvalued with identical real and
imaginary components, and are constructed from position wise multiplicationof a Hadamard sequence and a sequence z,
defined as:

z = , where

b = and x1, x2 , …, x15, x16, are same as in the
definition of the sequence a above.
The Hadamard sequences are obtained as the rows in a matrix H8 constructed recursively by:
H 0 = (1)
H k −1 ⎞
⎛H
⎟, k ≥ 1
H k = ⎜ k −1
⎜H
⎟
⎝ k −1 − H k −1 ⎠
The rows are numbered from the top starting with row 0 (the all ones sequence).
Denote the n:th Hadamard sequence as a row of H8 numbered from the top, n = 0, 1, 2, …, 255, in the sequel.
Furthermore, let hn(i) and z(i) denote the i:th symbol of the sequence hn and z, respectively where i = 0, 1, 2, …, 255
and i = 0 corresponds to the leftmost symbol.
The k:th SSC, Cssc,k, k = 1, 2, 3, …, 16 is then defined as:

Cssc,k = (1 + j) × ;
where m = 16×(k – 1) and the leftmost chip in the sequence corresponds to the chip transmitted first in time.
5.2.3.2
Code allocation of SSC
The 64 secondary SCH sequences are constructed such that their cyclicshifts are unique, i.e., a nonzero cyclic shift
less than 15 of any of the 64 sequences is not equivalent to some cyclic shift of any other of the 64 sequences. Also, a
nonzero cyclic shift less than 15 of any of the sequences is not equivalent to itself with any other cyclic shift less than
15. Table 4 describes the sequences of SSCs used to encode the 64 different scrambling code groups. The entries in
table 4 denote what SSC to use in the different slots for the different scrambling code groups, e.g. the entry "7" means
that SSC Cssc,7 shall be used for the corresponding scrambling code group and slot.
3GPP
Release 6
25
3GPP TS 25.213 V6.0.0 (200312)
Table 4: Allocation of SSCs for secondary SCH
Scrambling
Code Group
Group 0
Group 1
Group 2
Group 3
Group 4
Group 5
Group 6
Group 7
Group 8
Group 9
Group 10
Group 11
Group 12
Group 13
Group 14
Group 15
Group 16
Group 17
Group 18
Group 19
Group 20
Group 21
Group 22
Group 23
Group 24
Group 25
Group 26
Group 27
Group 28
Group 29
Group 30
Group 31
Group 32
Group 33
Group 34
Group 35
Group 36
Group 37
Group 38
Group 39
Group 40
Group 41
Group 42
Group 43
Group 44
Group 45
Group 46
Group 47
Group 48
Group 49
#0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
3
3
3
3
3
3
3
3
3
3
3
#1
1
1
2
2
2
3
4
5
6
6
7
7
8
8
9
9
10
11
12
12
15
16
2
2
3
3
4
4
5
5
6
6
7
7
8
9
10
11
16
3
3
4
4
4
5
6
7
7
8
8
#2
2
5
1
3
16
4
11
6
10
13
8
10
12
14
2
15
9
14
12
15
4
3
5
12
6
8
7
13
9
11
2
9
12
14
5
13
3
15
4
4
6
5
9
16
12
4
8
16
7
15
#3
8
16
15
1
6
7
3
6
10
2
5
9
9
10
15
6
11
4
13
5
3
12
10
3
16
2
9
12
9
7
13
7
15
16
12
4
2
3
5
6
5
14
16
10
11
10
8
11
15
4
#4
9
7
5
8
6
4
4
14
4
14
7
16
9
14
15
16
15
13
14
4
7
11
16
15
12
9
5
12
3
2
3
7
2
5
5
2
13
11
16
11
16
4
10
5
14
6
16
4
4
16
#5
10
3
5
6
11
1
10
9
11
2
2
7
4
1
16
2
7
2
7
14
6
9
11
5
16
15
4
7
12
11
3
16
12
9
2
13
16
6
14
12
9
6
4
10
5
5
11
15
8
4
slot number
#6 #7 #8
15
8
10
14 16
3
12 16
6
5
2
5
15
5
12
5
5
3
9
2
11
10
2
13
7
13 16
6
5
5
4
3
8
9
15
1
13 16
5
15 15
8
10
7
8
13 14 10
6
4
16
9
10 12
2
8
14
3
16
7
10 13 12
13
5
8
3
10 11
8
3
5
3
13 13
14
3
14
9
11
2
15 10
5
8
14 15
9
4
16
12
9
7
13
3
12
4
10 13
2
9
16
14 14
8
8
11
6
8
10
8
14 10 15
7
11
4
13
6
12
15
5
9
12 13
5
16 15
3
4
9
9
11 13
3
9
15
4
12
4
15
3
15 11
15 12
3
8
7
7
3GPP
#9
16
10
11
8
1
6
2
9
11
13
3
8
1
5
1
11
5
16
2
8
5
2
8
14
6
9
14
2
12
7
16
2
15
11
15
4
13
10
11
14
10
13
5
16
6
15
11
12
16
15
#10 #11 #12 #13 #14
2
7
15
7
16
5
12 14 12 10
2
16 11 15 12
4
4
6
3
7
15 12 16 11
2
2
8
7
6
8
10 12 12
9
3
2
5
14
1
13
13
6
4
1
16
10
9
1
14 10
2
6
6
4
5
16
8
15
2
2
13
5
12
4
8
11
4
10
5
4
10
8
2
16
9
7
4
5
12
3
2
12 13
3
14
8
5
3
15
6
1
13 11
8
11
6
2
10 11 13
14 16
8
2
11
14
7
4
10 15
5
13
3
13
8
12
9
8
9
14
7
9
2
12
7
5
5
15
8
12
5
14 11 16 16
15
5
13
7
4
14
5
3
2
15
16
9
14 14
4
6
9
16 13 12
13 12
9
16
6
13
4
5
5
10
11
5
7
4
14
3
9
12 15
9
6
8
15 15 11
11 11 16
3
5
6
7
7
14
3
14
9
9
7
5
4
5
13
5
14
6
4
15
4
10
6
11 11 12 14
10
5
15
6
6
15
6
3
5
15
14
6
13
4
4
5
16 16
9
10
4
7
16
3
15
12
4
7
8
16
4
16 12 11 11
12 11
3
16 12
Release 6
26
Scrambling
Code Group
Group 50
Group 51
Group 52
Group 53
Group 54
Group 55
Group 56
Group 57
Group 58
Group 59
Group 60
Group 61
Group 62
Group 63
#0
3
3
3
5
5
5
5
5
5
5
5
9
9
9
#1
10
13
14
5
6
6
7
9
10
10
13
10
11
12
#2
10
11
7
8
11
13
9
6
10
12
15
13
12
10
#3
15
5
9
14
7
8
10
8
12
6
15
10
15
15
5.3
#5
5
12
10
13
8
5
11
9
11
12
8
15
9
14
slot number
#6 #7 #8
4
6
16
4
11
6
13
8
7
6
14 13
5
8
7
7
7
6
6
12
9
8
12
5
9
7
8
8
9
7
6
7
16
15
9
16
13 13 11
9
14 15
#9
4
6
8
7
12
16
12
11
9
6
8
12
14
11
#10 #11 #12 #13 #14
3
15
9
6
9
5
3
14 13 12
10
4
4
13
9
8
15
6
15
7
12 10
6
9
11
14 15
8
16 15
11
8
8
6
10
10 11 12
7
7
5
12
6
7
6
7
8
11 11
9
7
13 14
5
16
14 13 16 14 11
10 16 15 14 16
11 13 12 16 10
Modulation
5.3.1
#4
16
4
14
16
10
13
7
10
8
5
14
11
12
13
3GPP TS 25.213 V6.0.0 (200312)
Modulating chip rate
The modulating chip rate is 3.84 Mcps.
5.3.2
Modulation
Modulation of the complexvalued chip sequence generated by the spreading process is shown in Figure 11 below.
cos(ωt)
Re{T}
Complexvalued
chip sequence
from summing
operations
T
Split
real &
imag.
parts
Pulseshaping
Im{T}
Pulseshaping
sin(ωt)
Figure 11: Downlink modulation
The pulseshaping characteristics are described in [4].
3GPP
Release 6
27
3GPP TS 25.213 V6.0.0 (200312)
Annex A (informative):
Generalised Hierarchical Golay Sequences
A.1
Alternative generation
The generalised hierarchical Golay sequences for the PSC described in 5.2.3.1 may be also viewed as generated (in real
valued representation) by the following methods:
Method 1.
The sequence y is constructed from two constituent sequences x1 and x2 of length n1 and n2 respectively using the
following formula:

y(i) = x2(i mod n2) * x1(i div n2), i = 0 ... (n1* n2)  1.
The constituent sequences x1 and x2 are chosen to be the following length 16 (i.e. n1 = n2 =16) sequences:

x1 is defined to be the length 16 (N(1)=4) Golay complementary sequence obtained by the delay matrix D(1) = [8,
4, 1,2] and weight matrix W(1) = [1, 1, 1,1].

x2 is a generalised hierarchical sequence using the following formula, selecting s=2 and using the two Golay
complementary sequences x3 and x4 as constituent sequences. The length of the sequence x3 and x4 is called n3
respectively n4.

x2(i) = x4(i mod s + s*(i div sn3)) * x3((i div s) mod n3), i = 0 ... (n3* n4)  1.

x3 and x4 are defined to be identical and the length 4 (N(3)= N(4)=2) Golay complementary sequence obtained by
the delay matrix D(3) = D(4) = [1, 2] and weight matrix W(3) = W(4) = [1, 1].
The Golay complementary sequences x1,x3 and x4 are defined using the following recursive relation:
a0(k) = δ(k) and b0(k) = δ(k);
an(k) = an1(k) + W(j)n·bn1(kD(j)n);
bn(k) = an1(k)  W(j)n·bn1(kD(j)n);
k = 0, 1, 2, …, 2**N(j) 1;
n = 1, 2, …, N(j).
The wanted Golay complementary sequence xj is defined by an assuming n=N(j). The Kronecker delta function is
described by δ, k,j and n are integers.
Method 2
The sequence y can be viewed as a pruned Golay complementary sequence and generated using the following
parameters which apply to the generator equations for a and b above:
(a) Let j = 0, N(0) = 8.
(b) [D10,D20,D30,D40,D50,D60,D70,D80] = [128, 64, 16, 32, 8, 1, 4, 2].
(c) [W10,W20,W30,W40,W50,W60,W70,W80] = [1, 1, 1, 1, 1, 1, 1, 1].
(d) For n = 4, 6, set
b4(k) = a4(k), b6(k) = a6(k).
3GPP
Release 6
28
3GPP TS 25.213 V6.0.0 (200312)
Annex B (informative):
Change history
Change history
Date
14/01/00
TSG #
RAN_05
TSG Doc.
RP99589
CR

Rev
14/01/00
14/01/00
14/01/00
14/01/00
14/01/00
RAN_06
RAN_06
RAN_06
RAN_06
RAN_06
RP99682
RP99683
RP99682
RP99683
RP99683
005
006
007
008
009
1
1

14/01/00
14/01/00
14/01/00
14/01/00
14/01/00
14/01/00
14/01/00
31/03/00
31/03/00
31/03/00
31/03/00
31/03/00
31/03/00
31/03/00
RAN_06
RAN_06
RAN_06
RAN_06
RAN_06
RAN_06
RAN_07
RAN_07
RAN_07
RAN_07
RAN_07
RAN_07
RAN_07
RP99683
RP99683
RP99682
RP99683
RP99683
RP99683
RP000063
RP000063
RP000063
RP000063
RP000063
RP000063
RP000063
011
012
014
016
017
019
020
021
022
023
024
025
027
1
2
1
1

31/03/00
RAN_07 RP000063 028
2
31/03/00
31/03/00
26/06/00
26/06/00
RAN_07
RAN_07
RAN_08
RAN_08
029
032
033
034
2
26/06/00
16/12/00
RAN_08 RP000267 035
RAN_10 RP000539 037
1
16/03/01
16/03/01
16/03/01
15/06/01
15/06/01
14/12/01
08/03/02
07/06/02
07/06/02
07/06/02
07/06/02
07/06/02
07/06/02
16/09/02
16/09/02
16/09/02
26/03/03
21/09/03
06/01/04
06/01/04
06/01/04
13/01/04
RAN_11
RAN_11
RAN_11
RAN_12
RAN_12
RAN_14
RAN_15
RAN_16
RAN_16
RAN_16
RAN_16
RAN_16
RAN_16
RAN_17
RAN_17
RAN_17
RAN_19
RAN_21
RAN_22
RAN_22
RAN_22
RAN_22
1
1
1
1
3
1
RP000063
RP000063
RP000267
RP000267
RP010059
RP010059
RP010333
RP010333
RP010738
RP020058
RP020309
RP020316
RP020316
RP020316
RP020316
RP020316
RP020583
RP020583
RP020592
RP030135
RP030457
RP030648
RP030648
RP030727

038
039
041
043
047
049
053
050
054
055
056
057
058
059
060
061
062
064
065
067

1
1
1
3

1
1
1
2

Subject/Comment
Approved at TSG RAN #5 and placed under Change
Control
Harmonization of notations for downlink scrambling codes
Update of downlink spreading description
Update of TS 25.213 uplink parts
Updated modulation description
Restriction for spreading factor 512 allocation in the UTRA
FDD Downlink
CPCH codes in power control preamble
Support of short codes for CPCH
Editorial Change
Channelization Code Allocation for USTS
Correction (Editorial Change)
Correction to code allocation for compressed mode
Change history was added by the editor
Consistent numbering of scrambling code groups
Downlink signal flow corrections
Uplink signal flow corrections
Number of RACH scrambling codes
Editorial changes to 25.213
Number of PCPCH scrambling codes per cell
A typo correction for 5.2.2 and clarification for 5.2.3.1 of TS
25.213V3.1.1
Channelization code allocation method for PCPCH
message part
Clarifications to DSCH scrambling and modulation in 25.213
Clean up of USTS related specifications
Clarifications to power control preamble sections
Numbering of the PCPCH access preamble and collision detection
preamble scrambling codes
DPDCH/DPCCH gain factors
Proposed removal of the option of secondary scrambling code for
some downlink common channels
Approved as Release 4 specification (v4.0.0) at TSG RAN #11
Clarification of channelization codes when SF=512
Clarification of the scrambling code of a power control preamble
Clarification of DL channelization code alignment
Clarification of PDSCH root channelisation code definition
Correction of section number reference
The inclusion of HSDPA into 25.213
Downlink bit mapping
Consistency of Signal Point Constellation for QPSK and 16QAM
Clarification of uplink DTX handling and modulation
Removal of code mapping description over HSSCCH
I/Q mapping of HSDPCCH
Definition of the amplitude gain factor for HSDPCCH
Numbering corrections
Correction on the maximum DPDCH in Figure1
Power offset values for HSDPCCH
Removal of the tiny text in Figure 1 and minor corrections to 4.2.1
Clarification of 16QAM modulation description
Correction of figure in combining of downlink physical channels
Correction of reference to calculation of HSDPCCH gain factor
Restriction of DL secondary scrambling codes per CCTrCH
Created for M.1457 update
3GPP
Old

New
3.0.0
3.0.0
3.0.0
3.0.0
3.0.0
3.0.0
3.1.0
3.1.0
3.1.0
3.1.0
3.1.0
3.0.0
3.0.0
3.0.0
3.0.0
3.0.0
3.0.0
3.1.0
3.1.1
3.1.1
3.1.1
3.1.1
3.1.1
3.1.1
3.1.1
3.1.0
3.1.0
3.1.0
3.1.0
3.1.0
3.1.0
3.1.1
3.2.0
3.2.0
3.2.0
3.2.0
3.2.0
3.2.0
3.2.0
3.1.1
3.2.0
3.1.1
3.1.1
3.2.0
3.2.0
3.2.0
3.2.0
3.3.0
3.3.0
3.2.0
3.3.0
3.3.0
3.4.0
3.4.0
3.4.0
3.4.0
4.0.0
4.0.0
4.1.0
4.2.0
5.0.0
5.0.0
5.0.0
5.0.0
5.0.0
5.0.0
5.1.0
5.1.0
5.1.0
5.2.0
5.3.0
5.4.0
5.4.0
5.4.0
5.5.0
4.0.0
4.0.0
4.0.0
4.1.0
4.1.0
4.2.0
5.0.0
5.1.0
5.1.0
5.1.0
5.1.0
5.1.0
5.1.0
5.2.0
5.2.0
5.2.0
5.3.0
5.4.0
5.5.0
5.5.0
5.5.0
6.0.0
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